JPH0284791A - Manufacture of wiring board - Google Patents
Manufacture of wiring boardInfo
- Publication number
- JPH0284791A JPH0284791A JP32021788A JP32021788A JPH0284791A JP H0284791 A JPH0284791 A JP H0284791A JP 32021788 A JP32021788 A JP 32021788A JP 32021788 A JP32021788 A JP 32021788A JP H0284791 A JPH0284791 A JP H0284791A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- wiring board
- plating
- foil
- resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 239000011888 foil Substances 0.000 claims abstract description 32
- 238000007747 plating Methods 0.000 claims abstract description 27
- 238000000034 method Methods 0.000 claims abstract description 25
- 239000004020 conductor Substances 0.000 claims abstract description 15
- 238000009713 electroplating Methods 0.000 claims abstract description 6
- 239000000126 substance Substances 0.000 claims abstract description 5
- 229920003002 synthetic resin Polymers 0.000 claims abstract description 5
- 239000000057 synthetic resin Substances 0.000 claims abstract description 5
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 230000003746 surface roughness Effects 0.000 claims description 4
- 239000002985 plastic film Substances 0.000 claims description 2
- 229920006255 plastic film Polymers 0.000 claims description 2
- 239000010409 thin film Substances 0.000 claims 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 9
- 229910052782 aluminium Inorganic materials 0.000 abstract description 9
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 9
- 229910052802 copper Inorganic materials 0.000 abstract description 8
- 239000010949 copper Substances 0.000 abstract description 8
- 239000011248 coating agent Substances 0.000 abstract description 5
- 238000000576 coating method Methods 0.000 abstract description 5
- 229920001721 polyimide Polymers 0.000 abstract description 4
- 239000009719 polyimide resin Substances 0.000 abstract description 3
- 239000007864 aqueous solution Substances 0.000 abstract description 2
- 238000010924 continuous production Methods 0.000 abstract description 2
- 238000010438 heat treatment Methods 0.000 abstract description 2
- 239000003513 alkali Substances 0.000 abstract 1
- 238000007493 shaping process Methods 0.000 abstract 1
- 229920005989 resin Polymers 0.000 description 10
- 239000011347 resin Substances 0.000 description 10
- 239000010410 layer Substances 0.000 description 9
- 239000000758 substrate Substances 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 5
- 229910000679 solder Inorganic materials 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- -1 and their prepregs Polymers 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229920001568 phenolic resin Polymers 0.000 description 2
- 239000005011 phenolic resin Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 229920005992 thermoplastic resin Polymers 0.000 description 2
- 239000004640 Melamine resin Substances 0.000 description 1
- 229920000877 Melamine resin Polymers 0.000 description 1
- 239000004696 Poly ether ether ketone Substances 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000004695 Polyether sulfone Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000003638 chemical reducing agent Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000003795 desorption Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000003063 flame retardant Substances 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920002492 poly(sulfone) Polymers 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 229920006393 polyether sulfone Polymers 0.000 description 1
- 229920002530 polyetherether ketone Polymers 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 239000005020 polyethylene terephthalate Substances 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000013404 process transfer Methods 0.000 description 1
- 239000012266 salt solution Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 229920002803 thermoplastic polyurethane Polymers 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 239000011135 tin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はプリント基板、PGASTABなどエレクトロ
ニクス分野で用いる配線板の製造法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing wiring boards used in the electronics field, such as printed circuit boards and PGASTAB.
プリント配線板は、その製造法により分類するとつぎの
3種に大別される。すなわちfll基板の表面に接着さ
れた銅箔をエツチングして所望の回路を形成するサブト
ラクト法、(2)絶縁基板の表面に銅回路を無電解めっ
きすることによって導体回路を形成するアブイブイブ法
、(3)表面平滑な金属表面に所望の導体回路を形成し
、これを絶縁基板に転写する方法である。Printed wiring boards can be broadly classified into the following three types based on their manufacturing method. (2) the subtract method, in which a copper foil bonded to the surface of an FLL board is etched to form a desired circuit; (2) the abu-ibub method, in which a conductive circuit is formed by electrolessly plating a copper circuit on the surface of an insulating board; 3) A method of forming a desired conductor circuit on a smooth metal surface and transferring it to an insulating substrate.
上記従来技術は、いずれも既製の基板に導体回路を形成
することを特長とするものであるが、かかる方法による
ときの問題点として次のような事項がある。The above-mentioned conventional techniques are all characterized by forming a conductor circuit on a ready-made substrate, but there are the following problems when using such methods.
(1) 導体と絶縁基板の接着に高度な技術を要する
。(1) Advanced technology is required to bond the conductor and insulating substrate.
即ち、ハンダの温度に耐え電気特性にすぐれた接着剤を
必要とし、また導体の接着面には凹凸処理などの高度な
処理を必要とする。That is, an adhesive that can withstand solder temperature and has excellent electrical properties is required, and the adhesive surface of the conductor requires advanced treatment such as uneven treatment.
(2)導体と絶縁基板の表面が一致していない。(2) The surfaces of the conductor and insulating substrate do not match.
(3)絶縁基板の熱膨張、吸脱湿による寸法変化があっ
て部品の実装において問題がある。(3) Dimensional changes due to thermal expansion, moisture absorption and desorption of the insulating substrate cause problems in mounting components.
(4)絶縁基板の表面粗さが大きく微細回路ができない
。現在量産的には100μmが限度となっている。(4) The surface roughness of the insulating substrate is large, making it impossible to form fine circuits. Currently, the limit for mass production is 100 μm.
(5)絶縁基板の回路加工性(穴あけ加工、スルホール
めっき性、そり、ねじれなどによる工程移送)をバラン
スさせるのに高度な技術を要する。(5) Advanced technology is required to balance the circuit processability (drilling, through-hole plating, process transfer due to warping, twisting, etc.) of the insulating substrate.
本発明はかかる問題点を解決もしくは著しく軽減するこ
とを可能とする配線板の製造法を提供するものである。The present invention provides a method of manufacturing a wiring board that makes it possible to solve or significantly reduce such problems.
すなわち本発明は、アルミニウム箔等の連続した導電性
薄箔にめっきレジストを塗布し、所望の回路の逆像をレ
ジストによって形成し、電気めっきあるいは化学めっき
によって回路を形成し、次いてめっきレジストを剥離除
去するとともにその除去した跡に絶縁性の合成樹脂を充
填し、さらに導体上も被覆することにより導体回路を埋
めこみ固定することによって配線板を製造することを特
長とするものである。That is, in the present invention, a plating resist is applied to a continuous conductive thin foil such as aluminum foil, a reverse image of a desired circuit is formed with the resist, a circuit is formed by electroplating or chemical plating, and then the plating resist is applied. This method is characterized by manufacturing a wiring board by peeling and removing, filling the removed area with an insulating synthetic resin, and further covering the conductor to embed and fix the conductor circuit.
以下本発明を第1図に示す工程図を参照しながら説明す
る。工程■は導電性を有する薄箔の準備である。導電性
を有するm箔としては、アルミ、ニッケル、銅、錫、鉄
あるいはステンレスなどの金属箔、ポリエステルやポリ
カーボネートなどのプラスチックフィルムに金属の薄膜
を形成した薄箔である。その厚みは10.unから50
0μm、好ましくは20〜100μm程度がよい。幅は
特に制限はないが、300〜6001■が作業性にすぐ
れる。薄箔の両側には配線板の幅に見合ったキャリヤ用
のガイド穴(パーフォレーション)を設けておくことに
より、薄箔の送りや後工程処理あるいは多層化時の位置
合わせが容易になる。The present invention will be explained below with reference to the process diagram shown in FIG. Step (2) is the preparation of a conductive thin foil. The conductive m-foil is a metal foil made of aluminum, nickel, copper, tin, iron, or stainless steel, or a thin foil made of a plastic film such as polyester or polycarbonate on which a thin metal film is formed. Its thickness is 10. 50 from un
The thickness is preferably about 0 μm, preferably about 20 to 100 μm. There is no particular restriction on the width, but a width of 300 to 6001 cm provides excellent workability. By providing carrier guide holes (perforations) on both sides of the thin foil that match the width of the wiring board, feeding the thin foil, post-processing, or positioning during multilayering becomes easier.
導電性薄箔の表面は、回路の微細化上平滑であることが
望ましく、その表面粗さは10μm以下、さらに好まし
くは5μm以下のものが適している。The surface of the conductive thin foil is desirably smooth in terms of circuit miniaturization, and the surface roughness is preferably 10 μm or less, more preferably 5 μm or less.
またこれらFi箔の表面には、めっきに支障のない範囲
で表面処理を施してもよい。Further, the surface of these Fi foils may be subjected to surface treatment within a range that does not interfere with plating.
次に工程■は回路パターンを形成するためにめっきレジ
ストを適用する工程で、めっきレジストとしては感光性
のドライフィルム状のもの、液状のレジストを乾燥して
固体膜状とするもの、液状のままパターンを形成するも
のなどいずれでもよい、液状レジストには光硬化のもの
と加熱硬化型のものがあり、ホトマスク法、シルクスク
リーン法あるいはオフセット法などの適用が可能である
。Next, step (■) is the process of applying a plating resist to form the circuit pattern.The plating resist can be in the form of a photosensitive dry film, liquid resist can be dried into a solid film, or it can remain in liquid form. Liquid resists that can be used to form a pattern include photo-curable resists and heat-curable resists, and photomask methods, silk screen methods, offset methods, and the like can be applied.
この工程で回路パターンを形成したものは次のめっき工
程■へ進む。めっきは電気めっきあるいは化学めっきの
いずれでも可能である。電気めっきの場合は、導電性薄
箔を陰極とし、銅、ニッケルなどの導体回路を形成する
金属を陽極として常法により電気めっきをおこなう。ま
た化学めっきの場合は導電性薄箔を還元剤の入った金属
塩水溶液に浸漬することにより行われる。めっきにより
形成する導体回路の厚さは10〜30μ情が好適である
。The circuit pattern formed in this step proceeds to the next plating step (2). Plating can be either electroplating or chemical plating. In the case of electroplating, electroplating is performed by a conventional method using a conductive thin foil as a cathode and a metal such as copper or nickel that forms a conductive circuit as an anode. In the case of chemical plating, the conductive thin foil is immersed in an aqueous metal salt solution containing a reducing agent. The thickness of the conductor circuit formed by plating is preferably 10 to 30 μm.
次に■の工程で用いたレジストに叶った方法(機械的研
磨、アルカリ法、溶剤法など)によりめっきレジストを
剥離・除去する。しかるのち除去したレジストの跡に■
の工程で絶縁性の合成樹脂を適用する。合成樹脂の適用
方法は、液状樹脂の場合には、塗布−乾燥、無溶剤型光
硬化性樹脂の場合にはUVあるいは電子線照射を行う。Next, the plating resist is peeled off and removed using a method suitable for the resist used in step ① (mechanical polishing, alkaline method, solvent method, etc.). However, on the traces of the resist that was removed afterwards,
Insulating synthetic resin is applied in the process. The synthetic resin is applied by coating and drying in the case of a liquid resin, and by UV or electron beam irradiation in the case of a solvent-free photocurable resin.
水分散性樹脂の場合は電着も可能である。固体樹脂は溶
融塗布、粉体塗装などの方法が採用される。塗布の厚さ
は導体回路を十分に被覆するに十分な量であれば特に制
限はない。用いられる樹脂の種類としては、熱硬化性、
熱可塑性のいずれでも可能であり、フェノール樹脂、エ
ポキシ樹脂、ポリイミド樹脂、ポリエステル樹脂、DA
P樹脂、メラミン樹脂、ウレタン樹脂、およびそれらの
プリプレグ等の熱硬化性樹脂、ポリアミド、ポリ−ボネ
ート、ポリエーテルスルホン、ポリエーテルエーテルケ
トン、PET樹脂、PBTm脂、ポリスルホン等の熱可
塑性樹脂が挙げられる。その他充填剤、難燃剤あるいは
可撓性付与剤などの添加剤を必要により配合することは
自由である。熱硬化性樹脂の場合には工程■で十分な硬
化処理を行う。In the case of water-dispersible resins, electrodeposition is also possible. For solid resin, methods such as melt coating and powder coating are used. The coating thickness is not particularly limited as long as it is sufficient to sufficiently cover the conductor circuit. The types of resins used include thermosetting,
Any thermoplastic resin is possible, such as phenolic resin, epoxy resin, polyimide resin, polyester resin, DA
Examples include thermosetting resins such as P resin, melamine resin, urethane resin, and their prepregs, and thermoplastic resins such as polyamide, polybonate, polyethersulfone, polyetheretherketone, PET resin, PBTm resin, and polysulfone. . Other additives such as fillers, flame retardants, and flexibility imparters may be added as necessary. In the case of a thermosetting resin, sufficient curing treatment is performed in step (3).
工程■のつぎに、導電性薄箔を剥離することによって片
面のフレキシブルなプリント配線板、あるいは片面のリ
ジッドなプリント配線板の素材として更にソルダーレジ
スト、オーバーレイフィルムなどの付与工程に入る。こ
れとは別に、工程■の素材はそのまま多層化の素材とし
て導電性TR箔をそのままにしてガイド穴を利用して2
組のものを背合わせに接着剤を用いて接着することによ
り2層回路プリント配線板とする(第4図)、この方法
を次つぎに通用すれば多層化配線板を得ることができる
。また工程■の製品の薄箔を剥離し金型内面に密着させ
て射出成形することにより成形品そのものに配線を付与
することも可能である。After step (2), the conductive thin foil is peeled off and a process of applying solder resist, overlay film, etc. is started as a material for a single-sided flexible printed wiring board or a single-sided rigid printed wiring board. Separately, the material in step ① is used as a multilayer material, and the conductive TR foil is left as it is, and the guide hole is used to make 2 layers.
A two-layer circuit printed wiring board is obtained by bonding the sets back to back using an adhesive (FIG. 4). If this method is applied one after another, a multilayer wiring board can be obtained. It is also possible to provide wiring to the molded product itself by peeling off the thin foil of the product in step (2) and injection molding the product in close contact with the inner surface of the mold.
以下本発明を実施例によりさらに説明するが、本発明は
これに限定されるものではない。The present invention will be further explained below with reference to Examples, but the present invention is not limited thereto.
導電性薄箔としてJIS−84170相当のアルミ箔(
厚さ100μ鋼、表面粗さ2μm)を用い、その表面に
めっきレジストとしてホテソク[F](日立化成工業−
社製ドライフィルム)を熱圧着した後、ホトマスク法に
より回路の逆像を焼付・現像した。ついでアルミ箔を陰
掻として銅めっきをおこない回路幅が5μ曙、25μ慨
厚みの回路を形成した。その後剥離液に浸漬してレジス
トを除去し、その上にポリイミド樹脂(日立化成工業−
社製 Vl−203)を全体で50μmの厚みになるよ
うに塗布し、加熱硬化することにより第2図に示す配線
板(A)を得た。Aluminum foil equivalent to JIS-84170 (
100 μm thick steel, surface roughness 2 μm) was used, and Hotesoku [F] (Hitachi Chemical Co., Ltd.) was used as a plating resist on the surface.
After thermocompression-bonding a dry film (manufactured by Dry Film), a reverse image of the circuit was printed and developed using a photomask method. Next, copper plating was performed using aluminum foil as a shade to form a circuit with a circuit width of 5 μm and a thickness of 25 μm. After that, the resist is removed by immersion in a stripping solution, and polyimide resin (Hitachi Chemical Co., Ltd.) is applied on top of it.
Vl-203) manufactured by Co., Ltd. was coated to a total thickness of 50 μm, and the wiring board (A) shown in FIG. 2 was obtained by heating and curing.
ついで配線板(A)を希アルカリ水溶液に浸しアルミ箔
1を除去し第3図(B)に示す如き配線板を得る。銅回
路2は絶縁層3で3面が覆われており、その引き剥がし
力は約1.5kg/cm以上あった。第3図(C)は、
これに更にソルダーレジスト5を回路面に塗布したもの
で、フレキシブル配線板として十分使用に耐えるもので
ある。Next, the wiring board (A) is immersed in a dilute alkaline aqueous solution and the aluminum foil 1 is removed to obtain a wiring board as shown in FIG. 3(B). The copper circuit 2 was covered on three sides with an insulating layer 3, and its peeling force was about 1.5 kg/cm or more. Figure 3 (C) is
In addition, a solder resist 5 is applied to the circuit surface, making it sufficiently usable as a flexible wiring board.
第4図(D>は第2図(A>に示したものを2枚対称に
接着剤で貼り合わせたものである。接着剤としては例え
ばポリイミド系の日立化成工業−社製Vl−205など
が使用できる。貼り合わせにおいては(D)のアルミ箔
1は両側に設けたガイド穴4を基準にして上下の銅回路
の位置合わせをすることができる。また上下の回路は常
法によりスルホール7に銅めっき8をおこなうことによ
って導通させることが可能であり、ソルダーレジストを
塗布すれば両面回路を有するフレキシブル配線板(E)
が得られる。第5図(F)および(G)は、第41!l
(E)にさらに−層付は加えて三層構造としたもので
ある。Figure 4 (D>) is the two sheets shown in Figure 2 (A>) symmetrically pasted together with an adhesive. Examples of adhesives include polyimide-based Vl-205 manufactured by Hitachi Chemical Co., Ltd. can be used. When bonding, the upper and lower copper circuits can be aligned using the guide holes 4 provided on both sides of the aluminum foil 1 in (D) as a reference. Also, the upper and lower circuits can be connected through the through holes 7 using the usual method. It is possible to make it conductive by applying copper plating 8 to the surface, and by applying a solder resist, it is possible to create a flexible wiring board (E) with double-sided circuits.
is obtained. Figures 5 (F) and (G) are the 41st! l
In addition to (E), the addition of a layer was added to give a three-layer structure.
第6図は第3図(C)の配線板裏側に厚さ1.5鰭のフ
ェノール樹脂積層板(日立化成工業■製LP−437F
)を貼り合わせて片面回路を有するリジッド回路のプリ
ント配線板としたものである。Figure 6 shows a phenolic resin laminate (LP-437F manufactured by Hitachi Chemical Co., Ltd.) with a thickness of 1.5 fins on the back side of the wiring board in Figure 3 (C).
) are pasted together to form a rigid circuit printed wiring board with a single-sided circuit.
如上の如く本発明は、表面平滑な導電性薄箔上にめっき
によって回路を形成し、この上に絶縁層を形成すること
によってプリント回路板を製造するものであり、微細な
回路パターンを有する存する配線板の製造が容易であり
、絶縁層が導体回路の三面を包みこむので回路自体が強
固に保持され、また絶縁層の導体回路の表面は導電性薄
箔の面と面一となり平滑な表面を有する配線板が得られ
るので多層化が容易である。さらに、導電性薄箔は連続
した長尺体として供給できるため連続生産が可能であり
、その工業的価値は大である。As described above, the present invention is to manufacture a printed circuit board by forming a circuit on a conductive thin foil with a smooth surface by plating, and then forming an insulating layer on this. The wiring board is easy to manufacture, and since the insulating layer wraps around the conductor circuit on three sides, the circuit itself is held firmly, and the surface of the conductor circuit in the insulating layer is flush with the surface of the conductive thin foil, creating a smooth surface. Since a wiring board having the following properties can be obtained, multilayering is easy. Furthermore, since the conductive thin foil can be supplied as a continuous elongated body, continuous production is possible, and its industrial value is great.
図面はいずれも本発明の実施例を示すもので、第1図は
その工程図、第2図は第1図に示す工程から得られた配
線板の断面図、第3図は片面配線板(B)とソルダレジ
ストを適用した配線板(C)の断面図、第4図は両面配
線板(D)とスルホールを設けた配線板(E)の断面図
、第5図は多層配線板(F)とスルホールを設けた配線
板の断面図、第6図はりジッド配線板の断面図である。
符号の説明
1 導電性薄箔 2 回路
3 絶縁層 4 ガイド穴
ソルダレジスト
スルホール
接着層
めっき
積層板
(a)
第
図
(b)
(c)
第
図
(d)
(e)
第
図
(+)
第
図
第
図
(CI)The drawings all show examples of the present invention; FIG. 1 is a process diagram, FIG. 2 is a cross-sectional view of a wiring board obtained from the process shown in FIG. 1, and FIG. 3 is a single-sided wiring board ( 4 is a sectional view of a double-sided wiring board (D) and a wiring board with through holes (E), and FIG. ) and a cross-sectional view of a wiring board provided with through holes, and FIG. 6 is a cross-sectional view of a beam-width wiring board. Explanation of symbols 1 Conductive thin foil 2 Circuit 3 Insulating layer 4 Guide hole solder resist through hole adhesive layer plated laminate (a) Figure (b) (c) Figure (d) (e) Figure (+) Figure Figure (CI)
Claims (4)
トにより所望回路の逆像を形成するとともに、電気めっ
き或いは化学めっきにより導体回路を形成し、ついで前
記めっきレジストを取り除くとともに前記導体回路を被
覆するに十分な量の合成樹脂により導体回路を埋めこみ
固定することからなる配線板の製造法。1. On a conductive thin foil with a smooth surface, a reverse image of a desired circuit is formed using a plating resist, and a conductive circuit is formed by electroplating or chemical plating, and then the plating resist is removed and the conductive circuit is covered. A method of manufacturing wiring boards that consists of embedding and fixing conductor circuits with a sufficient amount of synthetic resin.
イルム上に導電性薄膜を形成した10〜500μmの厚
みを有するものである請求項1に記載の配線板の製造法
。2. 2. The method of manufacturing a wiring board according to claim 1, wherein the conductive thin foil is a metal foil or a plastic film formed with a conductive thin film having a thickness of 10 to 500 μm.
る請求項1に記載の配線板の製造法。3. The method for manufacturing a wiring board according to claim 1, wherein the conductive thin foil has a surface roughness of 10 μm or less.
ものである請求項1に記載の配線板の製造法。4. 2. The method of manufacturing a wiring board according to claim 1, wherein guide holes are bored on both sides of the conductive thin foil.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32021788A JPH0284791A (en) | 1988-06-17 | 1988-12-19 | Manufacture of wiring board |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63-149515 | 1988-06-17 | ||
JP14951588 | 1988-06-17 | ||
JP32021788A JPH0284791A (en) | 1988-06-17 | 1988-12-19 | Manufacture of wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0284791A true JPH0284791A (en) | 1990-03-26 |
Family
ID=26479377
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP32021788A Pending JPH0284791A (en) | 1988-06-17 | 1988-12-19 | Manufacture of wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0284791A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004039136A1 (en) * | 2002-10-25 | 2004-05-06 | Murata Manufacturing Co., Ltd. | Method for manufacturing resin substrate and method for manufacturing multilayer resin substrate |
-
1988
- 1988-12-19 JP JP32021788A patent/JPH0284791A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004039136A1 (en) * | 2002-10-25 | 2004-05-06 | Murata Manufacturing Co., Ltd. | Method for manufacturing resin substrate and method for manufacturing multilayer resin substrate |
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