JPS6390897A - Manufacture of multilayer interconnection board - Google Patents
Manufacture of multilayer interconnection boardInfo
- Publication number
- JPS6390897A JPS6390897A JP23659486A JP23659486A JPS6390897A JP S6390897 A JPS6390897 A JP S6390897A JP 23659486 A JP23659486 A JP 23659486A JP 23659486 A JP23659486 A JP 23659486A JP S6390897 A JPS6390897 A JP S6390897A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- circuit pattern
- sided
- wiring board
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 229920005989 resin Polymers 0.000 claims description 16
- 239000011347 resin Substances 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 7
- 239000010410 layer Substances 0.000 description 12
- 238000007747 plating Methods 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 239000011521 glass Substances 0.000 description 5
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 239000004744 fabric Substances 0.000 description 4
- 239000011888 foil Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 3
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- -1 polyimideimide Polymers 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000004952 Polyamide Substances 0.000 description 2
- PPBRXRYQALVLMV-UHFFFAOYSA-N Styrene Chemical compound C=CC1=CC=CC=C1 PPBRXRYQALVLMV-UHFFFAOYSA-N 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- JHIVVAPYMSGYDF-UHFFFAOYSA-N cyclohexanone Chemical compound O=C1CCCCC1 JHIVVAPYMSGYDF-UHFFFAOYSA-N 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000000835 fiber Substances 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229920002647 polyamide Polymers 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- 239000011701 zinc Substances 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- QTWJRLJHJPIABL-UHFFFAOYSA-N 2-methylphenol;3-methylphenol;4-methylphenol Chemical compound CC1=CC=C(O)C=C1.CC1=CC=CC(O)=C1.CC1=CC=CC=C1O QTWJRLJHJPIABL-UHFFFAOYSA-N 0.000 description 1
- 229920000742 Cotton Polymers 0.000 description 1
- 229920000877 Melamine resin Polymers 0.000 description 1
- 239000004640 Melamine resin Substances 0.000 description 1
- 239000004696 Poly ether ether ketone Substances 0.000 description 1
- 239000005062 Polybutadiene Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000004721 Polyphenylene oxide Substances 0.000 description 1
- 239000004734 Polyphenylene sulfide Substances 0.000 description 1
- 239000004372 Polyvinyl alcohol Substances 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000010425 asbestos Substances 0.000 description 1
- 239000004927 clay Substances 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229930003836 cresol Natural products 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 229920002492 poly(sulfone) Polymers 0.000 description 1
- 229920002857 polybutadiene Polymers 0.000 description 1
- 229920001707 polybutylene terephthalate Polymers 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920002530 polyetherether ketone Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920006380 polyphenylene oxide Polymers 0.000 description 1
- 229920000069 polyphenylene sulfide Polymers 0.000 description 1
- 229920002451 polyvinyl alcohol Polymers 0.000 description 1
- 229910052573 porcelain Inorganic materials 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 229910052895 riebeckite Inorganic materials 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 229920002994 synthetic fiber Polymers 0.000 description 1
- 239000012209 synthetic fiber Substances 0.000 description 1
- 229920006337 unsaturated polyester resin Polymers 0.000 description 1
- 239000002759 woven fabric Substances 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明は電気PA器、電子機器、計$L機器、通信機器
、ICカード等だ用論られる多ノ輪配線板の製造方法に
関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a multi-node wiring board that can be used for electric PA equipment, electronic equipment, total $L equipment, communication equipment, IC cards, and the like.
従来の薄型多層配線板はスルホール回路が形成された両
面配線板と片面鋼張積層板とを接着剤で貼り合せた後、
所要位置に貫通孔を設はスルホール鍍金、片面銅張積層
板の回路パターン形成を行ない多ノー配線板として層る
が、両面配線板に形成されたスルホールは鍍金処理を2
回受けることになり鍍金厚みが大となり回路精度が低下
したり、接着剤による貼り合わせ時に接着剤が両面配線
板に形成されたスルホール重金を汚染し回路精度を低下
させたり、更には2回の鍍金処理による配線板の性能低
下が問題になっていた。Conventional thin multilayer wiring boards are made by bonding together a double-sided wiring board with through-hole circuits and a single-sided steel-clad laminate using adhesive.
Through-holes are formed in the required positions by through-hole plating, and a circuit pattern is formed on a single-sided copper-clad laminate to form a multi-no wiring board.
As a result, the plating thickness increases and the circuit accuracy decreases, and when bonding with adhesive, the adhesive contaminates the through-hole heavy metal formed on the double-sided wiring board, reducing the circuit accuracy. Deterioration in the performance of wiring boards due to plating has been a problem.
本発明の目的とするところはスルホール回路の精度がよ
く、配線板の性能低下のな込多層配線板の製造方法を提
供することにある。An object of the present invention is to provide a method for manufacturing a hollow multilayer wiring board in which the precision of through-hole circuits is high and the performance of the wiring board is not degraded.
本発明は所要位置が開孔され、上面及び又は下面に回路
パターンが形成された両ll1li基板の回路バターン
側片面に、樹脂層を介して外J−材を配設−体化後、前
記開孔部とは異なる所要位置に貫通孔を設け、全開孔部
をスルホール鍍金し、更に回路パターンを形成すること
を特徴とする多層配線板の製造方法のため、スルホール
の象金処理を1同で済ませることができ、スルホール回
路の精度を向上させると共に配線基板の性能低下を防止
することができたもので、以下本発明の詳細な説明する
。In the present invention, an outer J-material is placed on one side of the circuit pattern side of both ll1li boards, which have holes at required positions and a circuit pattern is formed on the upper and/or lower surfaces, through a resin layer, and then the The manufacturing method for multilayer wiring boards is characterized by providing through-holes at predetermined positions different from the holes, through-hole plating all open holes, and further forming a circuit pattern. The present invention will be described in detail below.
本発明に用する所要位置が開孔され、上面及び又は下面
に回路パターンが形成された両面基板としては、フェノ
ール樹脂、クレゾール驕月旨、エポキシ樹脂、不飽和ポ
リエステル樹脂、メラミン樹l」旨、ポリイミド、ポリ
ブタジェン、ポリアミド、ポリ了ミドイミド、ポリスル
フォン、ポリフェニレンサルファイド、ポリフェニレン
オキサイド、ポリブチレンテレフタレート、ポリエーテ
ルエーテルケトン、弗化樹脂等の単独、変性物、混合物
等に必要に応じて粘度調整に水、メチルアルコール、ア
セトン、シクロヘキサノン、スチレン箋の溶媒を添加し
た樹脂フェスをガラス、アスベスト等の無機埴維やポリ
エステル、ポリアミド、ポリビニルアルコール、アクリ
ル等の有機合成繊維ヤ木綿等の天然繊維からなる織布、
不織布、マット或は紙又はこれらの組合せ基材等に含浸
した樹脂含浸基材を所要枚数重ねた上下面に銅、了ルミ
ニウム、ニッケル、亜鉛、鉄等の単独、合金からなる金
属箔を配役一体化してなる両面金属張積層板の上面及び
又は下面をエツチング等で処理して回路パターンを形成
したものや、アルミニウム、鉄、餉、ニッケル、亜鉛等
の単独、合金からなる金属板の上下に樹脂層を介して金
属箔を配役一体化してなる両面金嘴張金属ペース板の1
而及び又は下面をエツチング等で処理して回路パターン
を形成したものや樹脂積層板の両面に導電インク等で回
路形成したものや、樹脂積層板の両面に回路を鍍金等で
形成1−だものである。樹脂1層としては前記樹脂含浸
基材や樹脂含浸基材に用Aるす脂の塗布層、樹脂シート
、樹脂フィルムを用いるが好ましくは樹脂含浸基材を用
いることが樹脂層の厚み精度を向上させることができる
ので望まし論、外層材としては前記金属箔や片面金属張
積層板や片面金属張金属ベース板等のように回路パター
ンを形成できるものであればよく特に限定するものでは
ないが好ましくは片面金属張積層板を用いることが望ま
しす、スルホール鍍金、回路パターン形成等については
常法で行なうことができる。The double-sided substrates used in the present invention are perforated at the required positions and have circuit patterns formed on the upper and/or lower surfaces, such as phenolic resin, cresol resin, epoxy resin, unsaturated polyester resin, melamine resin, Add water or water to adjust the viscosity of polyimide, polybutadiene, polyamide, polyimideimide, polysulfone, polyphenylene sulfide, polyphenylene oxide, polybutylene terephthalate, polyether ether ketone, fluorinated resin, etc. alone, modified products, or mixtures as necessary. Resin fabrics containing solvents such as methyl alcohol, acetone, cyclohexanone, and styrene are used to create woven fabrics made of glass, inorganic clay fibers such as asbestos, organic synthetic fibers such as polyester, polyamide, polyvinyl alcohol, and acrylic, and natural fibers such as cotton.
Metal foil made of copper, aluminum, nickel, zinc, iron, etc. alone or in an alloy is cast on the upper and lower surfaces of the required number of resin-impregnated base materials impregnated with non-woven fabric, matte, paper, or a combination of these base materials. The top and/or bottom surfaces of double-sided metal-clad laminates made by etching are processed to form circuit patterns, and the top and bottom of metal plates made of aluminum, iron, porcelain, nickel, zinc, etc. alone or made of alloys are coated with resin. 1. Double-sided gold-plated metal paste board made by integrating metal foil through layers.
Those whose lower surfaces are treated with etching etc. to form a circuit pattern, those whose circuits are formed on both sides of a resin laminate with conductive ink, etc., and those whose circuits are formed on both sides of a resin laminate by plating etc. It is. As the first resin layer, the resin-impregnated base material, a coating layer of A resin for the resin-impregnated base material, a resin sheet, or a resin film is used, but it is preferable to use the resin-impregnated base material to improve the thickness accuracy of the resin layer. The outer layer material is not particularly limited as long as it can form a circuit pattern, such as the metal foil, single-sided metal-clad laminate, single-sided metal-clad metal base plate, etc. It is preferable to use a single-sided metal-clad laminate; through-hole plating, circuit pattern formation, etc. can be carried out by conventional methods.
以下本発明を実施例にもとづ−て説明する。The present invention will be explained below based on examples.
実施例
第1図は本発明の一実施例をホす簡略工程図である。第
1図て示すように所要位置に直径0.35m厘の開孔部
lを有し、片面のみに回路パターン2が形成された厚さ
0.1 flの両面銅張ガラス布基材エポキシ樹脂配線
基板3の回路パターン側に厚さQ、IMlのエポキシ樹
脂含浸ガラス蒲2枚4を介して、厚さ0.1 giの片
面銅張ガラス布基材エポキシ樹脂積;−板5の銅張側6
を外(ル]にして配設した積層体を成形圧力40にυ’
d 、160’Cで60分間噴層成形した後、前記開孔
部1とは異なる所要位置に直径0.351の貫通孔7を
設け、全開孔部をスルホールお金8し、上下面に回路パ
ターン9を形成して3J−配線板を得た。Embodiment FIG. 1 is a simplified process diagram showing an embodiment of the present invention. As shown in Figure 1, a double-sided copper-clad glass fabric base epoxy resin with a thickness of 0.1 fl has an opening l with a diameter of 0.35 m at the required position and a circuit pattern 2 formed on only one side. On the circuit pattern side of the wiring board 3, a single-sided copper-clad glass cloth substrate epoxy resin layer with a thickness of 0.1 gi; side 6
The laminated body arranged with
d. After spray molding at 160'C for 60 minutes, a through hole 7 with a diameter of 0.351 is provided at a required position different from the opening 1, the entire opening is through-hole 8, and a circuit pattern is formed on the upper and lower surfaces. 9 was formed to obtain a 3J-wiring board.
従来例
スルホール回路及び片面のみに回路パターンが形成され
た厚さQ、 1111Mの両面銅張ガラス為゛基材二ボ
キシ樹脂配線基板の回路パターン側に接層剤層を介して
厚さg、 1 wmの片面銅張ガラス布基材エポキシ樹
脂積層板の銅張側を外側にして配設した積層体を成形圧
力40 KQ/盲、160℃で60分間積層成形゛した
後、配線板のスルホール回路とは具なる所要位置に直径
Q、35jlJの貫通孔を股げスルホール鍍金し、上下
面に回路パターンを形成して3層配線板を得た。Conventional example Through-hole circuit and circuit pattern formed on only one side Thickness Q, 1111M double-sided copper clad glass base material diboxy resin wiring board with adhesive layer on the circuit pattern side Thickness g, 1 A laminate of Wm single-sided copper-clad glass cloth base epoxy resin laminate with the copper-clad side facing outward was laminated at a molding pressure of 40 KQ/blind at 160°C for 60 minutes, and then the through-hole circuit of the wiring board was formed. Through hole plating was performed to form through holes of diameter Q and 35 jlJ at the required positions, and circuit patterns were formed on the upper and lower surfaces to obtain a three-layer wiring board.
〔発明の効果〕
実施例の3層配線板のスルホール回路の粘度は従来例の
ものより30条よく、且つ実施例の3層配線板の性能低
下はなく、本発明の多tS配線板の製造方法の優れてい
ることを確Y志した。[Effects of the Invention] The viscosity of the through-hole circuit of the three-layer wiring board of the example was 30 degrees better than that of the conventional example, and there was no deterioration in the performance of the three-layer wiring board of the example, and the production of the multi-tS wiring board of the present invention I was convinced that the method was superior.
第1図は本発明の一実施例を示す簡略工程図である。
1は両面基板の開孔部、2は両面基板の回路ノ(ターン
、3は両面基板、4は樹脂層、5は外層材、6は外j−
材の金属箔側、7は貫通孔、8はスルホール鍍金1−1
9は上下面の回路パターンである。FIG. 1 is a simplified process diagram showing an embodiment of the present invention. 1 is the opening of the double-sided board, 2 is the circuit hole (turn) of the double-sided board, 3 is the double-sided board, 4 is the resin layer, 5 is the outer layer material, and 6 is the outer layer.
Metal foil side of material, 7 is through hole, 8 is through hole plating 1-1
9 is a circuit pattern on the upper and lower surfaces.
Claims (3)
ターンが形成された両面基板の回路パターン側片面に、
樹脂層を介して外層材を配設一体化後、前記開孔部とは
異なる所要位置に貫通孔を設け、全開孔部をスルホール
鍍金し、更に回路パターンを形成することを特徴とする
多層配線板の製造方法。(1) On one side of the circuit pattern side of a double-sided board with holes drilled at the required positions and a circuit pattern formed on the top and/or bottom surface,
A multilayer wiring characterized in that after arranging and integrating an outer layer material through a resin layer, through-holes are provided at required positions different from the openings, all the openings are through-hole plated, and a circuit pattern is further formed. Method of manufacturing the board.
許請求の範囲第1項記載の多層配線板の製造方法。(2) The method for manufacturing a multilayer wiring board according to claim 1, wherein the resin layer is a resin-impregnated base material.
る特許請求の範囲第1項記載の多層配線板の製造方法。(3) The method for manufacturing a multilayer wiring board according to claim 1, wherein the outer layer material is a single-sided metal-clad laminate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23659486A JPS6390897A (en) | 1986-10-03 | 1986-10-03 | Manufacture of multilayer interconnection board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23659486A JPS6390897A (en) | 1986-10-03 | 1986-10-03 | Manufacture of multilayer interconnection board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6390897A true JPS6390897A (en) | 1988-04-21 |
Family
ID=17002956
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23659486A Pending JPS6390897A (en) | 1986-10-03 | 1986-10-03 | Manufacture of multilayer interconnection board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6390897A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005317945A (en) * | 2004-03-31 | 2005-11-10 | Nitta Ind Corp | Electromagnetic wave absorber |
JP2007087980A (en) * | 2005-09-16 | 2007-04-05 | Goto Ikueikai | Radio wave absorber |
JP2010080596A (en) * | 2008-09-25 | 2010-04-08 | Hitachi Chem Co Ltd | Three-layer wiring board |
JP2010135742A (en) * | 2008-10-28 | 2010-06-17 | Hitachi Chem Co Ltd | Three-layered wiring substrate, and method of manufacturing the same |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5145275A (en) * | 1974-10-16 | 1976-04-17 | Hitachi Ltd | JUKOBUNKATSUSETSUZOKUKOOJUSURU TASOPURINTOKAIROBAN OYOBI SONOSEIHO |
JPS54163359A (en) * | 1978-06-16 | 1979-12-25 | Hitachi Ltd | Method of producing multiilayer printed circuit board |
JPS59175796A (en) * | 1983-03-25 | 1984-10-04 | 日本電気株式会社 | Method of producing multilayer printed circuit board |
-
1986
- 1986-10-03 JP JP23659486A patent/JPS6390897A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5145275A (en) * | 1974-10-16 | 1976-04-17 | Hitachi Ltd | JUKOBUNKATSUSETSUZOKUKOOJUSURU TASOPURINTOKAIROBAN OYOBI SONOSEIHO |
JPS54163359A (en) * | 1978-06-16 | 1979-12-25 | Hitachi Ltd | Method of producing multiilayer printed circuit board |
JPS59175796A (en) * | 1983-03-25 | 1984-10-04 | 日本電気株式会社 | Method of producing multilayer printed circuit board |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005317945A (en) * | 2004-03-31 | 2005-11-10 | Nitta Ind Corp | Electromagnetic wave absorber |
JP2007087980A (en) * | 2005-09-16 | 2007-04-05 | Goto Ikueikai | Radio wave absorber |
JP2010080596A (en) * | 2008-09-25 | 2010-04-08 | Hitachi Chem Co Ltd | Three-layer wiring board |
JP2010135742A (en) * | 2008-10-28 | 2010-06-17 | Hitachi Chem Co Ltd | Three-layered wiring substrate, and method of manufacturing the same |
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