JPH0282847A - Input signal interruption detection control system - Google Patents

Abstract

PURPOSE:To stop a demodulation data output before a misdemodulation data at the interruption of an input signal is outputted from a demodulation section by using a signal led out from a midway stage of a band pass filter for band limit so as to detect the interruption of the input signal. CONSTITUTION:A band pass filter 12 consists of a low Q filter section comprising a high pass stage and a low pass stage and of a high Q filter section comprising a high and low frequency polarized stage and a signal led out of the low Q filter section is fed to a rectifier circuit 23. In the case of the interruption of the input signal, the level of the signal led out of the low Q filter section of the band pass filter 12 is decreased immediately, a mean value M from a mean value circuit 24 is immediately decreased in the vicinity of zero and a gate circuit 13 is closed even if an input signal interruption detection signal from a carrier level detection circuit 21 is not fed to the gate circuit 19 to prevent the output of mis-demodulation data.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an input signal disconnection detection circuit that detects input signal disconnection of a demodulator at high speed.

In the demodulator, the level of the input signal is detected by a carrier level detection circuit, and therefore, instantaneous interruptions in the input signal can be detected by this carrier level detection circuit. It is desired to detect the disconnection of the input signal even faster.

[Conventional technology]

A conventional demodulator has, for example, the configuration shown in FIG. 4, where 40 is an input terminal, 41 is an AD converter (AD), 42 is a band-pass filter (BPF) for band limitation, and 43 is a local oscillator. , 44 is a multiplier, 45 is a low-pass filter (
46 is a limiter (LIM), 47 is a phase comparator (PLL) including a phase synchronization circuit, 48 is a low pass filter (LPF), 49 is a gate circuit (G), 50
is an output terminal, and 51 is a carrier level detection circuit (CD).

An input signal FM modulated with data is applied to an input terminal 40, sampled by an AD converter 41 at a higher speed than the bit rate of the transmitted data, and converted into a digital signal. The converted digital signal is applied to a bandpass filter 42 consisting of a digital circuit. The output signal of the bandpass filter 42 is applied to the multiplier 44 together with the output signal of the local oscillator 43 and multiplied, and the multiplied output signal becomes a frequency-converted version of the input signal.Unwanted wave components are removed by the low-pass filter 45 consisting of a digital circuit. removed, the limiter 46 and the carrier level detection circuit 5
1 and added to. The digital signal, which has a constant amplitude value by the limiter 46, is applied to a phase comparator 47,
A comparison output signal corresponding to the frequency deviation is output, becomes demodulated data by the low-pass filter 48, and is sent to the gate circuit 4.
The signal is output from the output terminal 50 via the signal line 9.

Further, the carrier level detection circuit 51 includes a low-pass filter 4
5 monitors the level of the output digital signal and controls the gate circuit 49, and when it detects an input signal disconnection,
The output of demodulated data from the gate circuit 49 is stopped, and the output terminal 50 is fixed at high level or low level.

This makes it possible to prevent output of erroneously demodulated data due to noise or the like.

[Problem to be solved by the invention]

In the conventional example described above, the detection of the human power signal interruption by the carrier level detection circuit 51 had a drawback that it was performed after the human power signal actually became disconnected and after the erroneous demodulated data during the transient period was output. For example, (al, (b) in FIG.
and fcl is the output signal of the carrier level detection circuit 5.
1 detection signal (fd) is rough demodulated data, when the input signal is cut off at time t1, the output signal of the AD converter 41 immediately becomes zero, but the output signal of the low-pass filter 45 is band-limited. Due to the influence of the band-pass filter 42, the level does not immediately become zero, but gradually decreases and becomes almost zero at time t2.

Therefore, the detection signal of the carrier level detection circuit 51 changes from "1" to "O" at time t2, indicating that the input signal is disconnected, the gate circuit 49 is closed, and the output of demodulated data is stopped. Ru. In this way, a signal equivalent to noise is output from the low-pass filter 45 due to the delayed output signal of the band-pass filter 42 between time t1 of input signal disconnection and time t2 of input signal disconnection detection. , which has the disadvantage that erroneous demodulated data is output.

In order to eliminate the influence of such a delay caused by the band pass filter 42, it is conceivable to perform carrier level detection at a stage before the band pass filter 42. However, in that case, since a signal that is not band-limited is manually input to the carrier level detection circuit 51, there is a drawback that the influence of DC components and noise components is large, resulting in malfunction of carrier level detection.

An object of the present invention is to perform input signal disconnection detection at high speed.

[Means to solve the problem]

The input signal disconnection detection circuit of the present invention detects an input signal disconnection using a signal derived from an intermediate stage of a band-pass filter for band limitation, and will be described with reference to FIG.

Consisting of an AD converter 1 that converts an input signal modulated by data into a digital signal, a low Q filter section consisting of a high pass stage 2a and a low pass stage 2b, and a high Q filter section consisting of polar stages 2c and 2d. The demodulation device is equipped with a band-pass filter 2 for band-limiting to which the output digital signal of the AD converter 1 is added, and a demodulator 3 which adds the output signal of this band-pass filter 2 and demodulates it by digital processing. an average value circuit 4 which calculates the average value of the signal derived from the low Q filter section of the band pass filter 2;
A comparison circuit 5 is provided which compares the average value from the average value circuit 4 with a threshold value to detect an input signal stage.

[Effect]

High pass stage 2a and low pass stage 2 of band pass filter 2
b constitutes a low Q filter section, and this low Q
Although the delay of the signal passing through the filter section is slight, it has the ability to limit the band to a certain extent. Furthermore, the polarized stages 2c and 2d on the high-frequency side and the low-frequency side constitute a high-Q filter section, and the delay of the signal passing through this high-Q filter section becomes large.

Therefore, since the signal derived from the low-Q filter section is band-limited and has a small delay, high-speed detection is possible by detecting input signal interruption based on this signal.
It is possible to stop the output of demodulated data before the erroneous demodulated data is output from the demodulator 3 when the input signal is cut off.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a block diagram of an embodiment of the present invention, in which 10 is an input terminal to which an input signal FM modulated with data is applied;
11 is an AD converter (AD), 12 is a band-pass filter (BPF) for band limitation, 13 is a local oscillator, 14 is a multiplier, 15 is a low-pass filter (LPF), 16 is a limiter (LIM), and 17 is a digital A phase comparison circuit (PLL) including a phase synchronization circuit, 18 a low-pass filter (
LPF), 19 is a gate circuit (G), 20 is an output terminal,
21 is a carrier level detection circuit, 22 is a signal disconnection detection circuit, 23 is a rectifier circuit, 24 is an average value circuit, and 25.26 is a comparison circuit.

The operation of the demodulator is similar to that of the conventional example, and demodulated data is outputted to the output terminal 20 via the gate circuit 19. The band-pass filter 12 is composed of a low-Q filter section consisting of a high-pass stage and a low-pass stage, and a high-Q filter section consisting of polarized stages on the high-pass side and the low-pass side. This signal is applied to the rectifier circuit 23.

The signal disconnection detection circuit 22 is composed of a digital circuit, and the rectifier circuit 23 corresponds to full-wave rectification of an analog signal, and converts a digital signal of positive or negative polarity to either positive or negative polarity. be. Then, the average value circuit 24 calculates the average value for each unit time. For example, by accumulating 8 sample values of the output signal of the rectifier circuit 23,
By shifting the bit to the right (1/2"), the average value M can be output every 8 sample periods. In this case, the average value M can be calculated every cycle of the carrier signal. can.

The average value M calculated by the average value circuit 24 is calculated by the comparison circuit 25.
It is compared with a threshold value th1 in the comparison circuit 26, and compared with a threshold value th2 in the comparison circuit 26. Assuming that the threshold thl applied to the comparison circuit 25 is the threshold for input signal loss detection, and the threshold th2 applied to the comparison circuit 26 is the threshold for input signal recovery detection, t
The relationship is set as hl<th2.

When the input signal is cut off, the level of the signal derived from the low Q filter section of the bandpass filter 12 immediately drops.
The average value M from the average value circuit 24 also immediately drops to near zero, and M<t h l, so the input signal disconnection detection signal is applied from the comparator circuit 25 to the gate circuit 19, and the input signal from the carrier level detection circuit 21 is applied to the gate circuit 19. Even if the signal disconnection detection signal is not applied to the gate circuit 19, the gate circuit 19 is closed to prevent output of erroneously demodulated data.

Furthermore, when the input signal is restored after the input signal is disconnected, M>th2, so the input signal recovery detection signal from the comparator circuit 26 is applied to the gate circuit 19, and the input signal disconnection detection signal from the comparator circuit 25 also disappears. Gate circuit 19 will be opened.

FIG. 3 is an explanatory diagram of a bandpass filter, and shows an eighth-order bandpass filter consisting of a highpass stage HP, a lowpass stage LP, and a poled stage POL on the high and low frequency sides.

In the figure, IN is an input terminal to which the output digital signal of the AD converter 11 is added, 0UTI is the output terminal of the band-limited digital signal, and 0UT2 is the output terminal connected to the rectifier circuit 23 of the signal disconnection detection circuit 22. , A1-A4°B1-B4. C1-C4, DI-D4. El-E4 is a multiplier, AD is an adder, and Z is a delay element with a delay time of l sample period.

The high-pass stage HP and the low-pass stage LP constitute a low-Q filter section, and the high-pass stage and low-pass stage POL constitute a high-Q filter section, and the transfer function H (
Z) corresponds to each stage as shown in the formula shown in the figure. Therefore,
A band-limited and DC-cut digital signal is output from the output terminal 0UT2 of the low-Q filter section. Since this signal has a smaller delay than the signal output from the output terminal 0UT2, the signal disconnection detection circuit 22
By adding this to , it becomes possible to detect input signal disconnection at high speed.

The order of the front J bandpass filter is not limited to the 8th order, and it is possible to have a higher order, and the order of the high-pass stage HP and the low-pass stage LP constituting the low-Q filter section is as follows. It is also possible to do the opposite of what is shown.

〔Effect of the invention〕

As explained above, in the present invention, the average value of the signal derived from the low Q filter section of the band-pass filter 2 for band limiting of the demodulator is obtained by the average value circuit 4, and the average value and the threshold value are calculated by the comparison circuit. 5 to detect input signal interruption, and the low Q of bandpass filter 2 for band limiting.
Since input signal disconnection can be detected based on the digital signal that has been band-limited and DC cut by the filter section, there is no delay caused by the high-Q filter section, and there is little influence from DC components and noise. It also has the advantage of being able to detect at high speed. Therefore, it is possible to prevent the output of erroneously demodulated data immediately after the input signal is cut off.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of the principle of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is an explanatory diagram of a bandpass filter.
FIG. 4 is a block diagram of a conventional example, and FIG. 5 is an explanatory diagram of input signal disconnection. 2 is an AD converter, 2 is a bandpass filter, 2a is a high-pass stage, 2b is a low-pass stage, 2c and 2d are polar stages, 3 is a demodulator, 4 is an average value circuit, and 5 is a comparison circuit. m 1lie lk −D't < +:! e Din

Claims (1)

[Claims] An AD converter (1) that converts an input signal modulated with data into a digital signal, a low-Q filter section consisting of a high-pass stage (2a) and a low-pass stage (2b), and a polar stage. (2c, 2d), a bandpass filter (2) for band limiting to which the output digital signal of the AD converter (1) is added, and the output of the bandpass filter (2). Demodulator (3) that adds a signal and demodulates it by digital processing
A demodulator comprising: an average value circuit (4) for determining the average value of the signal derived from the low Q filter section of the bandpass filter (2); and an average value from the average value circuit (4). An input signal disconnection detection circuit comprising: a comparison circuit (5) for detecting an input signal disconnection by comparing the input signal and a threshold value.