JPH0452021B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an input signal disconnection detection circuit that detects input signal disconnection of a demodulator at high speed.

In the demodulator, the level of the input signal is detected by a carrier level detection circuit.
Therefore, instantaneous interruptions in the input signal can also be detected by this carrier level detection circuit. It is desired to detect the disconnection of the input signal even faster.

[Conventional technology]

The conventional demodulator has, for example, the configuration shown in FIG. 4, where 40 is an input terminal, 41 is an AD converter (AD), 42 is a bandpass filter (BPF) for band limitation, and 43 is a local oscillator. , 44 is a multiplier, 4
5 is a low pass filter (LPF), 46 is a limiter (LIM), 47 is a phase comparator (PLL) including a phase synchronization circuit, 48 is a low pass filter (LPF), 49
50 is a gate circuit (G), 50 is an output terminal, and 51 is a carrier level detection circuit (CD).

An input signal FM modulated with data is applied to an input terminal 40, sampled by an AD converter 41 at a higher speed than the bit rate of the transmitted data, and converted into a digital signal. The converted digital signal is applied to a bandpass filter 42 consisting of a digital circuit. The output signal of the bandpass filter 42 is applied to the multiplier 44 together with the output signal of the local oscillator 43 for multiplication, and the multiplied output signal becomes a frequency-converted version of the input signal, and a low-pass filter 45 consisting of a digital circuit removes unnecessary wave components. The signal is removed and added to the limiter 46 and the carrier level detection circuit 51. The digital signal, which has a constant amplitude value by the limiter 46, is applied to a phase comparator 47, which outputs a comparison output signal corresponding to the frequency deviation, which is converted into demodulated data by the low-pass filter 48, and then sent to the gate circuit 4.
The signal is output from the output terminal 50 via the signal line 9.

Further, the carrier level detection circuit 51 monitors the level of the output digital signal of the low-pass filter 45 and controls the gate circuit 49, and when it detects an input signal disconnection, it stops outputting the demodulated data from the gate circuit 49. Then, the output terminal 50 is fixed at high level or low level. Thereby, it is possible to prevent the output of erroneously demodulated data due to noise or the like.

[Problem to be solved by the invention]

In the conventional example described above, the detection of an input signal disconnection by the carrier level detection circuit 51 had a drawback that it was performed after the input signal actually disconnected and after the erroneous demodulated data during the transient period was output. For example, a and b in FIG. 5 are analog-displayed AD converters 41
and the output signal of the low-pass filter 45, c is the detection signal of the carrier level detection circuit 51, and d is the approximate demodulation data.When the input signal is cut off at time t1, the output signal of the AD converter 41 is immediately However, the output signal of the low-pass filter 45 is
Due to the influence of the bandpass filter 42 for band limitation, the level does not become zero immediately, but gradually decreases and becomes almost zero at time t2.

Therefore, the detection signal of the carrier level detection circuit 51 changes from "1" to "0" at time t2,
This indicates that the input signal is disconnected, and the gate circuit 4
9 is closed and the output of demodulated data is stopped. In this way, a signal equivalent to noise is output from the low-pass filter 45 due to the delayed output signal of the band-pass filter 42 between time t1 of input signal disconnection and time t2 of input signal disconnection detection. Therefore, there is a drawback that erroneous demodulated data is output.

In order to eliminate the influence of delay by such a bandpass filter 42, it is conceivable to perform carrier level detection at a stage before the bandpass filter 42. However, in that case, since a signal that is not band-limited is input to the carrier level detection circuit 51, there is a drawback that the influence of DC components and noise components is large, resulting in malfunction of carrier level detection.

An object of the present invention is to perform input signal disconnection detection at high speed.

[Means to solve the problem]

The input signal interruption detection circuit of the present invention detects an input signal interruption using a signal derived from an interruption in a bandpass filter for band limitation, and will be described with reference to FIG.

Consists of an AD converter 1 that converts an input signal modulated by data into a digital signal, a low-Q filter section consisting of a high-pass stage 2a and a low-pass stage 2b, and a high-Q filter section consisting of polar stages 2c and 2d. The demodulation device is equipped with a bandpass filter 2 for band limiting to which the output digital signal of the AD converter 1 is added, and a demodulator 3 which adds the output signal of this bandpass filter 2 and demodulates it by digital processing. an average value circuit 4 that calculates the average value of the signal derived from the low Q filter section of the bandpass filter 2; and a comparison circuit that compares the average value from the average value circuit 4 with a threshold value to detect an input signal stage. 5
It has been established that

[Effect]

The high-pass stage 2a and low-pass stage 2b of the band-pass filter 2 constitute a low-Q filter section, and although the delay of the signal passing through this low-Q filter section is slight, it has a certain degree of band-limiting ability. There is. Furthermore, the polarized stages 2c and 2d on the high-frequency side and the low-frequency side constitute a high-Q filter section, and the delay of the signal passing through this high-Q filter section becomes large. Therefore, since the signal derived from the low-Q filter section is band-limited and has a small delay, high-speed detection is possible by detecting an input signal interruption based on this signal, and errors caused when the input signal is interrupted can be avoided. It becomes possible to stop the output of demodulated data before the demodulated data is output from the demodulating section 3.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a block diagram of an embodiment of the present invention,
10 is an input terminal to which an input signal FM modulated with data is added, 11 is an AD converter (AD), 12 is a bandpass filter (BPF) for band limitation, 13
is a local oscillator, 14 is a multiplier, 15 is a low-pass filter (LPF), 16 is a limiter (LIM), 17
is a phase comparison circuit (PLL) including a digital phase synchronization circuit, 18 is a low-pass filter (LPF), and 19 is a phase comparison circuit (PLL) including a digital phase synchronization circuit.
is a gate circuit (G), 20 is an output terminal, 21 is a carrier level detection circuit, 22 is a signal disconnection detection circuit,
23 is a rectifier circuit, 24 is an average value circuit, 25, 26
is a comparison circuit.

The operation as a demodulator is the same as the conventional example,
Demodulated data is output to an output terminal 20 via a gate circuit 19. Moreover, the band pass filter 12 is
It consists of a low-Q filter section consisting of a high-pass stage and a low-pass stage, and a high-Q filter section consisting of a polarized stage on the high-frequency side and low-pass side, and the signal derived from the low-Q filter section is sent to the rectifier circuit 23. It is something to add.
Further, the signal disconnection detection circuit 22 is constituted by a digital circuit, and the rectifier circuit 23 corresponds to full-wave rectification of an analog signal, and converts a digital signal of positive or negative polarity to either positive or negative polarity. be. Then, the average value circuit 24 calculates the average value for each unit time. For example, the rectifier circuit 23
By accumulating the 8 sample values of the output signals and shifting them to the right by 3 bits (1/2 ³ ), the average value M can be output every 8 sample periods. In this case, it is also possible to configure the average value M to be calculated every cycle of the carrier signal.

The average value M calculated by the average value circuit 24 is compared with a threshold value th1 in a comparison circuit 25, and compared with a threshold value th2 in a comparison circuit 26. If the threshold th1 applied to the comparison circuit 25 is the threshold for detecting input signal loss, and the threshold th2 applied to the comparison circuit 26 is the threshold for detecting input signal restoration, then the relationship th1<th2 is established.

When the input signal is cut off, the level of the signal derived from the low Q filter section of the bandpass filter 12 immediately drops, so the average value M from the average value circuit 24 also immediately drops to near zero, and M<th1. Even if the input signal disconnection detection signal is applied to the gate circuit 19 from the comparison circuit 25 and the input signal disconnection detection signal is not applied to the gate circuit 19 from the carrier level detection circuit 21, the gate circuit 19 is closed and the erroneously demodulated data is Prevent the output of

Also, when the input signal is restored after the input signal is disconnected, M>
th2, the input signal recovery detection signal from the comparator circuit 26 is applied to the gate circuit 19, and since the input signal disconnection detection signal from the comparator circuit 25 also disappears, the gate circuit 19 is opened.

FIG. 3 is an explanatory diagram of a bandpass filter,
This figure shows an 8th-order bandpass filter consisting of a highpass stage HP, a lowpass stage LP, and a polarized stage POL on the high and low frequency sides. In the figure, IN is an input terminal to which the output digital signal of the AD converter 11 is applied, OUT1 is the output terminal of the band-limited digital signal, and OUT2 is the output terminal connected to the rectifier circuit 23 of the signal disconnection detection circuit 22. , A1-A4, B1
-B4, C1-C4, D1-D4, E1-E4 are multipliers, AD is an adder, and Z ^-1 is a delay element with a delay time of one sample period.

A low-Q filter section is composed of a high-pass stage HP and a low-pass stage LP.
A high-Q filter section is constructed by POL, and the transfer function H(Z) becomes as shown in the equation for each stage. Therefore, from the output terminal OUT2 of the low-Q filter section, a band-limited and DC-cut digital signal is output. Since this signal has a smaller delay than the signal output from the output terminal OUT2, by adding it to the signal disconnection detection circuit 22, it becomes possible to detect input signal disconnection at high speed.

The order of the above-mentioned bandpass filter is not limited to the 8th order, and it is also possible to use a higher order, and the order of the high-pass stage HP and the low-pass stage LP constituting the low-Q filter section is not shown in the figure. It is also possible to do the opposite.

〔Effect of the invention〕

As explained above, in the present invention, the average value of the signal derived from the low Q filter section of the bandpass filter 2 for band limiting of the demodulator is obtained by the average value circuit 4, and the average value and the threshold value are compared by the comparison circuit. 5 and detects an input signal interruption based on the digital signal whose band is limited by the low Q filter part of the bandpass filter 2 for band limitation and whose DC is cut. Since it can be detected, there is no delay due to the high Q filter section, there is little influence from DC components and noise, and there are advantages that it can be detected at high speed. Therefore,
It is possible to prevent the output of erroneously demodulated data immediately after the input signal is cut off.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram of the principle of the present invention, Fig. 2 is a block diagram of an embodiment of the invention, Fig. 3 is an explanatory diagram of a bandpass filter, Fig. 4 is a block diagram of a conventional example, and Fig. 5 is an input It is an explanatory diagram of signal interruption. 1 is an AD converter, 2 is a bandpass filter, 2
a is high pass stage, 2b is low pass stage, 2c, 2d
3 is a demodulator, 4 is an average value circuit, and 5 is a comparison circuit.

Claims (1)

[Claims] 1. An AD converter 1 that converts an input signal modulated with data into a digital signal, a low-Q filter section consisting of a high-pass stage 2a and a low-pass stage 2b, and polar stages 2c and 2d. High Q
The AD converter 1
A band-pass filter 2 for band limiting adds the output digital signal of , and the output signal of the band-pass filter 2 is added,
In a demodulation device comprising a demodulation unit 3 that performs demodulation by digital processing, an average value circuit 4 that calculates the average value of the signal derived from the low Q filter unit of the bandpass filter 2.
An input signal disconnection detection circuit comprising: and a comparison circuit 5 that compares the average value from the average value circuit 4 with a threshold value to detect an input signal disconnection.