JPH0281040U - - Google Patents
Info
- Publication number
- JPH0281040U JPH0281040U JP16028888U JP16028888U JPH0281040U JP H0281040 U JPH0281040 U JP H0281040U JP 16028888 U JP16028888 U JP 16028888U JP 16028888 U JP16028888 U JP 16028888U JP H0281040 U JPH0281040 U JP H0281040U
- Authority
- JP
- Japan
- Prior art keywords
- recognition mark
- view
- hybrid
- protrusion
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Wire Bonding (AREA)
Description
第１図は本考案に係るハイブリツドＩＣの平面
図、第２図は同じく製造途中における縦断面図、
第３図は同じく要部拡大縦断面図である。第４図
は従来のハイブリツドＩＣの斜視図、第５図は同
じく製造途中における斜視図、第６図は同じく縦
断面図である。
４……配線基板、６……電子部品、１１……認
識マーク、１５……突起部。
Fig. 1 is a plan view of a hybrid IC according to the present invention, Fig. 2 is a longitudinal cross-sectional view during the same manufacturing process,
FIG. 3 is also an enlarged longitudinal sectional view of the main part. FIG. 4 is a perspective view of a conventional hybrid IC, FIG. 5 is a perspective view of the same during manufacture, and FIG. 6 is a longitudinal sectional view. 4... Wiring board, 6... Electronic component, 11... Recognition mark, 15... Protrusion.
Claims (1)
ワイヤボンデイングの基準となる認識マークを形
成したハイブリツドＩＣにおいて、 上記認識マークの周辺部に、突起部を形成した
ことを特徴とするハイブリツドＩＣ。[Scope of claim for utility model registration] A part of the wiring board on which electronic components are mounted,
A hybrid IC having a recognition mark formed as a reference for wire bonding, characterized in that a protrusion is formed around the recognition mark.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16028888U JPH0281040U (en) | 1988-12-08 | 1988-12-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16028888U JPH0281040U (en) | 1988-12-08 | 1988-12-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0281040U true JPH0281040U (en) | 1990-06-22 |
Family
ID=31699558
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16028888U Pending JPH0281040U (en) | 1988-12-08 | 1988-12-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0281040U (en) |
-
1988
- 1988-12-08 JP JP16028888U patent/JPH0281040U/ja active Pending