JPH028059U - - Google Patents
Info
- Publication number
- JPH028059U JPH028059U JP7016589U JP7016589U JPH028059U JP H028059 U JPH028059 U JP H028059U JP 7016589 U JP7016589 U JP 7016589U JP 7016589 U JP7016589 U JP 7016589U JP H028059 U JPH028059 U JP H028059U
- Authority
- JP
- Japan
- Prior art keywords
- layer
- resistance
- electric field
- substrate
- resistance layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
- 230000005684 electric field Effects 0.000 claims description 5
- 230000000694 effects Effects 0.000 claims description 3
- 238000002347 injection Methods 0.000 claims description 2
- 239000007924 injection Substances 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims 3
- 230000005274 electronic transitions Effects 0.000 claims 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
Landscapes
- Bipolar Transistors (AREA)
Description
第1図イは従来の半導体装置、ロは動作時の直
流的な電界強度分布の様子をいろいろな場合につ
いて示したもの、第2図は本考案の半導体装置の
実施例でイはその構造、ロはマイクロ波以上のダ
イオード構造、ハは本考案の半導体装置を発振器
として応用した実施例、第3図は本考案の半導体
装置の動作を説明するもので、イは直流バイアス
での電界強度分布、ロはトンネル注入されたキヤ
リアの空乏層端での電界強度分布の変化を示して
いるものであり、第4図は本考案の別の実施例、
第5図イは本考案の実施例で合金拡散法によるも
のであり、ロは不純物密度分布であり、第6図は
本考案の実施例でトンネル注入部を禁制帯幅の小
さな半導体で構成し、走行層はガン効果を示す半
導体で形成されたヘテロ接合型のものである。
Figure 1A shows a conventional semiconductor device; B shows a diode structure for microwaves or higher, C shows an example in which the semiconductor device of the present invention is applied as an oscillator, Figure 3 explains the operation of the semiconductor device of the present invention, and A shows electric field intensity distribution under DC bias. , b show changes in the electric field intensity distribution at the edge of the depletion layer of tunnel-injected carriers, and Fig. 4 shows another embodiment of the present invention.
Figure 5A shows an embodiment of the present invention using the alloy diffusion method, B shows the impurity density distribution, and Figure 6 shows an embodiment of the invention in which the tunnel injection part is constructed of a semiconductor with a small forbidden band width. , the running layer is of a heterojunction type made of a semiconductor exhibiting the Gunn effect.
Claims (1)
較的高抵抗な層を設け、その上に前記高抵抗な層
よりも低抵抗なn層を1層以上設け、さらにその
上にn+層とp+層を設けた構造を有し、p+−
n+接合に逆方向バイアス電圧を印加したとき生
ずるトンネル注入効果により電子群が前記n層に
注入され、前記n層及び高抵抗層に生ずる電界に
より、電子群は走行し、前記n+基板近傍の高抵
抗層内で電界が小さくなることにより電子群の走
行速度が飽和速度以下になる点とn+基板との間
の距離よりも、前記高抵抗層が厚く、高抵抗層中
でトンネル注入された電子の一部が、負微分移動
度の電界領域となることを特徴とする超高周波半
導体装置。 A relatively high-resistance semiconductor layer having an electronic transition effect is provided on an n + substrate, one or more n-layers having a lower resistance than the high-resistance layer are provided on the layer, and an n + layer is further provided on top of the n-layer. It has a structure with a p + layer, and a p + −
A group of electrons is injected into the n layer due to the tunnel injection effect that occurs when a reverse bias voltage is applied to the n + junction, and the electron group travels due to the electric field generated in the n layer and the high resistance layer, and near the n + substrate. The high-resistance layer is thicker than the distance between the n + substrate and the point where the traveling speed of the electron group becomes below the saturation speed due to the electric field becoming smaller in the high-resistance layer. An ultra-high frequency semiconductor device characterized in that a part of the electrons generated becomes an electric field region with negative differential mobility.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989070165U JPH051085Y2 (en) | 1989-06-15 | 1989-06-15 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989070165U JPH051085Y2 (en) | 1989-06-15 | 1989-06-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH028059U true JPH028059U (en) | 1990-01-18 |
JPH051085Y2 JPH051085Y2 (en) | 1993-01-12 |
Family
ID=31295424
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1989070165U Expired - Lifetime JPH051085Y2 (en) | 1989-06-15 | 1989-06-15 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH051085Y2 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4929777A (en) * | 1972-07-18 | 1974-03-16 | ||
JPS5458379A (en) * | 1977-10-18 | 1979-05-11 | Matsushita Electronics Corp | Avalanche diode |
-
1989
- 1989-06-15 JP JP1989070165U patent/JPH051085Y2/ja not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4929777A (en) * | 1972-07-18 | 1974-03-16 | ||
JPS5458379A (en) * | 1977-10-18 | 1979-05-11 | Matsushita Electronics Corp | Avalanche diode |
Also Published As
Publication number | Publication date |
---|---|
JPH051085Y2 (en) | 1993-01-12 |
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