JPH07193232A - Conductivity modulation type transistor - Google Patents

Abstract

PURPOSE:To sufficiently reduce power loss by lowering rise voltage together with allowing no lowering the operable maximum temperature even using a semiconductor material of a small forbidden band width. CONSTITUTION:A P-type region at least of the inside in a PNPN structure or the whole area or a part 2 of an N-type region is formed of a semiconductor material having a forbidden band width smaller than a semiconductor material forming an outside P-type region 1 or an N-type region.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a conductivity modulation type transistor having a rising voltage lowered.

[0002]

2. Description of the Related Art As a conventional conductivity modulation type transistor, for example, there is one as shown in FIG. A low-concentration N-type drift region 3 that substantially functions as a drain is formed on the high-concentration P-type substrate 1, and a P-type body region 4 is formed at a predetermined position on the surface side of the N-type drift region 3. Further, a high-concentration N-type source region 5 is formed at a predetermined position on the surface side of the P-type body region 4. In addition, the N-type source region 5
A gate electrode 6 for inducing a channel on the surface side of the P type body region 4 is formed on the P type body region 4 between the N type drift region 3 and the N type drift region 3 via a gate oxide film. The substrate and the P-type and N-type regions are formed of Si semiconductor material.

When a required positive voltage is applied to the drain electrode D and a gate voltage above the threshold value is applied to the gate electrode 6, a channel is induced in the surface layer of the P-type body region 4 immediately below the gate electrode 6. Electrons flow from the N-type source region 5 to the N-type drift region 3. High concentration of P
Holes are injected from the mold substrate 1 into the N-type drift region 3,
High-concentration electrons and holes are present in the mold drift region 3, and conductivity modulation occurs. As a result, the on-resistance during operation is reduced and the power loss is reduced. However, in the conventional conductivity modulation type transistor, since the PN junction formed between the P-type substrate 1 and the N-type drift region 3 is formed of Si, as shown in FIG. There is a barrier of about 1 eV at. Therefore, in order for holes to be injected from the P-type substrate 1 into the N-type drift region 3 and a current to flow, it is necessary to apply a voltage of about 1 V between the PN junctions. As a result, as shown in FIG.
A rising voltage V _{f of} about 1 V is required for the current to flow.

[0004]

In the conventional conductivity modulation type transistor, a rising voltage of about 1 V is required to flow a current, so that power loss (current × rising voltage).
There was a problem that it was difficult to make the value sufficiently small.

The present invention has been made by paying attention to such a conventional problem, and it is possible to lower the rising voltage to sufficiently reduce the power loss, and to reduce the rising voltage, a semiconductor having a small forbidden band width. It is an object of the present invention to provide a conductivity modulation type transistor which does not lower the maximum operable temperature even if a material is used.

[0006]

In order to solve the above-mentioned problems, firstly, the present invention relates to a conductivity modulation type transistor having a PNPN structure, and at least an inner P-type region or N-type region in the PNPN structure. The gist of the invention is that the whole or a part of the above is formed of a semiconductor material having a smaller forbidden band width than the semiconductor material forming the outer P-type region or N-type region.

Secondly, in the first structure, the semiconductor material having a small forbidden band width is either SiGe or Ge, and the semiconductor material other than the SiGe or Ge is Si. To do.

[0008]

In the above structure, firstly, a forbidden band is higher than that of a semiconductor material in which at least an entire P-type region or N-type region in the PNPN structure forms an outer P-type region or N-type region. By being formed of a semiconductor material having a small width, the PN junction formed between the outer region and the inner region having a small forbidden band has a smaller barrier against injection of majority carriers from the outer region. For example, when SiGe or Ge is used as the semiconductor material having a small forbidden band and Si is used as the other semiconductor material, the barrier can be 0.5 eV or less. As a result, the rising voltage at which the current flows becomes low and the power loss can be sufficiently reduced. Further, when a semiconductor material having a small forbidden band width is used, the intrinsic temperature becomes low, but a PN junction formed of a semiconductor material having a large forbidden band width remains in the PNPN structure. Even if a semiconductor material having a small forbidden band is used for the whole or a part of the N-type region, the maximum operable temperature is not lowered.

Secondly, specifically, the semiconductor material having a small forbidden band width is made of either SiGe or Ge, and the other semiconductor material is made of Si, so that the current flows out as described above. It is possible to reduce the power loss to less than half by increasing the rising voltage from about 1 V in the related art to about 0.5 V or less. In addition, a PN is formed by a method of forming a SiGe layer or the like on the Si substrate by an epitaxial growth method or the like.
It is possible to easily realize a configuration in which the inner P-type region or N-type region in the PN structure is made of a semiconductor material having a small forbidden band width.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a first embodiment of the present invention. In FIG. 1 and a diagram showing a second embodiment which will be described later, the same or equivalent members and parts as those in FIG. 5 are designated by the same reference numerals, and the duplicated description will be omitted.
As shown in FIG. 1A, in this embodiment, most of the region 2 in the N-type drift region on the side in contact with the P-type substrate 1 is made of SiGe having a small forbidden band width, and the other regions are made of Si. Is formed by. Ge can also be used as a semiconductor material having a small band gap. Therefore, a PN junction is formed between the P-type substrate 1 and the N-type drift region and between the P-type substrate 1 and the N-type drift region 2 having a small forbidden band width.

Next, the operation of the conductivity modulation type transistor constructed as described above will be described. FIG. 1B shows an energy band diagram of the structure of FIG. P-type substrate 1
Since most of the N-type drift region 2 on the side contacting with is formed of a semiconductor material having a small forbidden band width, a P-type junction P formed between the P-type substrate 1 and the N-type drift region 2 is formed.
The barrier against the injection of holes from the mold substrate 1 becomes smaller.
As a semiconductor material with a narrow band gap, SiGe (or G
Since e) is used and Si is used as the other material, the barrier can be 0.5 eV or less. As a result, the rising voltage at which the current flows can be reduced from the conventional voltage of about 1 V to 0.5 V or less, and the power loss can be reduced to half or less. Also, when a semiconductor material with a narrow band gap is used, the intrinsic temperature becomes low,
Among the structures shown in FIG. 1A, Si having a large forbidden band width is used.
Since a PN junction having a high barrier remains between the N-type drift region 3 and the P-type body region 4 and between the P-type body region 4 and the N-type source region 5, which are formed of a semiconductor material, a part of the inner region in the PNPN structure is present. Even if a semiconductor material having a narrow band gap is used, the maximum operable temperature does not decrease. further,
The thickness of the N-type drift region 2 having a small forbidden band is set to 20 to 3
If it is set to about 0 μm, the breakdown voltage between the source S and the drain D becomes about 600 V, so that there is no problem in operating the device in terms of breakdown voltage.

FIG. 2 shows an example of a method of manufacturing the conductivity modulation type transistor of this embodiment. First, an N-type SiGe layer to be an N-type drift region 2 having a small forbidden band width is formed on a high-concentration P-type Si substrate 1 by an epitaxial method, and further, an N-type Si region to be an N-type drift region 3 of Si is formed. A layer is formed (FIG. 2A). A P-type body region 4 is formed at a predetermined position on the front surface side of the N-type drift region 3, and the P-type body region 4 is formed.
A high-concentration N-type source region 5 is formed at a predetermined position on the surface side of, and a gate oxide film and a gate electrode are further formed. Finally, required metal wiring is performed (FIG. 2B).

FIG. 3 shows a second embodiment of the present invention. In the present embodiment, the high-concentration P-type substrate 11 also has a small forbidden band width Si similarly to the N-type drift region 2 having a small forbidden band width.
It is formed of Ge or Ge. Even with such a configuration, P formed between the P-type substrate 11 and the N-type drift region 2
It is possible to reduce the barrier of N-junction from injecting holes from the P-type substrate 11. As an example of the manufacturing method of the present embodiment, the P-type substrate 11 and the SiGe substrate in which the N-type drift region 2 is formed, and the S that becomes the N-type drift region 3 are formed.
There is a method in which the i substrate is joined by a direct joining method, and then the P type body region 4 and the N type source region 5 are formed.

FIG. 4 shows a third embodiment of the present invention. This embodiment is applied to a thyristor. Figure 4
As shown in (a), a part of the N-type drift regions 12, 13 in the PNPN structure of the thyristor is made of SiGe having a small forbidden band width. FIG. 4B shows the static characteristic. Even in this case, even if the thyristor is turned on, the voltage V _{f for the} barrier remains,
In this embodiment, the value of V _f can be lowered as in the above-mentioned embodiments. Further, even with such a structure, the maximum operable temperature is not lowered as in the above case.

In each of the embodiments of the conductivity modulation type transistor described above, the N channel type has been described, but the present invention can be applied to the P channel type. In this case, the drift region becomes P-type.

[0016]

As described above, according to the present invention,
First, all or part of at least the inner P-type region or N-type region in the PNPN structure is to be the outer P-type region or N-type region.
Since a semiconductor material having a band gap smaller than that of the semiconductor material forming the mold region is used, a majority carrier is injected from the outer region of a PN junction formed between the outer region and the inner region having a smaller band gap. The barrier against voltage becomes small and the rising voltage at which the current flows becomes low, and the power loss can be made sufficiently small. When a semiconductor material with a small forbidden band is used, the intrinsic temperature decreases, but
Since a PN junction formed of a semiconductor material with a large forbidden band remains in the PN structure, it is possible to operate even if a semiconductor material with a small forbidden band is used for all or part of the inner P-type region or N-type region. The maximum temperature never drops.

Secondly, the semiconductor material having a small forbidden band width is S
Since iGe or Ge is used and the semiconductor material of the other portions is Si, the rising voltage at which the current flows can be reduced from about 1 V in the past to about 0.5 V or less, and the power loss can be sufficiently reduced to less than half. Can be lowered. Further, for example, by a manufacturing method in which a SiGe layer or the like is formed on a Si substrate by an epitaxial growth method or the like, a structure in which the inner P-type region or N-type region in the PNPN structure is made of a semiconductor material having a small forbidden band width can be easily realized. be able to.

[Brief description of drawings]

FIG. 1 is a first conductivity modulation transistor according to the present invention.
It is a longitudinal section and an energy band figure showing an example.

FIG. 2 is a process drawing showing an example of the manufacturing method of the first embodiment.

FIG. 3 is a vertical sectional view showing a second embodiment of the present invention.

FIG. 4 is a longitudinal sectional view showing a third embodiment of the present invention and a diagram showing static characteristics.

FIG. 5 is a vertical cross-sectional view of a conventional conductivity modulation type transistor.

FIG. 6 is a static characteristic and energy band diagram of the conventional example.

[Explanation of symbols]

1 P-type substrate 2 N-type drift region formed of a semiconductor material having a small forbidden band 3 N-type drift region of a semiconductor material having a large forbidden band 4 P-type body region 5 N-type source region 11 Small forbidden band P-type substrate made of semiconductor material

Claims (2)

[Claims] 1. A conductivity modulation type transistor having a PNPN structure, wherein at least an inner P-type region or an N-type region in the PNPN structure is entirely or partially formed to form an outer P-type region or an N-type region. A conductivity modulation type transistor, characterized by being formed of a semiconductor material having a band gap smaller than that of the existing semiconductor material. 2. The semiconductor material having a small forbidden band width is Si
2. The conductivity modulation type transistor according to claim 1, wherein the conductivity modulation transistor is Ge or Ge, and the semiconductor material of the portion other than SiGe or Ge is Si.