JPH0636598Y2 - Ultra high frequency semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and more particularly to a semiconductor device exhibiting a negative resistance in a microwave band or higher.

Negative resistance diode (tannet diode) using reverse bias tunnel injection operates at a lower bias voltage than negative resistance diode (impatt diode) using avalanche injection, and the oscillation frequency can be increased. , Low noise (Japanese Patent Publication No. 47-110)
No. 95).

The conventional tannet diode has a structure of injecting electrons from the p ⁺ layer to the n ⁺ layer or the n layer, and neglects the negative resistance due to the holes that are tunnel-injected.

The present invention is to provide a tannet diode that utilizes not only electrons that are tunnel-injected but also holes.

By utilizing the negative resistance due to holes, the operating layer thickness is approximately doubled, the depletion layer capacitance is approximately half that of a tannet diode with only electrons of the same area, and the impedance can be approximately doubled. It becomes easy to join with and the output power can be increased.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows the impurity density distribution of a tannet diode obtained by conventional electron tunnel injection, and FIG. 1 (a) shows p ⁺ −n.
It is an -n ⁺ type and includes an n ⁺ type region 2 and a p ⁺ type region 3 which are both tunnel injection and running regions on the n ⁺ type substrate 1. Figure 1 (b)
It is of p ⁺ -n ⁺ -i (ν) -n ⁺ type and has an n ⁺ -type region 22 for tunnel injection and carrier traveling shown in FIG. 1 (a) and an i (ν) -type region 21 for carrier traveling. It is a separate thing. The other parts are the same as in FIG.

In these tannet diodes, the impurity density of the p ⁺ type region 3 is increased so that the depletion layer mainly spreads to the n type regions 2, 22 and 21 to form a step junction. Alternatively, holes tunnel-injected from the n ⁺ layer 22 into the p ⁺ layer 3 hardly contribute to the negative resistance. The present invention utilizes both bipolar carriers that are tunnel-injected, and will be described below.

FIG. 2 shows an example of a semiconductor device in which a traveling layer is provided for tunnel-injected holes that are not used in the above-mentioned conventional tannet diode to obtain a negative resistance due to holes and electrons. Is an n ⁺ type semiconductor layer having a high impurity density, 2 is an n type layer having a lower impurity density than the n type layer 1,
31 is a p-type layer and 32 is p ^{+ with} a higher impurity density than the p-type layer 31.
It is a mold layer.

The impurity density of the n-type layer 2 and the p-type layer 31 is, for example, 1 × for Ge.
10 ¹⁷ cm ^-3 or more, 3 × 10 ¹⁷ cm ^-3 or more for Si, 4 × for GaAs
It is desirable to set it to 10 ¹⁷ cm ^-3 or more.

FIG. 3 shows the operation and electric field distribution of the semiconductor device of the present invention shown in FIG.

The diode is biased in the reverse direction, and the tunnel-injected electrons generated in the vicinity 40 of the maximum electric field strength region of the pn junction travel in the n-type layer 41 other than 40 at the saturation speed and the tunnel-injected holes. The negative resistance is obtained by the transit time effect generated by traveling the p-type layers 42 other than 40 at the saturated speed.

It is desirable that the maximum electric field strength ε _max of the pn junction is approximately 1000 kV / cm or more in order to cause tunnel injection.

The n and p layers 2 and 31 have such an impurity density and a thickness that the junction electric field strength becomes a sufficiently high electric field strength necessary for tunnel injection at the time of reverse bias, and almost all regions become a depletion layer at the time of operation. .

Since the tunnel injection occurs in a very narrow region of approximately 200 Å or less, the n-type layer 2 and the p-type layer 31 other than the tunnel injection region are almost the regions where the tunnel-injected carriers travel. When the tunnel injection is maximum at approximately π / 2 radians, the traveling angles of electrons and holes (θ≡ω ・ W / υ _s
Here, ω is the operating angular frequency, W is the thickness of the n-type layer 2 and the p-type layer 31, and ν _s is the saturation velocity. ) From approximately π to 2π
Radial gives negative resistance. n-type layer 2 and p
The thickness of the type layer 31 is set so that the depletion layer formed when the reverse bias is applied spreads to the n ⁺ type layer 1 and the p ⁺ type layer 32, and the portion which is not the depletion layer is reduced as much as possible. There are semiconductors such as Ge and Si, which have different saturation speeds for electrons and holes, or the same semiconductor, such as GaAs, but the n-type layer 2 should be used so that tunnel-injected electrons and holes have the same traveling angle. ,
The efficiency increases when the thickness of the p-type layer 31 is determined.

Compared with the structure of FIG. 1A, the semiconductor device of this embodiment has
The capacitance of the depletion layer can be reduced, the impedance can be increased, and the connection with the circuit can be easily made. However, p ⁺ -n in Fig. 1 (a)
Approximately twice as much voltage as the -n ⁺ type is required, and the tunnel injection layer and transit layer are the same as in the p ⁺ -n-n ⁺ type structure of Fig. 1 (a). Therefore, there is a drawback that the thickness of the traveling layer cannot be freely set.

The embodiment shown in FIG. 4 is characterized in that the operating voltage can be lowered and the width of the traveling layer can be freely set by the structure for separating the localized tunnel injection region and the traveling layer.

5 is an n ⁺ type layer having a high impurity density, 6 is an i (ν) type layer having a high resistance, 7 is an n ⁺ type layer having a high impurity density, 8 is a p ⁺ type layer having a high impurity density, and 9 is a high resistance. The i (π) type layer and 10 are p ⁺ type layers having high impurities. The two layers 7 and 8 forming the pn junction are regions provided for tunnel injection, and it is desired that the electric field strength during operation has a sufficient value necessary for tunnel injection and is as thin as possible. In terms of operation, n ⁺ type layer 7, p ⁺
About 100 Å or less is sufficient for both the mold layers 8.

The impurity density of the n ⁺ type layer 7 and the p ⁺ type layer 8 is about 1 × 10 ¹⁷ cm
It is desirable that the thickness is ^-3 or more and the thickness is approximately 0.2 μm or less, and the thickness is as thin as possible. FIG. 5 shows the operation and electric field distribution of the semiconductor device of the present invention shown in FIG. The operation is near the maximum electric field intensity region 50 formed by the localized p ⁺ −n ⁺ junction and the tunnel injection electron 50
Negative resistance is obtained by the traveling time effect generated by traveling at a saturation velocity in the region 51 other than that and by traveling at a saturation velocity by the tunnel-injected holes in the region 52 other than the tunnel injection region 50. The maximum electric field strength ω _max of the p ⁺ −n ⁺ junction to sufficiently induce tunnel injection is about 100.
It is desirable to set it to 0 kV / cm or more.

The high resistance layers 6 and 9 are transit layers for electrons and holes,
If the impurity density is made lower than that of the tunnel injection layers 7 and 8 so that the depletion layer reaches the high impurity density layers of 5 and 10 with a very small voltage, a voltage lower than that of the embodiment of FIG. It becomes possible to operate.

The thickness of the traveling layers 6 and 9 may be determined so that the traveling angle is approximately π to 2π radial when the tunnel injection is maximum at approximately π / 2 radians. If the traveling angle is 3 / 2π radial, the thickness is W = 3υ _s / 4.

Where ν _s is the carrier saturation speed and is the desired operating frequency.

For example, when the carrier saturation speed is 1 × 10 ⁷ cm / sec and the operating frequency is 10, 100, and 1000 GHz, W is 7.5 μ each.
m, 0.75 μm, 0.075 μm.

The reason why the traveling angle is set to about 1.5π is as follows.

The negative resistance, susceptance and electric power obtained when electrons and holes are caused to travel by the current of tunnel injection are shown below.

Think electronic. The diode structure in this case is shown in FIG.

The tunnel current equation is given by the following equation.

J = J _t exp e ^{V / Vt} (1) The amount of injected carriers n (t) is Becomes

The induced current at that time is given by the following equation.

Where J _t ′ ＝ J _t e ^{Vo / Vt} (5) Here, In (Z) is a modified Bessel function of the nth order.

The DC component J _o in the above equation is as follows.

On the other hand, the AC component is given by the following equation.

here, The conductance G and susceptance B of the diode when the area is S are respectively given by the following equations.

The power generated is An outline of V _rf , I _rf , and P _rf is shown in FIG. 7.

When electrons and holes contribute to the transit time (FIG. 5), holes are added as a dielectric current. When the traveling angles of electrons and holes are equal, P _rf is almost twice as large as that of only electrons.

The relationship between P _rf and running angle is as follows.

If only the conductance is considered, the maximum output is obtained when the traveling angles of the electron and hole are equal and it is 3 / 2π, but there is a susceptance component, so a detailed calculation will be performed.

Traveling angle (θ = 2πW / υ = 0.75υ / W Now, υ = 8 × 10 ⁶ cm / sec and W = 0.2 μm, so P _rf change when changing = 3000 GHz is shown in Fig. 8. The maximum output is obtained when the angle is slightly lower than 3 / 2π.

The present invention described above is a tannet diode that uses both tunnel-injected electrons and holes as traveling carriers and can be applied as a negative resistance semiconductor device in the microwave band or higher.

[Brief description of drawings]

1 (a) and 1 (b) are conventional semiconductor devices, FIG. 2 is an embodiment of the present invention, FIG. 3 is an explanation of the operation of the invention of FIG. 2, and FIG. 4 is another embodiment of the present invention. Example, FIG. 5 is an explanation of the operation of the device of FIG. 4, FIG. 6 is a structure used for calculation when only electrons are run, and FIG. 7 is a schematic diagram of the relationship between V _rf , I _rf and P _rf . , FIG. 8 is an example of calculating the relationship between frequency and output according to the present invention.

Claims (1)

[Scope of utility model registration request] 1. A high-impurity-density n ⁺ -type semiconductor region forming a p ⁺ -n ⁺ junction for tunnel injection, a high-impurity-density p ⁺ -type semiconductor region, and a high-resistance ν adjacent to the n ⁺ region. -Type semiconductor region and p ⁺ region adjacent to the high resistance π-type semiconductor region and ν
A high impurity density n ⁺ type semiconductor region adjacent to the type semiconductor region, the maximum electric field strength of the p ⁺ −n ⁺ junction in the state of reverse bias is about 1000 kV / cm, because of the tunnel injection the p ⁺ -type region and it was a n ⁺ -type region and the state it was depleted the ν-type region of high resistivity adjacent to the adjacent high-resistance π-type region and a tunnel injection p ⁺ -type region than n ⁺ Tunnel injection of electrons into the type region and p ⁺ from the n ⁺ region
The holes are tunnel-injected into the region, and the injected carriers cause the electrons to travel in the high-resistance layer ν layer and the holes travel in the high-resistance layer π layer at a saturation speed in most of the regions, and the electrons and holes Ν so that the running angle is about 1.5π radians
A semiconductor device characterized in that a negative resistance is obtained in a microwave band or higher by determining the thicknesses of the layers and the π layer.