JPH0273745U - - Google Patents

Info

Publication number
JPH0273745U
JPH0273745U JP15372288U JP15372288U JPH0273745U JP H0273745 U JPH0273745 U JP H0273745U JP 15372288 U JP15372288 U JP 15372288U JP 15372288 U JP15372288 U JP 15372288U JP H0273745 U JPH0273745 U JP H0273745U
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit package
attached
terminals
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15372288U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15372288U priority Critical patent/JPH0273745U/ja
Publication of JPH0273745U publication Critical patent/JPH0273745U/ja
Pending legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図a,bはそれぞれ本考案の第1の実施例
を示す上面図、側面図、第2図a,bはそれぞれ
本考案の第2の実施例を示す上面図、側面図、第
3図は第2の実施例をプリント基板に実装した場
合の一例を示す上面図、第4図a,bはそれぞれ
従来の集積回路パツケージの構造の一例を示す上
面図、側面図、第5図は従来の集積回路パツケー
ジをプリント基板に実装した場合の一例を示す上
面図である。 11,12,13,14…集積回路パツケージ
、21,22,23,24…端子、31a,31
b,32a,32b,33…辺、40,41…プ
リント基板、42,43…パターン、51,53
…中央線。
Figures 1a and b are a top view and a side view, respectively, showing a first embodiment of the present invention, and Figures 2a and b are a top view, a side view, and a third figure, respectively, showing a second embodiment of the present invention. The figure is a top view showing an example of the second embodiment mounted on a printed circuit board, FIGS. 4a and 4b are top and side views showing an example of the structure of a conventional integrated circuit package, and FIG. FIG. 2 is a top view showing an example of a conventional integrated circuit package mounted on a printed circuit board. 11, 12, 13, 14... integrated circuit package, 21, 22, 23, 24... terminal, 31a, 31
b, 32a, 32b, 33... Side, 40, 41... Printed circuit board, 42, 43... Pattern, 51, 53
…Chuo Line.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 正方形又は長方形の集積回路パツケージの互い
に対向する辺の各端子が対向する辺に取付けられ
た端子の隣接する端子間に対応する位置に取付け
られていることを特徴とする集積回路パツケージ
の構造。
A structure of an integrated circuit package, characterized in that each terminal on opposite sides of a square or rectangular integrated circuit package is attached at a position corresponding to between adjacent terminals of terminals attached to the opposite side.
JP15372288U 1988-11-25 1988-11-25 Pending JPH0273745U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15372288U JPH0273745U (en) 1988-11-25 1988-11-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15372288U JPH0273745U (en) 1988-11-25 1988-11-25

Publications (1)

Publication Number Publication Date
JPH0273745U true JPH0273745U (en) 1990-06-05

Family

ID=31429814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15372288U Pending JPH0273745U (en) 1988-11-25 1988-11-25

Country Status (1)

Country Link
JP (1) JPH0273745U (en)

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