JPH0269002A - Microwave and millimeter wave accumulating equipment - Google Patents

Microwave and millimeter wave accumulating equipment

Info

Publication number
JPH0269002A
JPH0269002A JP63221820A JP22182088A JPH0269002A JP H0269002 A JPH0269002 A JP H0269002A JP 63221820 A JP63221820 A JP 63221820A JP 22182088 A JP22182088 A JP 22182088A JP H0269002 A JPH0269002 A JP H0269002A
Authority
JP
Japan
Prior art keywords
circuit
microwave
millimeter wave
substrate
bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63221820A
Other languages
Japanese (ja)
Inventor
Masayuki Ishizaki
石崎 正之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP63221820A priority Critical patent/JPH0269002A/en
Publication of JPH0269002A publication Critical patent/JPH0269002A/en
Pending legal-status Critical Current

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  • Waveguides (AREA)
  • Microwave Amplifiers (AREA)

Abstract

PURPOSE:To miniaturize and simplify the substrate of a microwave and millimeter wave integrated circuit(MIC) by providing bias circuits on the guiding body plate of a connection circuit which is conventionally provided for inputting and outputting a bias from and to the outside. CONSTITUTION:The input line of an input matching circuit 115 and the line of an output matching circuit 116 are respectively connected with bias circuits 117 by means of connecting gold lines 212. A micro-strip line 119 is also connected similarly. The bias circuits 117 are provided on the guiding body plate of a micro-strip line between a package side wall 118 and substrate housing space 114. This arrangement is adopted in order to utilize the space of the guiding body plate of the micro-strip line 119 which is conventionally provided for the connection with a circuit on an MIC substrate. Since the bias circuits 117 are provided on the guiding body plate, it becomes unnecessary to provide the bias circuits 117 on the NIC substrate and the MIC substrate can be miniaturized.

Description

【発明の詳細な説明】 〔概要 〕 マイクロ波からミリ波に及ぶ周波数帯の集積装置に関し
、特に能動素子を含むパッケージ化されたマイクロ波・
ミリ波集積回路と、誘電体板と該誘電体板上に設けられ
た伝送線路からなりパッケージ内から外部に延びる接続
回路と、外部から前記接続回路を介して送られるバイア
スを能動素子に与えるバイアス回路からなるマイクロ波
・ミリ波集積装置に関し、 MIC基板を小型化、簡略化し、かつパッケージ自体、
ひいては集積装置自体を小型化し高周波に対応可能なマ
イクロ波・ミリ波集積装置の提供を目的とし、 前記バイアス回路が前記接続回路の誘電体板上に設けら
れているマイクロ波・ミリ波集積装置を構成する。
[Detailed Description of the Invention] [Summary] It relates to integrated devices in frequency bands ranging from microwaves to millimeter waves, particularly packaged microwave/microwave devices containing active elements.
A millimeter wave integrated circuit, a connection circuit consisting of a dielectric plate and a transmission line provided on the dielectric plate and extending from inside the package to the outside, and a bias that is sent from the outside via the connection circuit to the active element. Regarding microwave/millimeter wave integrated devices consisting of circuits, the MIC substrate is miniaturized and simplified, and the package itself is
Furthermore, with the aim of providing a microwave/millimeter wave integrated device that can miniaturize the integrated device itself and can handle high frequencies, the present invention provides a microwave/millimeter wave integrated device in which the bias circuit is provided on the dielectric plate of the connection circuit. Configure.

〔産業上の利用分野 〕[Industrial application field]

マイクロ波からミリ波に及ぶ周波数帯の集積装置に関す
る。
It relates to integrated devices for frequency bands ranging from microwaves to millimeter waves.

〔従来の技術 〕[Conventional technology]

マイクロ波・ミリ波集積回路を使用する場合、空気・ゴ
ミ・水分等の影響を避け、信顛性・性能の向上を目的と
してマイクロ波・ミリ波集積回路をパッケージ化する。
When using microwave/millimeter wave integrated circuits, they are packaged to avoid the effects of air, dust, moisture, etc., and to improve reliability and performance.

 第3図にマイクロ波・ミリ波集積装置の従来例を示す
。図中513はガリウム・砒素トランジスタ(CaAs
 FET) 、514はマイクロ波・ミリ波集積回路用
基板(MIC基板)、515は入力整合回路、516は
出力整合回路、517はバイアス回路、518はパッケ
ージ側壁である。入力整合回路515.出力整合回路5
16.GaAs FET513がマイクロ波・ミリ波集
積回路(M I C回路)に相当するものである。この
マイクロ波・ミリ波集積回路にバイアスを与え不要周波
数を除去する為にMIC基板上にバイアス回路が設けら
れている。
FIG. 3 shows a conventional example of a microwave/millimeter wave integrated device. In the figure, 513 is a gallium arsenide transistor (CaAs).
FET), 514 is a microwave/millimeter wave integrated circuit substrate (MIC substrate), 515 is an input matching circuit, 516 is an output matching circuit, 517 is a bias circuit, and 518 is a package side wall. Input matching circuit 515. Output matching circuit 5
16. The GaAs FET 513 corresponds to a microwave/millimeter wave integrated circuit (MIC circuit). A bias circuit is provided on the MIC substrate in order to bias this microwave/millimeter wave integrated circuit and remove unnecessary frequencies.

第4,5図にマイクロ波・ミリ波集積回路のパッケージ
の例を示す。第4.5図で(a)はパッケージの蓋を取
った状態を真上からみたもの、(b)は側面図、(c)
はA−A、B−Bでの断面図である。図中311は電源
端子、312は高周波端子、314は基板収容スペース
、318はパッケージ側壁、319はパッケージの蓋、
320はパッケージキャリア、321はマイクロストリ
ップ線路である。
Figures 4 and 5 show examples of packages for microwave/millimeter wave integrated circuits. In Figure 4.5, (a) is a view from directly above with the package lid removed, (b) is a side view, and (c) is a side view.
is a sectional view taken along line AA and line BB. In the figure, 311 is a power terminal, 312 is a high frequency terminal, 314 is a board storage space, 318 is a package side wall, 319 is a package lid,
320 is a package carrier, and 321 is a microstrip line.

第3.4図からもわかるように、パッケージ化されると
外部から入力及び外部への出力のために外部との接続線
路、ここではマイクロストリップ線路321が必要とな
る。
As can be seen from FIG. 3.4, when packaged, a connection line with the outside, in this case a microstrip line 321, is required for input from the outside and output to the outside.

〔発明が解決しようとする課題 〕[Problem to be solved by the invention]

金属でできたパッケージ内は導波管と同様と考えられ、
ある周波数以上で導波管モード(パッケージ内空間を飛
ぶ波)により共振することがある。
The inside of a package made of metal is considered to be similar to a waveguide,
At frequencies above a certain level, resonance may occur due to waveguide mode (waves traveling through the space inside the package).

従って通常使用周波数帯以上で共振が発生するような小
さいのパッケージを使用してこの現象を避けてきた。
Therefore, this phenomenon has been avoided by using small packages that generate resonance above the frequency band normally used.

しかし、周波数が高くなる程波長は短くなるために、周
波数が高(なるにつれてパッケージの形状を増々小さく
しなければならないにもかかわらず、MIC基板上のバ
イアス回路が占める割合がかなり高<MIC基板を小型
化できないという問題を生じていた。
However, as the frequency becomes higher, the wavelength becomes shorter, so even though the package shape must be made smaller and smaller as the frequency becomes higher, the proportion of the bias circuit on the MIC substrate is quite high. The problem was that it was not possible to downsize the

本発明は、MIG基板を小型化、簡略化し、かつパッケ
ージ自体、ひいては集積装置自体を小型化し高周波に対
応可能なマイクロ波・ミリ波集積装置の提供を目的とす
る。
An object of the present invention is to provide a microwave/millimeter wave integrated device capable of supporting high frequencies by miniaturizing and simplifying the MIG substrate, reducing the size of the package itself, and by extension the integrated device itself.

設ける必要がなくなり、従来に比べMIC基板を小型化
、簡略化できる。またMIC基板を小型化することによ
りパッケージ自体も小型化でき、高周波に対応可能なマ
イクロ波・ミリ波集積装置が構成できる。
There is no need to provide one, and the MIC board can be made smaller and simpler than before. Furthermore, by downsizing the MIC board, the package itself can be downsized, and a microwave/millimeter wave integrated device capable of handling high frequencies can be configured.

〔課題を解決するための手段 〕[Means to solve the problem]

第1図に本発明の原理図を示す。図中1はパッケージ、
2は接続回路、3はマイクロ波・ミリ波集積回路、4は
バイアス回路、5は入出力線路である。
FIG. 1 shows a diagram of the principle of the present invention. 1 in the figure is the package,
2 is a connection circuit, 3 is a microwave/millimeter wave integrated circuit, 4 is a bias circuit, and 5 is an input/output line.

従来MIC基板上に設けられその締める割合が高く問題
を生じていたバイアス回路4を、従来から外部からのバ
イアスの入出力のために設けられていた接続回路2の誘
電体板上に設けてマイクロ波・ミリ波集積装置を構成す
る。
The bias circuit 4, which was conventionally provided on the MIC board and caused problems due to its high tightening rate, is now installed on the dielectric plate of the connection circuit 2, which has conventionally been provided for inputting and outputting external bias. Configure a wave/millimeter wave integration device.

〔作用 〕[Effect]

前記手段の如くバイアス回路を誘電体板上に設けること
により、MIC基板上にバイアス回路を〔実施例 〕 本発明の実施例を第2図(a)に示す。図中111は電
源端子、112は高周波端子、113はGaAsFET
、114は基板収容スペース、115は入力整合回路、
116は出力整合回路、117はバイアス回路、118
はパッケージ側壁、119はマイクロストリップ線路(
原理図での接続回路2に相当する)、120はパッケー
ジキャリアで、本図はパッケージの蓋を取った状態を真
上から見た図である。入力整合回路115の入力線路及
び出力整合回路116の線路はそれぞれバイアス回路1
17と接続金線212により接続されている。マイクロ
ストリップ線路119も同様である。
By providing a bias circuit on a dielectric plate as in the above-mentioned means, a bias circuit can be formed on a MIC substrate. [Embodiment] An embodiment of the present invention is shown in FIG. 2(a). In the figure, 111 is a power supply terminal, 112 is a high frequency terminal, and 113 is a GaAsFET.
, 114 is a board storage space, 115 is an input matching circuit,
116 is an output matching circuit, 117 is a bias circuit, 118
is the package side wall, 119 is the microstrip line (
(corresponding to the connection circuit 2 in the principle diagram), 120 is a package carrier, and this figure is a view from directly above with the package lid removed. The input line of the input matching circuit 115 and the line of the output matching circuit 116 are connected to the bias circuit 1, respectively.
17 and is connected by a connecting gold wire 212. The same applies to the microstrip line 119.

本実施例では、バイアス回路117は図の如くパッケー
ジ側壁118と基板収容スペース114の間とのマイク
ロストリップ線路の誘電体板に設けられている。これは
従来からMIC基板上の回路との接続のために設けられ
ている前記マイクロストリップ線路119の誘電体板の
スペースを利用したものである。前記バイアス回路11
7を前記誘電体板上に設けたことにより、MIC基板上
にはバイアス回路117を設ける必要がな(なり、MI
C基板を小型化できることになる。
In this embodiment, the bias circuit 117 is provided on the dielectric plate of the microstrip line between the package side wall 118 and the substrate accommodation space 114 as shown in the figure. This utilizes the space of the dielectric plate of the microstrip line 119, which has been conventionally provided for connection with the circuit on the MIC board. The bias circuit 11
7 on the dielectric plate, there is no need to provide the bias circuit 117 on the MIC substrate (therefore, the MI
This means that the C board can be downsized.

第2図(b)、(C)にバイアス回路117の例を示す
。マイクロ波・ミリ波集積装置では、使用される周波数
によりバイアス回路のスタップ213の長さを変えなけ
ればならない。従来はMIC基板上にMIC回路といっ
しょにエツチングされその際に長さを調節していた。本
実施例では使用される周波数によりスタップ213の長
さを接続金線によって先のスタンプ213に接続するこ
とによりスタップ213の長さを変えて、幅広い周波数
帯に対応出来るよう構成されている。(b)が周波数が
高い場合で、(C)が周波数が低い場合である。
Examples of the bias circuit 117 are shown in FIGS. 2(b) and 2(C). In microwave/millimeter wave integrated devices, the length of the bias circuit's tap 213 must be changed depending on the frequency used. Conventionally, it was etched on the MIC board together with the MIC circuit, and the length was adjusted at that time. In this embodiment, the length of the stud 213 is changed depending on the frequency to be used by connecting the stamp 213 to the previous stamp 213 with a connecting gold wire, so that it can correspond to a wide range of frequency bands. (b) is a case where the frequency is high, and (C) is a case where the frequency is low.

以上実施例ではバイアス回路117がパッケージ内のマ
イクロストリップ線路119の誘電体板上に設けられて
いるが、バイアス回路117からMIC回路への引き込
み線路が長くなっても影響がない場合は、パッケージ外
の誘電体板上にバイアス回路117を設けることも可能
である。また本発明は実施例で使用している第4図の電
源端子311と高周波端子312が直角方向に存在する
パッケージだけでなく第5図の電源端子311と高周波
端子312が平行方向に存在するパッケージ等にも対応
可能である。
In the above embodiments, the bias circuit 117 is provided on the dielectric plate of the microstrip line 119 inside the package, but if there is no effect even if the lead-in line from the bias circuit 117 to the MIC circuit becomes long, it is possible to remove the bias circuit 117 from outside the package. It is also possible to provide the bias circuit 117 on the dielectric plate. Furthermore, the present invention applies not only to the package in which the power terminal 311 and the high-frequency terminal 312 are present in a perpendicular direction as shown in FIG. It is also possible to correspond to the following.

〔発明の効果 〕〔Effect of the invention 〕

本発明により、バイアス回路を接続回路の誘電体板上に
設けることにより、MIC基板を小型化。
According to the present invention, the MIC board can be made smaller by providing the bias circuit on the dielectric plate of the connection circuit.

簡略化できるとともにパッケージをも小型化できる。従
ってパッケージ内の共振の心配もなく、高周波に対応可
能なマイクロ波・ミリ波集積装置を提供できる。
It can be simplified and the package can also be made smaller. Therefore, it is possible to provide a microwave/millimeter wave integrated device that can handle high frequencies without worrying about resonance within the package.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の原理図 第2図は本発明の実施例 第3図は従来例 第4.5図はパッケージの例である。 119゜ 120゜ 212 ・ 213 ・ 211・・・マイクロストリップ線路 320・・・パッケージキャリア ・・接続金線 ・・スタンプ 図中 1・・・パッケージ  2・・・接続回路3・・・マイ
クロ波・ミリ波集積回路 4・・・バイアス回路 5・・・入出力線路1.11,
311,511・・・電源端子11.2,312,51
2・・・高周波端子113.513 ・・・GaAsF
ET114・・・基板収容スペース 115.515・・・入力整合回路 116.516・・・出力整合回路 117.517・・・バイアス回路
FIG. 1 shows the principle of the present invention. FIG. 2 shows an embodiment of the invention. FIG. 3 shows a conventional example. FIG. 4.5 shows an example of a package. 119゜120゜212 ・ 213 ・ 211 ... Microstrip line 320 ... Package carrier ... Connection gold wire ... Stamp 1 in the diagram 1 ... Package 2 ... Connection circuit 3 ... Microwave, mm Wave integrated circuit 4...bias circuit 5...input/output line 1.11,
311, 511...Power terminal 11.2, 312, 51
2...High frequency terminal 113.513...GaAsF
ET114...Substrate accommodation space 115.515...Input matching circuit 116.516...Output matching circuit 117.517...Bias circuit

Claims (1)

【特許請求の範囲】 能動素子を含むパッケージ化されたマイクロ波・ミリ波
集積回路と、誘電体板及び該誘電体板上に設けられた伝
送線路からなりパッケージ内から外部に延びる接続回路
と、外部から前記接続回路を介して送られるバイアスを
能動素子に与えるバイアス回路からなるマイクロ波・ミ
リ波集積装置に於いて、 前記バイアス回路(4)が前記接続回路(2)の誘電体
板上に設けられていることを特徴とするマイクロ波・ミ
リ波集積装置。
[Scope of Claims] A packaged microwave/millimeter wave integrated circuit including an active element, a connection circuit consisting of a dielectric plate and a transmission line provided on the dielectric plate and extending from inside the package to the outside; In a microwave/millimeter wave integrated device comprising a bias circuit that applies a bias sent from the outside via the connection circuit to the active element, the bias circuit (4) is placed on the dielectric plate of the connection circuit (2). A microwave/millimeter wave integration device characterized by:
JP63221820A 1988-09-05 1988-09-05 Microwave and millimeter wave accumulating equipment Pending JPH0269002A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63221820A JPH0269002A (en) 1988-09-05 1988-09-05 Microwave and millimeter wave accumulating equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63221820A JPH0269002A (en) 1988-09-05 1988-09-05 Microwave and millimeter wave accumulating equipment

Publications (1)

Publication Number Publication Date
JPH0269002A true JPH0269002A (en) 1990-03-08

Family

ID=16772699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63221820A Pending JPH0269002A (en) 1988-09-05 1988-09-05 Microwave and millimeter wave accumulating equipment

Country Status (1)

Country Link
JP (1) JPH0269002A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7990223B1 (en) 2010-05-31 2011-08-02 Kabushiki Kaisha Toshiba High frequency module and operating method of the same
US8912647B2 (en) 2010-12-07 2014-12-16 Kabushiki Kaisha Toshiba Semiconductor device for smoothing the voltage of the end face of a drain of a high frequency semiconductor chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7990223B1 (en) 2010-05-31 2011-08-02 Kabushiki Kaisha Toshiba High frequency module and operating method of the same
US8912647B2 (en) 2010-12-07 2014-12-16 Kabushiki Kaisha Toshiba Semiconductor device for smoothing the voltage of the end face of a drain of a high frequency semiconductor chip

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