JPH0794649A - Gaasfet package - Google Patents
Gaasfet packageInfo
- Publication number
- JPH0794649A JPH0794649A JP23441993A JP23441993A JPH0794649A JP H0794649 A JPH0794649 A JP H0794649A JP 23441993 A JP23441993 A JP 23441993A JP 23441993 A JP23441993 A JP 23441993A JP H0794649 A JPH0794649 A JP H0794649A
- Authority
- JP
- Japan
- Prior art keywords
- gaasfet
- package
- gate terminal
- terminal
- matching circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Junction Field-Effect Transistors (AREA)
- Amplifiers (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】この発明は、マイクロ波帯増幅器
に用いられる低雑音GAASFETパッケージに関する
ものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a low noise GAASFET package used in a microwave band amplifier.
【0002】[0002]
【従来の技術】従来のGAASFETは、ゲート端子1
本,ドレイン端子1本,ソース端子2本を有し、前記G
AASFETのゲート幅は、リード幅0.5mm,リー
ド長4mmのパッケージとなっている。(例えばNEC
半導体カタログNE76084)図2は従来のGAAS
FETのパッケージを示す外形図である。図2において
GAASFET1,GAASFETのゲート2,端子
2,GAASFETのドレイン端子3,GAASFET
のソース端子4が示されている。2. Description of the Related Art A conventional GAASFET has a gate terminal 1
And a drain terminal, and a source terminal are two.
The gate width of the AASFET is a package having a lead width of 0.5 mm and a lead length of 4 mm. (Eg NEC
Semiconductor Catalog NE76084) Figure 2 shows the conventional GAAS
It is an outline view showing a package of FET. In FIG. 2, GAASFET 1, gate 2 of GAASFET 2, terminal 2, drain terminal 3 of GAASFET 3, GAASFET
Source terminal 4 is shown.
【0003】上述のGAASFETを用いたマイクロ波
帯増幅器では、前記GAASFETのゲート端子及びド
レイン端子にそれぞれマイクロストリップ線路から成る
分布定数整合回路を接続し、ソース端子を接地させると
いうマイクロストリップ回路構成が知られている。GA
ASFETを用いたマイクロ波帯増幅器の一実施例を図
3に示す。図3において、5は、マイクロストリップ線
路,6は、リース接地用マイクロストリップパターン,
7は基板,8はキャリアである。入力側整合回路5a
は、ゲート端子の次に特性インピーダンスの低い(リー
ド幅に比べて線路幅が広い)線路が接続され、その次に
特性インピーダンスの高い(リード幅に比べて線路幅が
狭い)線路が接線されるという2段構成になっている。In the microwave band amplifier using the GAASFET described above, there is known a microstrip circuit configuration in which a distributed constant matching circuit composed of a microstrip line is connected to the gate terminal and the drain terminal of the GAASFET and the source terminal is grounded. Has been. GA
FIG. 3 shows an example of a microwave band amplifier using ASFET. In FIG. 3, 5 is a microstrip line, 6 is a microstrip pattern for lease grounding,
Reference numeral 7 is a substrate, and 8 is a carrier. Input side matching circuit 5a
Is connected to the line with the next lowest characteristic impedance (wider than the lead width) next to the gate terminal, and then connected to the line with the next highest characteristic impedance (narrower line width than the lead width). It has a two-tiered structure.
【0004】[0004]
【発明が解決しようとする課題】従来のGAASFET
パッケージでは、FETのゲート端子の特性インピーダ
ンスが低いためゲート端子にインピーダンス変換器を接
続して、FET特性の雑音パラメータPoptの最良点
を得ようとすると、その雑音指数(以下NF)整合回路
は2段構成以上となってしまう課題があった。この発明
は上記の課題を解決するためのもので、NFの最良値を
得、かつNF整合回路が1段となるGAASFETのパ
ッケージの実現が目的である。[Problems to be Solved by the Invention] Conventional GAASFET
In the package, since the characteristic impedance of the gate terminal of the FET is low, if an impedance converter is connected to the gate terminal to obtain the best point of the noise parameter Popt of the FET characteristic, the noise figure (hereinafter NF) matching circuit is 2 There was a problem that it was more than a stepped structure. The present invention is intended to solve the above problems, and an object thereof is to realize a GAASFET package in which the best value of NF is obtained and the NF matching circuit has one stage.
【0005】[0005]
【課題を解決するための手段】上述した問題点を解決す
るため本発明によるGAASFETのパッケージは、ゲ
ート端子のリード幅0.2mm以下リード長10mmと
いう特徴を持つ。In order to solve the above problems, the GAASFET package according to the present invention is characterized in that the lead width of the gate terminal is 0.2 mm or less and the lead length is 10 mm.
【0006】[0006]
【実施例】本発明について、図面を参照して説明する。
図1は本発明の実施例のGAASFETのパッケージの
外形図である。図1において1はFET,2はゲート端
子,3はドレイン端子,4はリース端子である。本発明
によるGAASFETのパッケージにおいてリード端子
の配置は従来のものと変わりないが、ゲート端子の幅の
みを0.2mm以下とすることで高周波増幅器において
GAASFETのゲート端子に接続されるマイクロスト
リップ線路を自由に選択することができ、最適なNF整
合回路が実現できる。また、ゲート端子を高インピーダ
ンス化したことで端子そのものを整合回路の一部として
使え、NF整合回路を1段構成とすることができる。ゲ
ート端子の長さとしては長い程低い周波数帯まで適用で
きるが、0.2m幅と細いため物理的強度を考慮し10
mm以上とすることが望ましい。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described with reference to the drawings.
FIG. 1 is an outline view of a GAASFET package according to an embodiment of the present invention. In FIG. 1, 1 is a FET, 2 is a gate terminal, 3 is a drain terminal, and 4 is a lease terminal. In the package of the GAASFET according to the present invention, the layout of the lead terminals is the same as that of the conventional one, but by setting only the width of the gate terminal to 0.2 mm or less, the microstrip line connected to the gate terminal of the GAASFET can be freely set in the high frequency amplifier. The optimum NF matching circuit can be realized. Further, since the gate terminal has a high impedance, the terminal itself can be used as a part of the matching circuit, and the NF matching circuit can be configured in one stage. As the length of the gate terminal is longer, the lower frequency band can be applied, but the physical strength is taken into consideration due to its thin width of 0.2 m.
It is desirable to set it to mm or more.
【0007】[0007]
【発明の効果】以上のように、本発明による低雑音GA
ASFETのパッケージは前記FETのゲート端子のリ
ード幅0.2mm以下,リード長10mmとしたため、
最適かつ小型のNF整合回路が得られるという効果があ
る。As described above, the low noise GA according to the present invention
Since the ASFET package has a lead width of 0.2 mm or less and a lead length of 10 mm at the gate terminal of the FET,
The effect is that an optimum and small NF matching circuit can be obtained.
【図1】本発明の実施例によるGAASFETの外形
図。FIG. 1 is an outline view of a GAASFET according to an embodiment of the present invention.
【図2】従来のGAASFETの外形図。FIG. 2 is an external view of a conventional GAASFET.
【図3】従来のGAASFETを用いたマイクロ波帯増
幅器の構成図。FIG. 3 is a configuration diagram of a microwave band amplifier using a conventional GAASFET.
1 FET 2 ゲート端子 3 ドレイン端子 4 リース端子 5 マイクロストリップ線路 6 ソース接地用マイクロストリップパターン 7 基板 8 キャリア 1 FET 2 Gate Terminal 3 Drain Terminal 4 Lease Terminal 5 Microstrip Line 6 Microstrip Pattern for Source Grounding 7 Substrate 8 Carrier
Claims (1)
を有する円形及び方形形状のGAASFETの気密封止
パッケージにおいて、ゲート端子をリード幅0.2mm
以下、リード長10mm以上とすることを特徴とするG
AASFETパッケージ。1. A hermetically sealed package of circular and rectangular GAASFETs having a gate terminal, a drain terminal, and a source terminal, wherein the lead width of the gate terminal is 0.2 mm.
Hereinafter, the lead length is 10 mm or more
AASFET package.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23441993A JPH0794649A (en) | 1993-09-21 | 1993-09-21 | Gaasfet package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23441993A JPH0794649A (en) | 1993-09-21 | 1993-09-21 | Gaasfet package |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0794649A true JPH0794649A (en) | 1995-04-07 |
Family
ID=16970727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23441993A Pending JPH0794649A (en) | 1993-09-21 | 1993-09-21 | Gaasfet package |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0794649A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7486157B2 (en) | 2005-09-14 | 2009-02-03 | Kabushiki Kaisha Toshiba | Package for high frequency waves containing high frequency electronic circuit |
KR100895476B1 (en) * | 2005-09-14 | 2009-05-06 | 가부시끼가이샤 도시바 | Package for high frequency waves containing high frequency electronic circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01231356A (en) * | 1988-03-11 | 1989-09-14 | Nec Corp | Semiconductor device |
-
1993
- 1993-09-21 JP JP23441993A patent/JPH0794649A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01231356A (en) * | 1988-03-11 | 1989-09-14 | Nec Corp | Semiconductor device |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7486157B2 (en) | 2005-09-14 | 2009-02-03 | Kabushiki Kaisha Toshiba | Package for high frequency waves containing high frequency electronic circuit |
KR100895476B1 (en) * | 2005-09-14 | 2009-05-06 | 가부시끼가이샤 도시바 | Package for high frequency waves containing high frequency electronic circuit |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19961008 |