JP2570638B2 - Semiconductor package - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency transistor package used in a microwave band amplifier, and more particularly to a high-frequency transistor package such as a GaAs FET.

[0002]

2. Description of the Related Art Conventional microwave band low noise GaAsFE
As shown in FIG. 3, the structure of a package usually used at T is such that one gate terminal 34 and one drain terminal 35 are connected.
And two source terminals 36a and 36b. In addition, these terminals are connected to an elongated ribbon-shaped lead so as to be radially cross-shaped. This structure is described in, for example, JP-A-01-216608.

FIG. 1 will be described in further detail. 1
Is a ceramic cap for hermetic sealing, 2 is a substrate for an FET substrate, 3 is a bare chip of an FET, 34 is a gate lead terminal, 35 is a drain lead terminal, 36 is a lease lead terminal, and 11 is a bare chip and each lead terminal. It is a bonding wire. Here, the portion of each lead terminal projecting from the package has an elongated shape with a width W and a length L. Next, FIG. 4 shows an example in which a microwave band amplifier is configured using the above-mentioned GaAs FET. In FIG.
Reference numerals a and 7b denote a microstrip pattern for grounding the source, 8a and 8b denote microstrip lines, 9 denotes a dielectric substrate, and 10 denotes a ground conductor. The input side matching circuit 8a has a width W '(> W) for soldering the gate lead terminals,
The configuration is such that a microstrip line having a length L '(> L) is connected first, and thereafter a matching circuit pattern is connected. The package of the prior art described above is 1
1999 edition NEC Data Book "Microwave Device"
The description of the package is described on pages 607 to 615.

[0004]

SUMMARY OF THE INVENTION Conventional GaAs FET
In this package, the distance between the bare chip gate and source / drain electrodes of the FET and the microstrip pattern connected to the lead terminal of the FET is long. In comparison with the above, there is a problem that the high-frequency characteristics of the FET deteriorate. Further, in order to obtain an optimum matching circuit for obtaining a low-noise, high-gain amplifier, it is necessary to connect a line having a high characteristic impedance as close to the base of the gate terminal as possible. However, in the conventional package structure, a microstrip pattern wider than the lead width is always inserted for soldering, so a microstrip pattern with a high characteristic impedance, that is, a narrower width than the lead width, is connected from the base of the gate terminal. There was also a problem that it was difficult to do so.

[0005] The present invention has been developed to solve the above-mentioned problems.
It is an object of the present invention to provide a high-frequency transistor package that can reduce an inductance component and facilitate the configuration of a matching circuit.

[0006]

A semiconductor package according to the present invention comprises a semiconductor chip mounted on a dielectric band substrate, an electrode on the dielectric band connected to the semiconductor chip by a bonding wire, and In a semiconductor package including a chip, the electrode, and a cap that hermetically seals, the electrode is formed by notching a side portion of the dielectric band substrate and performing solder plating on a surface of a concave portion. And

[0007]

According to the present invention, in a substrate on which a semiconductor bare chip is described, a portion to which a terminal is connected is cut out in a concave shape, and the cutout portion is side-plated to form each electrode portion. Since the lead terminal of each electrode is not required, the distance from the microstrip pattern connected to the external circuit can be shortened, and the inductance component can be reduced.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described with reference to the drawings.
FIG. 1 is a structural diagram of a GaAs FET according to one embodiment of the present invention. In FIG. 1, 1 is a ceramic cap for hermetic sealing,
2 is an FET chip substrate, 3 is a bare FET chip, 4
Is a side-plated source terminal, 11 is a bonding wire connecting each electrode on the bare chip and each terminal, 12
Are electrodes of a gate terminal 4, a drain terminal 5, and a source terminal.

In FIG. 1, a gate terminal 4, a drain terminal 5 and a source terminal 6 of a GaAs FET package are shown.
a and 6b have the same shape for ease of manufacture. Here, for example, the source terminal 6b will be described.
The electrode 12 of the source terminal has a semi-cylindrical shape, and a solder plating 13 is formed on the surface thereof. This shape can be easily formed by cutting the substrate 2 into a semi-cylindrical shape. In addition to the source terminal 6b, the other three terminals have the same shape, and each electrode of the bare chip 3 and the bonding wire 1
1 can be connected. As a result, since each semi-cylindrical electrode 12 is directly connected to the bottom surface of the FET substrate 2, the distance from the microstrip pattern connected to the lead terminal of the FET is shortened, and the inductance component is reduced.

[0010] The hermetic sealing ceramic cap 1
In order to prevent the sealing performance from deteriorating due to the cutout of the substrate 2 in a semi-cylindrical shape, the sealing is performed avoiding the semicircular cutout portions of the respective electrodes. Specifically, the shape of the hermetic sealing ceramic cap 1 has a diameter smaller than the diameter of the circle connecting the vertices of the semi-cylindrical columns of the respective electrodes.

FIG. 2 shows a Ga having a package according to the present invention.
1 shows an embodiment of a microwave band amplifier using AsFET.

In FIG. 2, 7a and 7b are microstrip patterns for grounding the source, 8a and 8b are microstrip lines, 9 is a dielectric band substrate, and 10 is a ground conductor. Since the pattern for soldering the gate terminal 4 is minute in the input matching circuit 8a, a microstrip line having a high characteristic impedance can be connected from the base of the gate terminal 4.

As described above, in this embodiment, GaAs is used.
Although an electrode structure of each of the gate, source, and drain lead terminals of the transistor is formed in a semi-cylindrical shape using an FET transistor, the present invention is not limited to this.

That is, the present invention is not limited to GaAs FET transistors, but includes general transistors and microwave integrated circuits (M
IC).

The electrode structure may be concave if the electrode is formed in a part of a dielectric band substrate on which a bare chip is mounted and a predetermined shape is cut out.

[0016]

As described above, according to the present invention, in the substrate on which the FET chip is mounted, the portion where the gate, resource, and drain lead terminals are connected is cut inward in a semi-cylindrical shape. Since that part was plated on the side and each electrode part was formed, each electrode on the FET chip and FE
Since the distance from the microstrip pattern connected to T can be shortened, there is an effect that the inductance component is reduced.

Also, since the pattern for soldering each electrode portion is very small, an arbitrary circuit pattern can be connected from the base of the electrode, so that the matching circuit can be designed freely. Therefore, the conventional GaAs FET
In comparison with the above, there is an effect that the best point of the noise parameter can be easily obtained, and an amplifier having a good noise figure can be designed.

[Brief description of the drawings]

FIG. 1 is a structural diagram of a high-frequency transistor such as a GaAs FET according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a microwave band amplifier using a GaAs FET package according to an embodiment of the present invention.

FIG. 3 is a structural diagram of a conventional GaAs FET.

FIG. 4 is a configuration diagram of a microwave band amplifier using a conventional GaAs FET.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 Hermetic sealing ceramic cap 2 FET chip substrate 3 FET bare chip 4 Side-plated gate terminal 5 Side-plated drain terminal 6 Side-plated source terminal 7 Microstrip pattern for grounding source 8 Microstrip line 9 Dielectric Body substrate 10 Ground conductor 11 Bonding wire 12 Electrode 13 Solder plating 34 Gate lead terminal 35 Drain lead terminal 36 Source lead terminal

Claims (3)

(57) [Claims] 1. A semiconductor chip mounted on a dielectric substrate, an electrode on the dielectric substrate connected to the semiconductor chip by a bonding wire, and a cap for hermetically sealing the semiconductor chip and the electrode. Wherein the electrode is formed by solder plating on a surface of a concave portion formed by cutting a side surface of the dielectric substrate. 2. The semiconductor package according to claim 1, wherein the cap is a hermetic sealing cap that encloses the semiconductor chip and the electrode while avoiding the concave cutout. 3. The semiconductor package according to claim 1, wherein said semiconductor chip is used for a microwave band high frequency circuit.