JPH0266977A - Semiconductor diode - Google Patents
Semiconductor diodeInfo
- Publication number
- JPH0266977A JPH0266977A JP21876788A JP21876788A JPH0266977A JP H0266977 A JPH0266977 A JP H0266977A JP 21876788 A JP21876788 A JP 21876788A JP 21876788 A JP21876788 A JP 21876788A JP H0266977 A JPH0266977 A JP H0266977A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- impurity concentration
- semiconductor layer
- semiconductor
- conductivity type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 239000012535 impurity Substances 0.000 claims abstract description 31
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 239000000969 carrier Substances 0.000 abstract description 17
- 239000000758 substrate Substances 0.000 abstract description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052710 silicon Inorganic materials 0.000 abstract description 3
- 239000010703 silicon Substances 0.000 abstract description 3
- 230000015572 biosynthetic process Effects 0.000 abstract description 2
- 229910052733 gallium Inorganic materials 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 7
- 238000011084 recovery Methods 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Landscapes
- Thyristors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、一つのpn接合を有し、高速スイッチングの
可能な半導体ダイオードに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor diode having one pn junction and capable of high-speed switching.
pn接合を形成する一方の半導体層と金属電極とをオー
ミックに接続するためには、その半導体層に少数キャリ
アが注入された場合、金属電極側より半導体層側に向か
って多数基板が直ちに注入されて、半導体層に注入され
た少数キャリアが中和されるように多数キャリアに対す
る障壁が形成されていないことと、半導体層に注入され
た少数キャリアを金属電極側に吸収、消滅せしめて、少
数キャリアが半導体層および金属電極間に不必要に蓄積
されないように少数キャリアに対する障壁が形成されて
いないことが要望される。この要望に対応するものとし
て、特公昭59−49711号公報に第2図に示す断面
構造をもつ半導体ダイオードが示されている。この構造
においては、p形半導体層1に接する低不純物濃度n−
層2によってpn接合が形成され、n−層2のpmと反
対側の面上に高不純物濃度のn、 Sl域3およびp″
頚域4が相互に接して設けられている。そして、n +
61域3およびp0領域4の露出表面には金属電極5
がオーミック接触し、カソード電極となっている。In order to ohmically connect one semiconductor layer forming a pn junction with a metal electrode, when minority carriers are injected into the semiconductor layer, majority carriers are immediately injected from the metal electrode side toward the semiconductor layer side. Therefore, a barrier to majority carriers is not formed so that the minority carriers injected into the semiconductor layer are neutralized, and the minority carriers injected into the semiconductor layer are absorbed and annihilated by the metal electrode side. It is desired that no barrier to minority carriers be formed so that minority carriers are not accumulated unnecessarily between the semiconductor layer and the metal electrode. To meet this demand, Japanese Patent Publication No. 59-49711 discloses a semiconductor diode having a cross-sectional structure shown in FIG. 2. In this structure, a low impurity concentration n-
A p-n junction is formed by layer 2, and high impurity concentration n, Sl regions 3 and p'' are formed on the surface of n-layer 2 opposite to pm.
The neck regions 4 are provided in contact with each other. And n +
A metal electrode 5 is provided on the exposed surfaces of the 61 region 3 and the p0 region 4.
is in ohmic contact and serves as a cathode electrode.
一方、n−層2に比して高不純物濃度の9層1の露出表
面には、金属電極6がオーミック接触し、アノード電極
となっている。n−層2に接触するp′領域4は、pJ
ilからn−層2に注入された少数キャリアである正孔
を吸い出す作用を持ち、n−層2に蓄積される正孔の量
を低減させ結果として、ダイオードの逆回復電流を小さ
(し、また逆回復時間も短くする効果を有する。一方、
少数キャリアの吸い出し口としてのp9領域4は第3図
に示すように、金属電極5との間に多数キャリアに対す
る障壁の実質的に存在しないn″領域3の中に分散して
設けられている。On the other hand, a metal electrode 6 is in ohmic contact with the exposed surface of the 9-layer 1, which has a higher impurity concentration than the n-layer 2, and serves as an anode electrode. The p' region 4 in contact with the n-layer 2 has pJ
It has the effect of sucking out holes, which are minority carriers, injected into the n-layer 2 from the il, reducing the amount of holes accumulated in the n-layer 2, and as a result, reducing the reverse recovery current of the diode. It also has the effect of shortening the reverse recovery time.On the other hand,
As shown in FIG. 3, the p9 region 4, which serves as a suction port for minority carriers, is provided dispersedly within the n'' region 3, where there is substantially no barrier to majority carriers between the p9 region 4 and the metal electrode 5. .
半導体ダイオードの逆耐圧が1000 V以上になる場
合、pn接合の一方の側の層、第2図の場合はn−層2
の比抵抗を高く選ぶ必要がある。その結果、n−IW2
の中で逆電圧印加時の空乏層の拡がりが大きくなり、n
−層2の厚さが厚くなる。すなわち、n−Ji2の厚さ
は、空乏層の他端がp゛領域4に達しないように厚くす
る必要がある。ところが、n−層2の厚さが厚くなると
、n−層2の中に蓄積される少数キャリアの総量は必然
的に多くなり、少数キャリアの吸い出し口として作用す
るp”d域を設けても逆回復電流の低減は不十分で、ダ
イオードの高周波スイッチングを行えないという欠点が
ある。When the reverse breakdown voltage of the semiconductor diode is 1000 V or more, the layer on one side of the pn junction, in the case of Figure 2, the n-layer 2
It is necessary to select a high specific resistance. As a result, n-IW2
When a reverse voltage is applied, the depletion layer expands, and n
- The thickness of layer 2 increases. That is, the thickness of n-Ji2 needs to be increased so that the other end of the depletion layer does not reach p' region 4. However, as the thickness of the n-layer 2 increases, the total amount of minority carriers accumulated in the n-layer 2 inevitably increases, and even if a p''d region is provided that acts as a suction port for minority carriers, The drawback is that the reduction in reverse recovery current is insufficient and high frequency switching of the diode cannot be performed.
本発明の課題は、上記の問題を解決し、pn接合を形成
する半導体層のうちの低不純物濃度の第一導電形の層と
金属電極の間に少数キャリアの吸い出し口としての高不
純物濃度の他導電形の層を設けても、半導体層全体の厚
さが著しく厚くなることなく高周波スイッチングを行う
ことのできるようにした半導体ダイオードを提供するこ
とにある。An object of the present invention is to solve the above-mentioned problems, and to provide a layer with high impurity concentration as a suction port for minority carriers between the first conductivity type layer with low impurity concentration in the semiconductor layer forming the pn junction and the metal electrode. An object of the present invention is to provide a semiconductor diode that can perform high-frequency switching without significantly increasing the thickness of the entire semiconductor layer even if layers of other conductivity types are provided.
上記の課題の解決のために、第−R電形の低不純物濃度
の半導体層と第二導電形の高不純物濃度の半導体層とに
より形成されるpn接合を有し、前記第一導電形の半導
体層の反pn接合側面と、側面で互いに隣接しそれぞれ
端面で金属電極にオーミック接触する高不純物濃度の第
一、第二導電形の複数の半導体層領域との間に、第一導
電形でそれらの中間の不純物濃度を有する半導体層が介
在するものとする。In order to solve the above problems, a p-n junction is formed by a low impurity concentration semiconductor layer of the -R conductivity type and a high impurity concentration semiconductor layer of the second conductivity type; A semiconductor layer of the first conductivity type is provided between the anti-pn junction side surface of the semiconductor layer and a plurality of semiconductor layer regions of the first and second conductivity types with high impurity concentrations that are adjacent to each other on the side surfaces and in ohmic contact with the metal electrodes at their respective end surfaces. It is assumed that a semiconductor layer having an impurity concentration between these is interposed.
pn接合を形成する低不純物濃度の第一導電形の層の反
pn接合側に設けられる中間の不純物濃度をもつ第一導
電形の層は、pn接合への逆電圧の印加時に拡がる空乏
層が金属電極への少数キャリア吸い出し口となる第二導
電形の高不純物濃度領域に達するのを防ぐバッファ層と
して働り、シかも、このバッファ層の不純物濃度が中間
濃度であるため、前記第二導電形の領域の少数キャリア
吸い出し能力を大幅に低下させることがない。The first conductivity type layer with an intermediate impurity concentration, which is provided on the anti-pn junction side of the first conductivity type layer with a low impurity concentration forming the pn junction, has a depletion layer that expands when a reverse voltage is applied to the pn junction. It acts as a buffer layer to prevent minority carriers from reaching the high impurity concentration region of the second conductivity type, which serves as a suction port for the metal electrode. The minority carrier extraction ability of the shaped region is not significantly reduced.
第1図(al、(b)は本発明の一実施例を示し、第2
゜第3図と共通の部分には同一の符号が付されている。FIGS. 1(al) and (b) show an embodiment of the present invention, and FIG.
゜The same parts as in Fig. 3 are given the same reference numerals.
第1図(alから明らかなように本実施例では低不純物
濃度n−層2と高不純物濃度のn″領域3およびp″領
域4の間にnバッファ層7が設けられている。この構造
は次の工程で造られる。必要とする耐圧を実現するため
のある高圧抵抗を持つn形シリコン基板の一面からp形
半導体層1を作るために不純物元素としてB、Ga、
もしくはM等を拡散する。シリコン基板の他面から不純
物元素としてP等を拡散して基板そのままのn−N2よ
りも高いnバッファ層7を形成する。このようにしてp
n−n構造、いわゆるpin接合構造のダイオードをま
ず形成する。この時、nバッファ層6があるため、n−
層2の厚さは必要とする定格の逆電圧を印加した場合、
18771層がないダイオードの場合の空乏層の厚さよ
りもうすくなるように選ぶことができる。空乏層の拡が
りはnバッファ層7の中で止まる。nバッファ1iフの
形成後その表面から高不純物濃度を持つn″領域3およ
びp0領域4を第1図世)のように選択的にモザイク状
に、しかもnバッファ層7の深さよりも浅く形成する。As is clear from FIG. 1 (al), in this embodiment, an n-buffer layer 7 is provided between the low impurity concentration n-layer 2 and the high impurity concentration n'' region 3 and p'' region 4. is produced in the following process. B, Ga,
Or spread M etc. P or the like is diffused as an impurity element from the other surface of the silicon substrate to form an n buffer layer 7 having a higher n-N2 than the original substrate. In this way p
First, a diode having an nn structure, a so-called pin junction structure, is formed. At this time, since there is an n buffer layer 6, n-
The thickness of layer 2 is as follows when applying the required rated reverse voltage:
The thickness of the depletion layer can be chosen to be smaller than the thickness of the depletion layer in the case of a diode without the 18771 layer. The expansion of the depletion layer stops within the n-buffer layer 7. After the formation of the n-buffer layer 1i, the n'' region 3 and the p0 region 4 having a high impurity concentration are selectively formed from the surface thereof in a mosaic shape as shown in Figure 1), and at a depth shallower than the depth of the n-buffer layer 7. do.
n″領域3は電子の注入を効率よくするためで、p″領
域4はn−N2中で注入された少数キャリアである正孔
の吸い出し口として働(、nバッファ層7は、その不純
物濃度はn−層2よりも高いが、n 6 ml域3のそ
れより低くしであるので、p0領域からの正孔の吸い出
し効果には悪影響を与えない。また、第1図中)に示す
ようにモザイク状にすることにより、p0領域4の総面
積が大きくなるので、第3図に示した場合より吸い出し
効果が大きくなる。The n'' region 3 is used to efficiently inject electrons, and the p'' region 4 serves as a suction port for holes, which are minority carriers injected in n-N2. is higher than that of the n-layer 2, but lower than that of the n 6 ml region 3, so it does not have a negative effect on the effect of sucking out holes from the p0 region. By forming the p0 region 4 into a mosaic shape, the total area of the p0 region 4 becomes larger, so that the sucking effect becomes larger than in the case shown in FIG.
pIiIlの表面にオーミック接触する金属電極、n″
頭域3およびp″領域4にオーミック接触する金属電極
をそれぞれ設け、アノード電極6.カソード電極5とす
ることにより第1図(alに示す半導体ダイオードが得
られる。もちろん、この実施例のp形、n形を逆にした
半導体ダイオードを形成することもできる。a metal electrode in ohmic contact with the surface of pIiIl, n″
The semiconductor diode shown in FIG. , it is also possible to form an inverted n-type semiconductor diode.
本発明によれば、持分昭和59−49711号公報で公
知の、半導体ダイオードのpn接合を形成する低不純物
濃度の反pn接合側にオーミック接触のためと少数キャ
リア吸い出しのために設ける両導電形の高不純物濃度領
域と前記低不純物濃度層の間に、中間濃度のバッファ層
を介在させることにより、逆方向電圧印加時に低不純物
濃度層に拡がる空乏層を止めることができる。この結果
低不純物濃度層の厚さは従来のものより20%以上薄く
することができ、高耐圧ダイオードの逆回復特性を大幅
に改善し、高周波スイッチング用として利用できるよう
になった。According to the present invention, a double conductivity type is provided for ohmic contact and for sucking out minority carriers on the anti-pn junction side of a low impurity concentration forming a pn junction of a semiconductor diode, which is known from Japanese Patent Publication No. 59-49711. By interposing an intermediate concentration buffer layer between the high impurity concentration region and the low impurity concentration layer, it is possible to stop a depletion layer from expanding to the low impurity concentration layer when a reverse voltage is applied. As a result, the thickness of the low impurity concentration layer can be made 20% or more thinner than the conventional one, which greatly improves the reverse recovery characteristics of high voltage diodes, making them usable for high frequency switching applications.
さらには、本発明に基づく半導体ダイオードに金等の重
金属元素の注入や電子等の高エネルギ粒子線あるいは放
射線の照射を行うことにより、逆回復電流をさらに低下
させることができることも確認された。Furthermore, it has been confirmed that the reverse recovery current can be further reduced by implanting a heavy metal element such as gold or irradiating the semiconductor diode according to the present invention with a high-energy particle beam such as electrons or radiation.
第1図(a)、(b)は本発明の一実施例を示し、(a
lは断面図、(b)は(alの半導体基体のカソード電
極側からみた平面図、第2図は公知の半導体断面図の断
面図、第3図はその半導体基体のカソード電極側からみ
た平面図である。
1:9層、2:n−層、3:n0オーミツク接触領域、
4:p゛少数キャリア吸い出し領域、5:カソード電極
、6:アノード電極、7:nバ第2図
第1図
第3図FIGS. 1(a) and 1(b) show an embodiment of the present invention, and (a)
1 is a cross-sectional view, (b) is a plan view of the (al) semiconductor substrate as seen from the cathode electrode side, FIG. 2 is a cross-sectional view of a known semiconductor cross-sectional view, and FIG. FIG. 1: 9 layer, 2: n-layer, 3: n0 ohmic contact area,
4: p゛minority carrier sucking region, 5: cathode electrode, 6: anode electrode, 7: n bar Fig. 2 Fig. 1 Fig. 3
Claims (1)
の高不純物濃度の半導体層より形成されるpn接合を有
し、前記第一導電形の半導体層の反pn接合側面と、側
面で互いに隣接しそれぞれ端面で金属電極にオーミック
接触する高不純物濃度の第一、第二導電形の複数の半導
体層領域との間に、第一導電形でそれらの中間の不純物
濃度を有する半導体層が介在することを特徴とする半導
体ダイオード。1) having a pn junction formed by a semiconductor layer of a first conductivity type with a low impurity concentration and a semiconductor layer of a second conductivity type with a high impurity concentration, and an anti-pn junction side surface of the semiconductor layer of the first conductivity type; A semiconductor having a first conductivity type and an intermediate impurity concentration between the first and second conductivity type semiconductor layer regions having high impurity concentrations that are adjacent to each other on the side surfaces and in ohmic contact with the metal electrodes at the respective end faces. A semiconductor diode characterized by intervening layers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21876788A JPH0266977A (en) | 1988-09-01 | 1988-09-01 | Semiconductor diode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21876788A JPH0266977A (en) | 1988-09-01 | 1988-09-01 | Semiconductor diode |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0266977A true JPH0266977A (en) | 1990-03-07 |
Family
ID=16725079
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21876788A Pending JPH0266977A (en) | 1988-09-01 | 1988-09-01 | Semiconductor diode |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0266977A (en) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07106605A (en) * | 1993-10-05 | 1995-04-21 | Toyo Electric Mfg Co Ltd | High speed diode |
JP2010506392A (en) * | 2006-10-05 | 2010-02-25 | アーベーベー・テヒノロギー・アーゲー | Power semiconductor devices |
CN101908558A (en) * | 2009-06-04 | 2010-12-08 | 三菱电机株式会社 | Semiconductor device |
DE102011086854A1 (en) | 2010-11-25 | 2012-05-31 | Denso Corporation | Semiconductor device |
JP2012119716A (en) * | 2012-02-06 | 2012-06-21 | Mitsubishi Electric Corp | Semiconductor device |
JP2013008779A (en) * | 2011-06-23 | 2013-01-10 | Toyota Central R&D Labs Inc | Diode |
JP2013051346A (en) * | 2011-08-31 | 2013-03-14 | Toyota Central R&D Labs Inc | Diode, semiconductor device and mosfet |
JP2014241433A (en) * | 2010-05-26 | 2014-12-25 | 三菱電機株式会社 | Semiconductor device |
US10170607B2 (en) | 2015-08-28 | 2019-01-01 | Denso Corporation | Semiconductor device |
JP2021090045A (en) * | 2017-08-31 | 2021-06-10 | イクシス・リミテッド・ライアビリティ・カンパニーIxys, Llc | Charge carrier extraction inverse diode |
-
1988
- 1988-09-01 JP JP21876788A patent/JPH0266977A/en active Pending
Cited By (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07106605A (en) * | 1993-10-05 | 1995-04-21 | Toyo Electric Mfg Co Ltd | High speed diode |
JP2010506392A (en) * | 2006-10-05 | 2010-02-25 | アーベーベー・テヒノロギー・アーゲー | Power semiconductor devices |
DE102010064560B3 (en) * | 2009-06-04 | 2015-10-01 | Mitsubishi Electric Corp. | Semiconductor device |
JP2010283132A (en) * | 2009-06-04 | 2010-12-16 | Mitsubishi Electric Corp | Semiconductor device |
US10749043B2 (en) | 2009-06-04 | 2020-08-18 | Mitsubishi Electric Corporation | Semiconductor device including a trench structure |
US9786796B2 (en) | 2009-06-04 | 2017-10-10 | Mitsubishi Electric Corporation | Semiconductor device having first and second layers with opposite conductivity types |
CN101908558A (en) * | 2009-06-04 | 2010-12-08 | 三菱电机株式会社 | Semiconductor device |
CN101908558B (en) | 2009-06-04 | 2013-01-23 | 三菱电机株式会社 | Semiconductor device |
US9035434B2 (en) | 2009-06-04 | 2015-05-19 | Mitsubishi Electric Corporation | Semiconductor device having first and second portions with opposite conductivity type which contact an electrode |
CN103022092A (en) * | 2009-06-04 | 2013-04-03 | 三菱电机株式会社 | Semiconductor device |
DE102010028978A1 (en) | 2009-06-04 | 2010-12-09 | Mitsubishi Electric Corp. | Semiconductor device |
DE102010028978B4 (en) * | 2009-06-04 | 2014-04-24 | Mitsubishi Electric Corp. | Semiconductor device |
JP2014241433A (en) * | 2010-05-26 | 2014-12-25 | 三菱電機株式会社 | Semiconductor device |
US8648385B2 (en) | 2010-11-25 | 2014-02-11 | Denso Corporation | Semiconductor device |
DE102011086854A1 (en) | 2010-11-25 | 2012-05-31 | Denso Corporation | Semiconductor device |
DE102011086854B4 (en) | 2010-11-25 | 2022-04-21 | Denso Corporation | semiconductor device |
JP2013008779A (en) * | 2011-06-23 | 2013-01-10 | Toyota Central R&D Labs Inc | Diode |
JP2013051346A (en) * | 2011-08-31 | 2013-03-14 | Toyota Central R&D Labs Inc | Diode, semiconductor device and mosfet |
JP2012119716A (en) * | 2012-02-06 | 2012-06-21 | Mitsubishi Electric Corp | Semiconductor device |
US10170607B2 (en) | 2015-08-28 | 2019-01-01 | Denso Corporation | Semiconductor device |
JP2021090045A (en) * | 2017-08-31 | 2021-06-10 | イクシス・リミテッド・ライアビリティ・カンパニーIxys, Llc | Charge carrier extraction inverse diode |
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