JPH0260309A - Recording amplifier for digital signal - Google Patents
Recording amplifier for digital signalInfo
- Publication number
- JPH0260309A JPH0260309A JP21166388A JP21166388A JPH0260309A JP H0260309 A JPH0260309 A JP H0260309A JP 21166388 A JP21166388 A JP 21166388A JP 21166388 A JP21166388 A JP 21166388A JP H0260309 A JPH0260309 A JP H0260309A
- Authority
- JP
- Japan
- Prior art keywords
- current source
- transistor
- base
- input signal
- potential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007423 decrease Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000003321 amplification Effects 0.000 description 4
- 238000003199 nucleic acid amplification method Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 229920006395 saturated elastomer Polymers 0.000 description 3
Landscapes
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業−1−の利用分野〕
本発明は磁気記録再生装置、特にデジタル信号の記録増
幅器に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application in Industry-1-] The present invention relates to a magnetic recording/reproducing device, and particularly to a recording amplifier for digital signals.
従来、この種のデジタル信号の記録増幅器は入力信号を
受けて増幅する1〜ランジスタと、該トランジスタに電
源を供給する電流源とを有しており、入力信号をトラン
ジスタにて増幅するのみであり、電流源を制御すること
は行われていないのが実情であった。Conventionally, this type of digital signal recording amplifier has a transistor that receives and amplifies an input signal, and a current source that supplies power to the transistor, and the input signal is only amplified by the transistor. In reality, the current source is not controlled.
従来は電流源の制御端子に制御信号をフィードバックす
ることがないため、増幅段の1〜ランジスタの入力信号
レベルがベース、エミッタ間の順方向レベルを超えると
、増幅段のトランジスタが飽和してしまい、増幅作用が
なくなるという欠点があった。Conventionally, the control signal is not fed back to the control terminal of the current source, so if the input signal level of transistor 1 to transistor in the amplifier stage exceeds the forward level between the base and emitter, the transistor in the amplifier stage will become saturated. However, the disadvantage was that the amplification effect was lost.
本発明の目的は前記課題を解決したデジタル信号の記録
増幅器を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a digital signal recording amplifier that solves the above problems.
前記目的を達成するため、本発明に係るデジタル信号の
記録増幅器においては、入力信号を受けて増幅するトラ
ンジスタと、該トランジスタに電源を供給する電流源と
、該電流源の出力を該電流源の制御端子にフィードバッ
クする素子とを含むものである。In order to achieve the above object, the digital signal recording amplifier according to the present invention includes a transistor that receives and amplifies an input signal, a current source that supplies power to the transistor, and a current source that outputs the output of the current source. and an element that feeds back to the control terminal.
以下、本発明の一実施例を図により説明する。 Hereinafter, one embodiment of the present invention will be described with reference to the drawings.
第1図は本発明の一実施例を示す回路図である。FIG. 1 is a circuit diagram showing an embodiment of the present invention.
図において、TRI、 TR2は入力信号を増幅する増
幅用トランジスタ、R1,R2,R3はバイアス用抵抗
、Dlはバイアス用ダイオードである。VRIはバラン
ス調整用可変抵抗、Tは高周波用トランス、Hはヘッド
である。TR4は電流源を構成する電流源用トランジス
タ、TR3はトランジスタTR4への制御信号を受ける
制御用トランジスタ、R2は帰還用抵抗である。In the figure, TRI and TR2 are amplification transistors that amplify input signals, R1, R2, and R3 are bias resistors, and Dl is a bias diode. VRI is a variable resistor for balance adjustment, T is a high frequency transformer, and H is a head. TR4 is a current source transistor constituting a current source, TR3 is a control transistor that receives a control signal to transistor TR4, and R2 is a feedback resistor.
入力端子INIとTN2には位相が互いに反転している
デジタルの入力信号が入り、トランジスタTRIとTR
2で増幅された後、高周波用トランスTを介してヘッド
Hに加わる。Digital input signals whose phases are inverted to each other are input to the input terminals INI and TN2, and the transistors TRI and TR
After being amplified by step 2, the signal is applied to the head H via a high frequency transformer T.
制御端子IN3には、トランジスタTR4で構成される
電流源を動作させるための制御信号が加わり、トランジ
スタTR3の作用により+5〔■〕のハイレベルで電流
源が動作し、0〔v〕のロウレベルで電流源の動作は停
止する。電流源の出力は高周波用トランスTを介してト
ランジスタTR1,TR2のコレクタに加わる。A control signal for operating a current source composed of a transistor TR4 is added to the control terminal IN3, and due to the action of the transistor TR3, the current source operates at a high level of +5 [■], and at a low level of 0 [V]. The current source stops operating. The output of the current source is applied to the collectors of transistors TR1 and TR2 via a high frequency transformer T.
また、電流源の出力は帰還素子としての帰還用抵抗Rf
を介してトランジスタTR4のベースに帰還する。In addition, the output of the current source is a feedback resistor Rf as a feedback element.
It is fed back to the base of transistor TR4 via.
第2図に示すように入力端子IN1.. IN2には位
相が互いに反転したデジタル信号が加わる。As shown in FIG. 2, input terminal IN1. .. Digital signals whose phases are mutually inverted are applied to IN2.
入力信号はダイオードD1と抵抗R1,R2,R3のバ
イアス回路により、プラスに0.7vバイアスされる。The input signal is positively biased by 0.7 V by a bias circuit including a diode D1 and resistors R1, R2, and R3.
また、第3図に示すようにトランジスタTRIに正方向
の信号が加わったときに、トランジスタTR1のエミッ
タには同相でベースの電位より0.7(V)を引いた電
位が表われ、負方向の信号が加わったときは0(V)に
固定される。Furthermore, as shown in Figure 3, when a positive direction signal is applied to the transistor TRI, a potential of 0.7 (V) subtracted from the base potential in the same phase appears at the emitter of the transistor TR1, and a negative direction signal appears at the emitter of the transistor TR1. When the signal is applied, it is fixed to 0 (V).
第4図に示すように、帰還用抵抗R2がないと、ヘッド
Hの記録電流を増すために入力信号のレベルを上げてい
くと、トランジスタTRIのベース電位とエミッタの電
位の差が0.7(V)を超えたときに1〜ランジスタT
RIが飽和し、トランジスタTRIのコレクタ電位が0
〔■〕付近まで降下する。As shown in FIG. 4, without the feedback resistor R2, when the level of the input signal is increased to increase the recording current of the head H, the difference between the base potential and emitter potential of the transistor TRI becomes 0.7. 1 to transistor T when exceeding (V)
RI is saturated and the collector potential of transistor TRI is 0.
Descend to near [■].
負方向の信号のときは同様にトランジスタTR2が飽和
し、結果として電流源の出力電位が下がり、増幅器とし
ての作用がなくなる。そこで、帰還用抵抗Rfがトラン
ジスタTR4のベース、コレクタ間に接続されることに
より、入力信号レベルを上げて行って、トランジスタT
RIのベースとエミッタの電位差が0.7(V〕を超え
ても、トランジスタTRIのコレクタ電位が下がるが、
これが抵抗R2を介してトランジスタTR4のベースに
伝達されて、トランジスタTR4のベース電位が下がり
、この結果として、電流源の内部抵抗が下がり、トラン
ジスタTRIのコレクタ電位は電源電圧V。Cより2〜
3〔v〕低下する程度で済む。このために入力信号レベ
ルを従来以上に増すことができ、ヘッドHの記録電流を
2倍以上にできる。Similarly, when the signal is in the negative direction, the transistor TR2 becomes saturated, and as a result, the output potential of the current source decreases, and the current source no longer functions as an amplifier. Therefore, by connecting the feedback resistor Rf between the base and collector of the transistor TR4, the input signal level is increased and the transistor T
Even if the potential difference between the base and emitter of RI exceeds 0.7 (V), the collector potential of transistor TRI decreases.
This is transmitted to the base of the transistor TR4 via the resistor R2, and the base potential of the transistor TR4 decreases. As a result, the internal resistance of the current source decreases, and the collector potential of the transistor TRI becomes the power supply voltage V. 2~ from C
A decrease of only 3 [v] is sufficient. Therefore, the input signal level can be increased more than before, and the recording current of the head H can be more than doubled.
以上説明したように本発明は増幅段のトランジスタの入
力レベルを従来以上に上げることができ、出力電流を従
来に比べて増加できるという効果を有する。As explained above, the present invention has the effect that the input level of the transistor in the amplification stage can be increased more than the conventional one, and the output current can be increased more than the conventional one.
第1図は本発明の一実施例を示す回路図、第2図は第1
図の入力信号用端子IN1. IN2の入力信号を示す
図、第3図、第4図は第1図のトランジスタTRI の
ベースとエミッタの信号を示す図である。
INI、IN2・入力端子 IN3・制御端子D
トバイアス用ダイオード
R1,R2,R3・バイアス用抵抗
TRI、TR2・・増幅用トランジスタTR3・・・制
御用トランジスタ
TR4電流源用トランジスタ
■旧・・バランス調整用可変抵抗Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
Input signal terminal IN1 in the figure. 3 and 4 are diagrams showing input signals of IN2, and FIGS. 3 and 4 are diagrams showing signals at the base and emitter of the transistor TRI in FIG. 1. INI, IN2・Input terminal IN3・Control terminal D
Diodes for bias R1, R2, R3・Resistors for bias TRI, TR2・・Amplification transistor TR3・・Control transistor TR4 Current source transistor ■ Old・・Variable resistor for balance adjustment
Claims (1)
ランジスタに電源を供給する電流源と、該電流源の出力
を該電流源の制御端子にフィードバックする素子とを含
むことを特徴とするデジタル信号の記録増幅器。(1) A digital signal characterized by including a transistor that receives and amplifies an input signal, a current source that supplies power to the transistor, and an element that feeds back the output of the current source to a control terminal of the current source. recording amplifier.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21166388A JPH0260309A (en) | 1988-08-26 | 1988-08-26 | Recording amplifier for digital signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21166388A JPH0260309A (en) | 1988-08-26 | 1988-08-26 | Recording amplifier for digital signal |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0260309A true JPH0260309A (en) | 1990-02-28 |
Family
ID=16609533
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21166388A Pending JPH0260309A (en) | 1988-08-26 | 1988-08-26 | Recording amplifier for digital signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0260309A (en) |
-
1988
- 1988-08-26 JP JP21166388A patent/JPH0260309A/en active Pending
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