JPH0259618B2 - - Google Patents
Info
- Publication number
- JPH0259618B2 JPH0259618B2 JP16146283A JP16146283A JPH0259618B2 JP H0259618 B2 JPH0259618 B2 JP H0259618B2 JP 16146283 A JP16146283 A JP 16146283A JP 16146283 A JP16146283 A JP 16146283A JP H0259618 B2 JPH0259618 B2 JP H0259618B2
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- silicon oxide
- etching
- conductor wiring
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16146283A JPS6053051A (ja) | 1983-09-02 | 1983-09-02 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16146283A JPS6053051A (ja) | 1983-09-02 | 1983-09-02 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6053051A JPS6053051A (ja) | 1985-03-26 |
| JPH0259618B2 true JPH0259618B2 (enrdf_load_html_response) | 1990-12-13 |
Family
ID=15735562
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16146283A Granted JPS6053051A (ja) | 1983-09-02 | 1983-09-02 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6053051A (enrdf_load_html_response) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0889320A (ja) * | 1994-09-26 | 1996-04-09 | Masao Wakaizumi | ネックレス等の止め金具 |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0821572B2 (ja) * | 1985-07-10 | 1996-03-04 | ソニー株式会社 | 半導体装置の製造方法 |
| US4789648A (en) * | 1985-10-28 | 1988-12-06 | International Business Machines Corporation | Method for producing coplanar multi-level metal/insulator films on a substrate and for forming patterned conductive lines simultaneously with stud vias |
| US4767724A (en) * | 1986-03-27 | 1988-08-30 | General Electric Company | Unframed via interconnection with dielectric etch stop |
| JPH1092810A (ja) | 1996-09-10 | 1998-04-10 | Mitsubishi Electric Corp | 半導体装置 |
| JP7746941B2 (ja) * | 2022-08-19 | 2025-10-01 | 株式会社Sumco | Soiウェーハ及びその製造方法 |
| JP7746944B2 (ja) * | 2022-08-26 | 2025-10-01 | 株式会社Sumco | Soiウェーハ及びその製造方法 |
-
1983
- 1983-09-02 JP JP16146283A patent/JPS6053051A/ja active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0889320A (ja) * | 1994-09-26 | 1996-04-09 | Masao Wakaizumi | ネックレス等の止め金具 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6053051A (ja) | 1985-03-26 |
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