JPH0257744B2 - - Google Patents

Info

Publication number
JPH0257744B2
JPH0257744B2 JP59277406A JP27740684A JPH0257744B2 JP H0257744 B2 JPH0257744 B2 JP H0257744B2 JP 59277406 A JP59277406 A JP 59277406A JP 27740684 A JP27740684 A JP 27740684A JP H0257744 B2 JPH0257744 B2 JP H0257744B2
Authority
JP
Japan
Prior art keywords
frame
transmission
signal
exchange
status
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59277406A
Other languages
English (en)
Japanese (ja)
Other versions
JPS61156939A (ja
Inventor
Daisaku Minato
Toshiro Togoshi
Toshio Itabashi
Kozo Nakamura
Isamu Sekiguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Tokyo Electric Power Co Holdings Inc
Original Assignee
Tokyo Electric Power Co Inc
Fujitsu Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electric Power Co Inc, Fujitsu Ltd, Nippon Electric Co Ltd filed Critical Tokyo Electric Power Co Inc
Priority to JP59277406A priority Critical patent/JPS61156939A/ja
Publication of JPS61156939A publication Critical patent/JPS61156939A/ja
Publication of JPH0257744B2 publication Critical patent/JPH0257744B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59277406A 1984-12-27 1984-12-27 フレ−ム同期方式 Granted JPS61156939A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59277406A JPS61156939A (ja) 1984-12-27 1984-12-27 フレ−ム同期方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59277406A JPS61156939A (ja) 1984-12-27 1984-12-27 フレ−ム同期方式

Publications (2)

Publication Number Publication Date
JPS61156939A JPS61156939A (ja) 1986-07-16
JPH0257744B2 true JPH0257744B2 (enExample) 1990-12-05

Family

ID=17583098

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59277406A Granted JPS61156939A (ja) 1984-12-27 1984-12-27 フレ−ム同期方式

Country Status (1)

Country Link
JP (1) JPS61156939A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2767107B2 (ja) * 1988-03-30 1998-06-18 中部電力株式会社 フレームフォーマット変換方法
JP4672758B2 (ja) * 2008-07-28 2011-04-20 富士通株式会社 多重インタフェース盤

Also Published As

Publication number Publication date
JPS61156939A (ja) 1986-07-16

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