JPH0256693B2 - - Google Patents

Info

Publication number
JPH0256693B2
JPH0256693B2 JP56119701A JP11970181A JPH0256693B2 JP H0256693 B2 JPH0256693 B2 JP H0256693B2 JP 56119701 A JP56119701 A JP 56119701A JP 11970181 A JP11970181 A JP 11970181A JP H0256693 B2 JPH0256693 B2 JP H0256693B2
Authority
JP
Japan
Prior art keywords
common bus
memory
cache memory
data
control unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56119701A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5819970A (ja
Inventor
Masaaki Kobayashi
Takumi Kishino
Shigeru Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56119701A priority Critical patent/JPS5819970A/ja
Publication of JPS5819970A publication Critical patent/JPS5819970A/ja
Publication of JPH0256693B2 publication Critical patent/JPH0256693B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Bus Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP56119701A 1981-07-30 1981-07-30 メモリアクセス制御方式 Granted JPS5819970A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56119701A JPS5819970A (ja) 1981-07-30 1981-07-30 メモリアクセス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56119701A JPS5819970A (ja) 1981-07-30 1981-07-30 メモリアクセス制御方式

Publications (2)

Publication Number Publication Date
JPS5819970A JPS5819970A (ja) 1983-02-05
JPH0256693B2 true JPH0256693B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1990-11-30

Family

ID=14767932

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56119701A Granted JPS5819970A (ja) 1981-07-30 1981-07-30 メモリアクセス制御方式

Country Status (1)

Country Link
JP (1) JPS5819970A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62109153A (ja) * 1985-11-08 1987-05-20 Fuji Facom Corp デバイス装置
GB9008145D0 (en) * 1989-05-31 1990-06-06 Ibm Microcomputer system employing address offset mechanism to increase the supported cache memory capacity

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50141938A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1974-05-02 1975-11-15

Also Published As

Publication number Publication date
JPS5819970A (ja) 1983-02-05

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