JPH0254666B2 - - Google Patents
Info
- Publication number
- JPH0254666B2 JPH0254666B2 JP59114018A JP11401884A JPH0254666B2 JP H0254666 B2 JPH0254666 B2 JP H0254666B2 JP 59114018 A JP59114018 A JP 59114018A JP 11401884 A JP11401884 A JP 11401884A JP H0254666 B2 JPH0254666 B2 JP H0254666B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- support plate
- hole
- resin coating
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59114018A JPS60257529A (ja) | 1984-06-04 | 1984-06-04 | 樹脂封止型半導体装置の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59114018A JPS60257529A (ja) | 1984-06-04 | 1984-06-04 | 樹脂封止型半導体装置の製造方法 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8942189A Division JPH01302728A (ja) | 1989-04-07 | 1989-04-07 | 樹脂封止型半導体装置の製造方法 |
JP8942289A Division JPH01302729A (ja) | 1989-04-07 | 1989-04-07 | 樹脂封止型半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60257529A JPS60257529A (ja) | 1985-12-19 |
JPH0254666B2 true JPH0254666B2 (enrdf_load_stackoverflow) | 1990-11-22 |
Family
ID=14626985
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59114018A Granted JPS60257529A (ja) | 1984-06-04 | 1984-06-04 | 樹脂封止型半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60257529A (enrdf_load_stackoverflow) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60169843U (ja) * | 1984-04-19 | 1985-11-11 | 日本電気株式会社 | 絶縁型半導体装置 |
-
1984
- 1984-06-04 JP JP59114018A patent/JPS60257529A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS60257529A (ja) | 1985-12-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4507675A (en) | Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor | |
US7671453B2 (en) | Semiconductor device and method for producing the same | |
US6992386B2 (en) | Semiconductor device and a method of manufacturing the same | |
KR100478883B1 (ko) | 반도체장치 | |
US4503452A (en) | Plastic encapsulated semiconductor device and method for manufacturing the same | |
US6028350A (en) | Lead frame with strip-shaped die bonding pad | |
JPH04306865A (ja) | 半導体装置及びその製造方法 | |
JP3479121B2 (ja) | Bgaパッケージの樹脂モールド方法 | |
JP4526125B2 (ja) | 大電力用半導体装置 | |
JPH0254666B2 (enrdf_load_stackoverflow) | ||
JPH065687B2 (ja) | 樹脂封止型半導体装置の製造方法 | |
JPH0578177B2 (enrdf_load_stackoverflow) | ||
JPH0432538B2 (enrdf_load_stackoverflow) | ||
JP2836219B2 (ja) | 樹脂封止型半導体パッケージ | |
JPH09275155A (ja) | 半導体装置 | |
JP2904154B2 (ja) | 半導体素子を含む電子回路装置 | |
JPH08204099A (ja) | 半導体装置の構造及び形成方法 | |
JP2726011B2 (ja) | 半導体装置 | |
JPH04277660A (ja) | 集積回路パッケージ | |
JPH0328067B2 (enrdf_load_stackoverflow) | ||
JPH0318741B2 (enrdf_load_stackoverflow) | ||
JPH0378779B2 (enrdf_load_stackoverflow) | ||
JP2020115568A (ja) | 半導体装置およびその製造方法 | |
JP2596247B2 (ja) | 半導体装置の成形用金型 | |
JPH0620084B2 (ja) | 樹脂封止型半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |