JPH0254664B2 - - Google Patents

Info

Publication number
JPH0254664B2
JPH0254664B2 JP5523583A JP5523583A JPH0254664B2 JP H0254664 B2 JPH0254664 B2 JP H0254664B2 JP 5523583 A JP5523583 A JP 5523583A JP 5523583 A JP5523583 A JP 5523583A JP H0254664 B2 JPH0254664 B2 JP H0254664B2
Authority
JP
Japan
Prior art keywords
gas
bonding
work window
bonding work
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP5523583A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59182532A (ja
Inventor
Hiroshi Ushiki
Koichi Orita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinkawa Ltd
Original Assignee
Shinkawa Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinkawa Ltd filed Critical Shinkawa Ltd
Priority to JP58055235A priority Critical patent/JPS59182532A/ja
Publication of JPS59182532A publication Critical patent/JPS59182532A/ja
Publication of JPH0254664B2 publication Critical patent/JPH0254664B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)
JP58055235A 1983-04-01 1983-04-01 ボンデイング装置用加熱装置 Granted JPS59182532A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58055235A JPS59182532A (ja) 1983-04-01 1983-04-01 ボンデイング装置用加熱装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58055235A JPS59182532A (ja) 1983-04-01 1983-04-01 ボンデイング装置用加熱装置

Publications (2)

Publication Number Publication Date
JPS59182532A JPS59182532A (ja) 1984-10-17
JPH0254664B2 true JPH0254664B2 (US20080094685A1-20080424-C00004.png) 1990-11-22

Family

ID=12992937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58055235A Granted JPS59182532A (ja) 1983-04-01 1983-04-01 ボンデイング装置用加熱装置

Country Status (1)

Country Link
JP (1) JPS59182532A (US20080094685A1-20080424-C00004.png)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6234429U (US20080094685A1-20080424-C00004.png) * 1985-08-17 1987-02-28
JPS63142642A (ja) * 1986-12-05 1988-06-15 Kuwano Denki Kk フレ−ムの酸化防止装置
EP1415328A2 (en) 2001-08-01 2004-05-06 Lilogix, Inc. doing business as RD Automation Process and apparatus for mounting semiconductor components to substrates and parts therefor
JP5884448B2 (ja) * 2011-12-01 2016-03-15 富士電機株式会社 はんだ接合装置およびはんだ接合方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49126265A (US20080094685A1-20080424-C00004.png) * 1973-04-04 1974-12-03
JPS55127030A (en) * 1979-03-26 1980-10-01 Toshiba Corp Assembling apparatus for semiconductor
JPS5687331A (en) * 1979-12-18 1981-07-15 Toshiba Corp Reducing furnace for solder-treatment
JPS56163423A (en) * 1980-04-15 1981-12-16 Commissariat Energie Atomique Seismic gauge
JPS5742175U (US20080094685A1-20080424-C00004.png) * 1980-08-14 1982-03-08

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5742175Y2 (US20080094685A1-20080424-C00004.png) * 1977-05-25 1982-09-17

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49126265A (US20080094685A1-20080424-C00004.png) * 1973-04-04 1974-12-03
JPS55127030A (en) * 1979-03-26 1980-10-01 Toshiba Corp Assembling apparatus for semiconductor
JPS5687331A (en) * 1979-12-18 1981-07-15 Toshiba Corp Reducing furnace for solder-treatment
JPS56163423A (en) * 1980-04-15 1981-12-16 Commissariat Energie Atomique Seismic gauge
JPS5742175U (US20080094685A1-20080424-C00004.png) * 1980-08-14 1982-03-08

Also Published As

Publication number Publication date
JPS59182532A (ja) 1984-10-17

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