JPH024519Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a reset circuit for a flip-flop that always resets the output level of an output transistor constituting the flip-flop to a predetermined state when the power is turned on.

Generally, in flip-flop FF ₁ shown in Figure 1, when the power supply Vcc is turned on, the output transistor
The output states of TR ₁ and TR ₂ are undefined. A conventional example for eliminating this uncertainty in the output state is a flip-flop FF2 shown in FIG. ₂ in which a diode D is provided on the collector side of one output transistor _TR2 . Another conventional example includes a flip-flop FF3 in FIG. ₃ in which a series circuit of a resistor R and a capacitor C is inserted between the power supply Vcc and the ground. Although the explanation of the operation of each conventional example will be omitted, both output transistors TR ₁ and TR ₂
The output state at power-on can be determined. However, in the former case, simply diode D
The forward voltage of output transistors TR ₁ and TR ₂
Since it only makes a difference in the ON voltage of
When the power supply voltage rises abruptly or due to chattering caused by the power-on switch, the output state of the output transistor may not reach a predetermined state when the power is turned on. In the latter case, when converting a flip-flop into an IC,
Capacitor C becomes an external component, which is undesirable because it increases the number of components and the number of pin terminals of the IC.

By the way, in a flip-flop that has been converted into an IC,
Analog amplifiers are often incorporated within the same IC. This analog amplifier is used, for example, to generate a signal for switching the state of a flip-flop based on an externally introduced analog signal.

In this way, an IC that incorporates an analog amplifier along with a flip-flop always has a terminal for supplying an analog signal to the analog amplifier, and a coupling capacitor for cutting the DC component is connected to this terminal.

The present invention utilizes a configuration in which an IC incorporating a flip-flop analog amplifier has a signal input terminal to the analog amplifier, and a coupling capacitor is connected to this signal input terminal. , it is possible to reliably determine the output state of a flip-flop when the power is turned on by simply adding an element such as a transistor within the IC, without increasing the number of pin terminals of the IC or the number of external components. The purpose of this invention is to provide a reset circuit that can perform

Hereinafter, the present invention will be explained in detail based on an embodiment shown in the drawings.

FIG. 4 is a circuit diagram of this embodiment. In FIG. 4, FF ₄ is a flip-flop having output transistors TR ₁ and TR ₂ . This flip-flop FF ₄ is built in the same semiconductor integrated circuit 1 together with the differential amplifier AMP. R ₁ and R ₂ are magnetoelectric transducers inserted in series between the power supply Vcc and the ground (for example, magnetoelectric transducers that generate electricity in response to magnetic attraction and repulsion from a ring magnet installed on the take-up reel shaft of a tape deck). (Hall element that outputs a signal). A series circuit ₂ consisting of a coupling capacitor C' and a resistor R3 is connected between the mutual connection point A of the magnetoelectric transducers R ₁ and R ₂ and one input section 1 of the differential amplifier AMP.
is connected. This resistor R ₃ and the differential amplifier AMP
The resistance provided between the input and output of the AMP determines the gain of the differential amplifier AMP depending on its resistance value. Also,
At least the coupling capacitor in the series circuit 2
C' is externally attached to the semiconductor integrated circuit 1. Between the connection point B between this series circuit 2 and one input section - of the differential amplifier AMP, and the other input section + of the differential amplifier AMP, there is a base emitter of the first transistor TR ₃ ; Collector of first transistor TR ₃ and output part OUT of one output transistor TR ₂
The base of the second transistor _TR4 is connected between
A collector is provided for each. differential amplifier
A constant bias voltage V _B serving as a reference is applied to the other input section + of the AMP.

Next, the operation when the power is turned on will be explained with reference to FIG.

When the power is turned on, the voltage Vo at the connection point A between the magnetoelectric conversion elements R ₁ and R ₂ is 1/2 as shown in Figure 5, assuming that the resistance values of both elements R ₁ and R ₂ are equal.
Becomes Vcc. Due to the voltage change at the connection point A, the voltage _V1 at the connection point B also rises to around 1/2Vcc through the coupling capacitor C' and the current limiting resistor _R3 , but
This voltage V ₁ over time as shown in the figure
gradually decreases according to the time constant determined by the coupling capacitor C', current limiting resistor R3 _, etc., and finally reaches the bias voltage _VB . Here, the first transistor
If the ON voltage of TR ₃ is V ₂ , the first transistor
In order for TR ₃ to turn ON, the following equation must hold.

V ₁ ≧V ₂ +V _B Therefore, when the voltage V ₁ at the connection point B is turned on, the magnetoelectric transducer is
If the resistance ratio of R ₁ and R ₂ is determined or the bias voltage V _B is determined, the first transistor TR ₃ will always be turned on when the power is turned on. First transistor TR ₃
When turned on, the second transistor _TR4 is also turned on, and as a result, the potential of the output portion OUT of one output transistor _TR2 of the flip-flop _FF4 becomes low level. Thus, flip-flop
The output state of the output section OUT of FF ₄ is always determined to be low level when the power is turned on.

Note that although the output transistor constituting the flip-flop FF ₄ is NPN conductive in the embodiment, it goes without saying that the same applies to PNP transistors.

As described above, according to the present invention, in a semiconductor integrated circuit incorporating a flip-flop and an analog amplifier, a voltage higher than the required value corresponding to the power supply voltage is applied to the coupling capacitor provided at the input stage of the analog amplifier when the power is turned on. At the same time, the emitter of a first transistor whose base is applied with a constant bias voltage is connected to the connection point between the coupling capacitor and the input stage of the analog amplifier, and the collector of this first transistor is Since it is connected to the base of the second transistor for switching which is connected in parallel to one output transistor of the flip-flop, when the power is turned on, it responds to the sudden rise of the power supply voltage.
the second transistor via the first transistor
By turning it ON, the output state of the flip-flop can be determined.

Moreover, in semiconductor integrated circuits, existing terminals such as signal input terminals for analog amplifiers and coupling capacitors connected to these signal input terminals are used as they are, so there is no need to increase the number of pin terminals or use external components. There is no need to increase the number of points; on the other hand, the first and second transistors constituting the reset circuit only need to be additionally provided within the semiconductor integrated circuit, and the addition of these transistors requires less manufacturing time than mounting external parts. Since the overhead burden is small, the overall manufacturing cost can be reduced.

[Brief explanation of the drawing]

1 to 3 are circuit diagrams of each conventional example, FIG. 4 is a circuit diagram of an embodiment of the present invention, and FIG. 5 is a voltage waveform diagram for explaining the operation of the circuit of FIG. 4. TR ₁ , TR ₂ ...Output transistor, TR ₃ , TR ₄
...First and second transistors, C'...Coupling capacitor, _R3 ...Current limiting resistor.

Claims (1)

[Claims for Utility Model Registration] A reset circuit for a flip-flop that is incorporated in the same semiconductor integrated circuit together with a flip-flop and an analog amplifier and resets the output level of an output transistor constituting the flip-flop when power is turned on, the reset circuit comprising: A power supply is connected to the coupling capacitor provided in the input stage so that a voltage higher than the required value corresponding to the power supply voltage is applied when the power is turned on, and a constant voltage is connected to the base at the connection point between the coupling capacitor and the input stage of the analog amplifier. A reset circuit for a flip-flop in which the emitter of a first transistor to which a bias voltage is applied is connected, and the collector of the first transistor is connected to the base of a second switching transistor connected in parallel to one output transistor of the flip-flop.