JP3052819B2 - Voltage-current converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage-to-current conversion circuit, and more particularly to a voltage-to-current conversion circuit in which the influence of a common emitter current amplification factor β of a transistor is reduced.

[0002]

2. Description of the Related Art FIG. 4 shows a conventional voltage-current conversion circuit.
Referring to FIG. 4, a reference voltage source VREF, an NPN transistor Q1 having an emitter connected to the reference voltage source VREF, an NPN transistor Q2 having a base connected to the base and collector of the NPN transistor Q1,
A current mirror circuit CM having an input terminal connected to the collector of the NPN transistor Q2, an output terminal connected to the collector of the NPN transistor Q1, and an NPN transistor having a base and an emitter commonly connected to a base and an emitter of the NPN transistor Q2, respectively. Q3 and these N
Output current determining resistor R1 connected between the commonly connected emitters of PN transistors Q2 and Q3 and ground potential
And a collector connected to the input terminal of the current mirror circuit CM as a circuit for activating the current source circuit,
The base is connected to the reference voltage source VREF, and the emitter is N
It comprises an NPN transistor Q8 commonly connected to the emitters of the PN transistors Q2 and Q3. And NP
The collector of the N transistor Q3 serves as a constant current output terminal.

Now, let the potential at one end of the resistor R1 be VR,
Assuming that the reference voltage is VREF, VR = VREF + VBE (Q1) -VBE (Q2) (1) (VBE (Q1), VBE (Q2): base-emitter voltage of Q1 and Q2). Here, assuming that the input / output current ratio of the current mirror circuit is 1: 1 and the common emitter current gain β of the transistor is ∞, the collector currents of the transistors Q1 and Q2 are equal. Therefore, if the transistors Q1 and Q2 match each other in the expression (1), the base-emitter voltage VBE (Q1) of the transistor Q1 and the base-emitter voltage VBE (Q2) of the transistor Q2 become equal, and VR Becomes as follows.

VR = VREF ………………………………………………………………………………………………………………………………………………………………………………………………………… (2) NPN transistors Q2 and Q3 have their emitters and bases connected in common. The collector currents are equal and half of the current flowing through the resistor R1. Therefore,
Assuming that the collector output current of the NPN transistor Q3 is I0, I0 = VREF / 2R1 (3), and the output current I0 is obtained only by the reference voltage VREF and the resistor R1. Is determined. Therefore, the reference voltage VREF and the resistance R
If 1 is stable, the output current I0 is also stable.

Next, the starting circuit will be described. The NPN transistor Q8 is a starting transistor. Immediately after the power is turned on, the transistor Q8 turns on. The starting current (collector current of Q8) ISTART at that time is: ISTART = (VREF−VBE (Q8)) / R1 (4) Then, a current flows through the current mirror circuit CM,
The transistors Q1 and Q2 are activated. At this time
VR = VREF as shown in the equation (2) . Therefore, the voltage between the base and the emitter of the transistor Q8 becomes zero, and the transistor Q8 is turned off, so that other circuits are not adversely affected. In this way, the constant current circuit is activated, and the circuit is stabilized.

Next, in this conventional example, the influence of the common emitter current amplification factor β will be considered. The above analysis assumes that the common emitter current amplification factor β is ∞. Here, the common emitter current amplification factor β is considered to be finite, and the analysis is performed similarly.

First, in FIG. 4, a circuit in which the influence of the common emitter current amplification factor β is reduced by the existing technology is considered.
FIG. 5 is a circuit in which the influence of the common emitter current amplification factor β is reduced based on the circuit of FIG. Referring to FIG. 5, the collector and the base of the transistor Q1 shown in FIG. 4 are not connected in common, but the base is connected to the collector of the transistor Q1, the emitters are connected in common to the bases of the transistors Q1 and Q2, and the collector is connected to the positive power supply VCC. Connected NPN
The transistor Q5 is added. Except for this, the configuration is the same as that of FIG.

In FIG. 4, the collector currents of the transistors Q1 and Q2 have a difference of the base current in the order of 1 / β. This difference leads to an error as a whole.

[0009]

However, in the base current compensation type circuit using the transistor Q5 as shown in FIG. 5, the current error is reduced to the order of 1 / β ² , which is almost negligible. However, the output current I0 still has an error. That is, the equation corresponding to the above equation (3) is

[0010]

And appears as an error on the order of 1 / β. As a specific example, assuming that β is 50, the output current has an error of 2%, and cannot be used for a circuit requiring high accuracy.

[0012]

A voltage-current conversion circuit according to the present invention comprises a first, second, and third transistors whose bases are commonly connected, an emitter connected to a collector of the second transistor, and a base. A fourth transistor connected to the collector of the third transistor, an input terminal connected to the collector of the fourth transistor, and an output terminal commonly connected to the collector and base of the first transistor. : 1 current mirror circuit, and a first resistor having one end commonly connected to the emitters of the second and third transistors and the other end connected to a reference potential.

In the power supply current conversion circuit according to the present invention, instead of connecting the collector and base of the first transistor in common, the base is connected to the collector of the first transistor, and the emitter is connected to the first and second transistors. A selector connected to the second and third commonly connected bases includes a fifth transistor connected to the power supply terminal.

In the voltage-current conversion circuit according to the present invention, the fourth transistor may be omitted, the collector of the second transistor may be directly connected to the input terminal of the current mirror circuit, and the base, the emitter and the collector may be connected. a sixth transistor, each commonly connected to each of the base and the emitter and collector of said fifth transistor, each of the base and emitter of said fifth transistor base and Emi
And a seventh transistor commonly connected to each of the third transistors, wherein a collector of the seventh transistor is commonly connected to a collector of the third transistor.

The voltage-current conversion circuit according to the present invention further includes a second resistor connected between the voltage input terminal and a reference voltage.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 shows a voltage-current conversion circuit according to a first embodiment of the present invention. In this embodiment, a reference voltage source VREF, an NPN transistor Q1 whose emitter is connected to this reference power supply VREF, and an N base whose base is commonly connected to the base and collector of this NPN transistor Q1
PN transistor Q2 and emitter Q2
A current mirror circuit CM having an input terminal connected to the collector of the transistor Q4, an output terminal commonly connected to the collector and base of the transistor Q1, and a base and an emitter connected to the transistor Q2, respectively. An NPN transistor Q3 commonly connected to the base and the emitter, an output current determining resistor R1 connected between the commonly connected emitters of the NPN transistors Q2 and Q3 and the ground potential, and a circuit for activating the current source circuit. , A collector is connected to the input terminal of the current mirror circuit CM, a base is connected to the reference voltage source VREF, and an emitter is connected to the emitters of the NPN transistors Q2 and Q3, and an emitter of the NPN transistor Q1 is connected. And ground potential Consisting of a resistor R2 Metropolitan. Then, the collector of the NPN transistor Q3 and the base of the NPN transistor Q4 are commonly connected, and this serves as a constant current output terminal.

Now, let the potential at one end of the resistor R1 be VR,
Assuming that the reference voltage is VREF, VR = VREF + VBE (Q1) -VBE (Q2) (6) (VBE (Q1), VBE (Q2): voltage between base and emitter of Q1 and Q2) Here, current Assuming that the input / output current ratio of the mirror circuit is 1: 1 and the grounded emitter current amplification factor of the transistor is β, the second and third terms on the right side of Expression (6) are obtained. First, the collector current IC (Q2) of the transistor Q2 is

[0019]

## EQU1 ## If the collector current of the transistor Q4 is IC (Q4),

[0021]

This collector current IC (Q4) becomes the input current of the current mirror circuit CM. Next, the collector current IC (Q1) of the transistor Q1 is

[0023]

## EQU1 ## Here, if VBE (1) −VBE (2) in the second and third terms of the equation (6) is ΔVBE,

[0025]

(VT: thermal voltage, ≒ 26 mV at ta)
= 25 ° C). Here, ΔVBE is calculated by putting a specific numerical example into β. If β = 50, this ΔVBE ≒
When −2 mV and β = 100, ΔVBE ≒ −1 mV. In other words, with such a value, generally VREF
> ΔVBE. Therefore, the expression (6) is as follows: VR = VREF......... Since the bases and emitters of the NPN transistors Q2 and Q3 are commonly connected, the collector currents are equal. Therefore, the current I0 at the output terminal where the collector of Q3 and the base of Q4 are commonly connected is

[0027]

## EQU1 ## Here, an error is calculated by putting a specific numerical example into β. If β = 50, the inside of {} in equation (11) is 0.99962. Therefore, the error is about 0.
04%, which is almost negligible compared to the 2% error of the conventional example. Therefore, equation (11) is

[0029]

Thus, an accurate voltage-current conversion circuit can be realized.

Next, a description will be given of the resistor R2 connected between the emitter of the transistor Q1 and the ground potential. This resistor R2 is for preventing a load current from flowing to the constant current source VREF connected to the input unit. If there is no resistor R2, a current value substantially equal to the output current flows into the constant voltage source VREF as shown by the equation (8). The constant current source is a positive power supply, and generally has a current outflow capability, but has no reverse inflow capability. Therefore, when a current flows into a constant voltage source as in the present embodiment, the constant voltage source may not operate correctly. But the resistance R
2, the emitter current of the transistor Q1 becomes equal to the resistance R
2, and no current flows into the constant current source VREF.

Further, assuming that the values of the resistors R1 and R2 are equal, that is, R1 = R2, all the emitter current of the transistor Q1 flows through the resistor R2 and the constant voltage source VREF
Is “0”.

Since the operation principle of the starting circuit is the same as that of the conventional circuit, the description is omitted.

Next, a second embodiment of the present invention will be described. FIG. 2 is a circuit diagram of a second embodiment of the present invention. In the figure, the same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. Referring to FIG. 2, this embodiment instead of the common connecting the collector and base of the transistor Q1 of the first embodiment, base Trang
The collector of the transistor Q1 is commonly connected to the output of the current mirror circuit CM, and the emitters are transistors ( Q1 to Q1 ).
3) Commonly connected to the base and collector connected to the positive power supply terminal V
An NPN transistor Q5 connected to CC is inserted and connected. This embodiment is a circuit in which an error due to a base current of the transistors (Q1 to Q3) is reduced. When the collector current IC (Q1) of the transistor Q1 is obtained in the same manner as in the first embodiment, the equation corresponding to the above equation (9) becomes

[0035]

## EQU1 ## Similarly, VBE (1) −VBE (2) of the second and third terms of the equation (6) is set as ΔVBE.
The equation corresponding to the above equation (10) is

[0037]

(VT: thermal voltage, about 26 mV at ta)
= 25 ° C). Here, ΔVBE is calculated by putting a specific numerical example into β. If β = 50, this ΔVBE ≒
-1 mV, β = 100, ΔVBE ≒ −0.5 mV
And ΔV is further compared with the case of the first embodiment.
There is an advantage that an error due to BE is reduced. The other operations are the same as those of the first embodiment, and the description thereof will be omitted.

Next, a third embodiment of the present invention will be described with reference to FIG. 3. In FIG. 3, the same components as those of FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted. In the present embodiment, as shown in FIG. 3, the transistor Q4 of the second embodiment is eliminated, and the collector of the transistor Q2 is directly connected to the input terminal of the current mirror circuit CM. Further, the collector of the tiger <br/> Njisuta Q5, the base, a new connection transistor Q6 which is connected in common with each of the emitter. Furthermore,
Each of the base and the emitter is newly connected to a transistor Q7 commonly connected to that of the transistor Q5, and the collector of the transistor Q7 and the collector of the transistor Q3 are commonly connected to form a current output terminal I0. The present embodiment is a circuit in which the error between the collector currents of Q1 and Q2 is reduced according to the NPN transistor Q4. When the collector current IC (Q1) of the transistor Q1 is obtained in the same manner as in the second embodiment in the case of FIG. 2, the equation corresponding to the above-mentioned equation (9) becomes

[0040]

## EQU1 ## Similarly, VBE (1) −VBE (2) of the second and third terms of the equation (6) is set as ΔVBE.
The equation corresponding to the above equation (10) is

[0042]

(VT: thermal voltage, about 26 mV at ta)
= 25 ° C). Here, ΔVBE is calculated by putting a specific numerical example into β. If β = 50, this ΔVBE ≒
−0.03 mV, which is an advantage that the error due to ΔVBE is further reduced as compared with the case of the second embodiment. The output current I0 is

[0044]

Thus, there is an improvement effect at the same level as in the second embodiment. The other operations are the same as those of the first embodiment, and the description thereof will be omitted.

[0046]

As described above, according to the present invention, in the voltage-current conversion circuit for determining the emitter current and outputting the current from the collector, the circuit is configured to compensate for the error caused by the ground emitter current amplification factor β. There is an effect that a high-precision voltage-current conversion circuit can be configured with a simple circuit.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a voltage-current conversion circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a voltage-current conversion circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram of a voltage-current conversion circuit according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram of a conventional example.

FIG. 5 is a circuit diagram of another conventional example.

[Explanation of symbols]

 Q1 to Q8 NPN transistors R1 to R2 Resistance CM Current mirror circuit VREF Reference voltage source I0 Output current VCC Positive power supply

Claims (3)

(57) [Claims] A first transistor having a base connected in common, a second transistor and a third transistor connected in common, an emitter connected to a collector of the second transistor, and a base connected to a collector of the third transistor. 4, a 1: 1 current mirror circuit having an input terminal connected to the collector of the fourth transistor, and an output terminal commonly connected to the collector and the base of the first transistor;
A first resistor having one end commonly connected to the emitters of the second and third transistors and the other end connected to a reference potential, the emitter of the first transistor serving as a voltage input terminal; A voltage-current conversion circuit, wherein a common connection point between the collector of the third transistor and the base of the fourth transistor serves as a current output terminal. 2. Instead of connecting the collector and the base of the first transistor in common, the base is connected to the collector of the first transistor and the emitter is connected to the first transistor.
2. The voltage-current conversion circuit according to claim 1, further comprising a fifth transistor connected to the first and second and third commonly connected bases and having a collector connected to the power supply terminal. 3. The fourth transistor is eliminated, a collector of the second transistor is directly connected to an input terminal of the current mirror circuit, and each of a base, an emitter and a collector is connected to a base of the fifth transistor. A sixth transistor commonly connected to each of the emitter and the collector , and a seventh transistor each having a base and an emitter commonly connected to each of the base and the emitter of the fifth transistor, The voltage-current conversion circuit according to claim 2, wherein a collector of the seventh transistor is commonly connected to a collector of the third transistor.