JPH0241449U - - Google Patents
Info
- Publication number
- JPH0241449U JPH0241449U JP11899488U JP11899488U JPH0241449U JP H0241449 U JPH0241449 U JP H0241449U JP 11899488 U JP11899488 U JP 11899488U JP 11899488 U JP11899488 U JP 11899488U JP H0241449 U JPH0241449 U JP H0241449U
- Authority
- JP
- Japan
- Prior art keywords
- shielded
- thin film
- package
- chip
- electrostatic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 claims description 3
- 239000010408 film Substances 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Description
第1図はシールド付きICの断面図、第2図は
シールド付きICの部分詳細断面図、第3図は一
般的なICの断面図である。 1…パツケージ、2…チツプ、3…リード線、
4…端子、5…導電性シールド薄膜、6…絶縁薄
膜、7…金属膜、IC…集積回路素子。
シールド付きICの部分詳細断面図、第3図は一
般的なICの断面図である。 1…パツケージ、2…チツプ、3…リード線、
4…端子、5…導電性シールド薄膜、6…絶縁薄
膜、7…金属膜、IC…集積回路素子。
Claims (1)
- 電子回路が集積状に形成されたチツプを密封状
に保護するためのパツケージの表面に、静電及び
電磁シールド可能な導電性シールド薄膜を形成し
たことを特徴とするシールド付きIC。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11899488U JPH0241449U (ja) | 1988-09-10 | 1988-09-10 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11899488U JPH0241449U (ja) | 1988-09-10 | 1988-09-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0241449U true JPH0241449U (ja) | 1990-03-22 |
Family
ID=31363838
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11899488U Pending JPH0241449U (ja) | 1988-09-10 | 1988-09-10 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0241449U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012119688A (ja) * | 2010-12-02 | 2012-06-21 | Samsung Electronics Co Ltd | 積層パッケージ構造物、パッケージオンパッケージ素子、およびパッケージオンパッケージ素子製造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4821569B1 (ja) * | 1968-10-17 | 1973-06-29 | ||
JPS5030478A (ja) * | 1973-07-17 | 1975-03-26 | ||
JPS5223248U (ja) * | 1975-08-08 | 1977-02-18 |
-
1988
- 1988-09-10 JP JP11899488U patent/JPH0241449U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4821569B1 (ja) * | 1968-10-17 | 1973-06-29 | ||
JPS5030478A (ja) * | 1973-07-17 | 1975-03-26 | ||
JPS5223248U (ja) * | 1975-08-08 | 1977-02-18 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012119688A (ja) * | 2010-12-02 | 2012-06-21 | Samsung Electronics Co Ltd | 積層パッケージ構造物、パッケージオンパッケージ素子、およびパッケージオンパッケージ素子製造方法 |
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