JPH0236476U - - Google Patents
Info
- Publication number
- JPH0236476U JPH0236476U JP11429888U JP11429888U JPH0236476U JP H0236476 U JPH0236476 U JP H0236476U JP 11429888 U JP11429888 U JP 11429888U JP 11429888 U JP11429888 U JP 11429888U JP H0236476 U JPH0236476 U JP H0236476U
- Authority
- JP
- Japan
- Prior art keywords
- wiring pattern
- protruding electrodes
- view
- wiring
- showing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007650 screen-printing Methods 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Wire Bonding (AREA)
- Radar Systems Or Details Thereof (AREA)
- Credit Cards Or The Like (AREA)
- Calculators And Similar Devices (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第1図は本考案の一実施例による半導体チツプ
の実装を示す断面図、第2図はその配線基板を示
す斜視図、第3図はバンプの形成の説明に供する
断面図、第4図は他の実施例を示す斜視図、第5
図は情報カードを示す斜視図、第6図はワイヤボ
ンデイング法による半導体チツプの実装を示す断
面図、第7図はバンプ法による半導体チツプの実
装を示す断面図である。
1…情報カード、2,20,41,42…配線
基板、4,40…配線パターン、8…半導体チツ
プ、9…電極、11,25…バンプ、26,43
…熱硬化性接着剤。
FIG. 1 is a cross-sectional view showing the mounting of a semiconductor chip according to an embodiment of the present invention, FIG. 2 is a perspective view showing the wiring board, FIG. 3 is a cross-sectional view for explaining the formation of bumps, and FIG. Perspective view showing another embodiment, No. 5
6 is a perspective view showing an information card, FIG. 6 is a cross-sectional view showing mounting of a semiconductor chip by the wire bonding method, and FIG. 7 is a cross-sectional view showing mounting of a semiconductor chip by the bump method. 1... Information card, 2, 20, 41, 42... Wiring board, 4, 40... Wiring pattern, 8... Semiconductor chip, 9... Electrode, 11, 25... Bump, 26, 43
...thermosetting adhesive.
Claims (1)
形成した配線基板と、 上記突起電極を介して、上記配線パターンに接
続されるようになされた電子部品と を具えることを特徴とするプリント基板回路。[Claims for Utility Model Registration] A wiring board having protruding electrodes formed on the wiring pattern by screen printing, and an electronic component connected to the wiring pattern via the protruding electrodes. Characteristic printed circuit board circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11429888U JPH0236476U (en) | 1988-08-31 | 1988-08-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11429888U JPH0236476U (en) | 1988-08-31 | 1988-08-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0236476U true JPH0236476U (en) | 1990-03-09 |
Family
ID=31354914
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11429888U Pending JPH0236476U (en) | 1988-08-31 | 1988-08-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0236476U (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06123773A (en) * | 1992-06-17 | 1994-05-06 | Micron Technol Inc | Radio-frequency identifying device, manufacture thereof and detecting system using device thereof |
JPH08321671A (en) * | 1995-05-26 | 1996-12-03 | Nec Corp | Bump electrode structure and manufacture thereof |
WO2021106471A1 (en) * | 2019-11-29 | 2021-06-03 | 株式会社デンソー | Radar device |
WO2022113186A1 (en) * | 2020-11-25 | 2022-06-02 | 株式会社Fuji | Electric circuit forming method |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51139775A (en) * | 1975-05-28 | 1976-12-02 | Seiko Epson Corp | Method of forming projection electrode |
JPS594196A (en) * | 1982-06-30 | 1984-01-10 | 富士通株式会社 | Method of forming solder bump for mounting semiconductor part |
JPS63119288A (en) * | 1986-11-06 | 1988-05-23 | 株式会社村田製作所 | Circuit board |
-
1988
- 1988-08-31 JP JP11429888U patent/JPH0236476U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51139775A (en) * | 1975-05-28 | 1976-12-02 | Seiko Epson Corp | Method of forming projection electrode |
JPS594196A (en) * | 1982-06-30 | 1984-01-10 | 富士通株式会社 | Method of forming solder bump for mounting semiconductor part |
JPS63119288A (en) * | 1986-11-06 | 1988-05-23 | 株式会社村田製作所 | Circuit board |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06123773A (en) * | 1992-06-17 | 1994-05-06 | Micron Technol Inc | Radio-frequency identifying device, manufacture thereof and detecting system using device thereof |
JPH08321671A (en) * | 1995-05-26 | 1996-12-03 | Nec Corp | Bump electrode structure and manufacture thereof |
WO2021106471A1 (en) * | 2019-11-29 | 2021-06-03 | 株式会社デンソー | Radar device |
JP2021085795A (en) * | 2019-11-29 | 2021-06-03 | 株式会社デンソー | Radar device |
WO2022113186A1 (en) * | 2020-11-25 | 2022-06-02 | 株式会社Fuji | Electric circuit forming method |
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