JPH0234056B2 - - Google Patents
Info
- Publication number
- JPH0234056B2 JPH0234056B2 JP59220117A JP22011784A JPH0234056B2 JP H0234056 B2 JPH0234056 B2 JP H0234056B2 JP 59220117 A JP59220117 A JP 59220117A JP 22011784 A JP22011784 A JP 22011784A JP H0234056 B2 JPH0234056 B2 JP H0234056B2
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- loop
- branch
- loop mode
- instruction code
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
- Devices For Executing Special Programs (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59220117A JPS6198445A (ja) | 1984-10-19 | 1984-10-19 | ル−プモ−ド検出回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59220117A JPS6198445A (ja) | 1984-10-19 | 1984-10-19 | ル−プモ−ド検出回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6198445A JPS6198445A (ja) | 1986-05-16 |
| JPH0234056B2 true JPH0234056B2 (https=) | 1990-08-01 |
Family
ID=16746180
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59220117A Granted JPS6198445A (ja) | 1984-10-19 | 1984-10-19 | ル−プモ−ド検出回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6198445A (https=) |
-
1984
- 1984-10-19 JP JP59220117A patent/JPS6198445A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6198445A (ja) | 1986-05-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5367550A (en) | Break address detecting circuit | |
| EP0592165B1 (en) | Pulse generation/sensing arrangement for use in a microprocessor system | |
| US4318172A (en) | Store data buffer control system | |
| JPH0234056B2 (https=) | ||
| JPH0320776B2 (https=) | ||
| US4566062A (en) | Timing control system in data processor | |
| JPH048821B2 (https=) | ||
| JP2563204B2 (ja) | ダイナミックバスサイズ検出回路 | |
| JP3057732B2 (ja) | 情報処理装置 | |
| JP2668382B2 (ja) | マイクロプログラムの試験のための擬似障害発生方法 | |
| JP3633747B2 (ja) | マイクロプロセッサのプログラムデバッグ装置 | |
| JPH0332817B2 (https=) | ||
| JP2001060162A (ja) | インサーキットエミュレータ | |
| JPS5880743A (ja) | マイクロプロセツサ用フエツチ予告装置 | |
| JPS63639A (ja) | プログラムデバツグ方式 | |
| JPH0357970A (ja) | パルス入力装置 | |
| JP2705359B2 (ja) | トレース回路 | |
| JP2001092692A (ja) | 時間測定回路及び時間測定方法 | |
| JPS63204329A (ja) | パイプライン処理型情報処理装置 | |
| JPS5936853A (ja) | 演算処理装置 | |
| JPS6239782B2 (https=) | ||
| JPH0553842A (ja) | マイクロコンピユータ | |
| JPH02268343A (ja) | 命令頻度測定方式 | |
| JPS6255738A (ja) | プログラムカウンタトレ−ス機構をもつデ−タ処理装置 | |
| JPS62111336A (ja) | デバツグ方式 |