JPH0233218B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a redundant working/standby communication system, and in particular, to a duplex communication system in which a plurality of processing devices are combined into a working system and a standby system on a redundant communication bus. The present invention relates to a communication bus route control method in a data transfer bus system to which a processor (processor) is connected.

(b) Technical Background FIG. 1 is a diagram showing an example of a data transfer bus system in an electronic exchange to which the present invention is applied. In Figure 1, there are n call processing processors that share and process calls that enter the electronic exchange.
CPR and a management processor MPR that comprehensively manages all call processing processors CPR are able to communicate with each other via duplex communication buses CBUS0 and CBUS1. Each call processing processor
The CPR and management processor MPR each include a central processing unit CC, a main memory MM, a signal reception distribution device SRD, and a network NW, which are interconnected via a processor bus PBS.
It consists of a pair of processors PR, one of which always operates as the active system and the other stands by as a standby system. (The two sets of processors PR, the central processing unit CC included in each processor PR, and the main memory
When distinguishing between MM, signal reception distribution device SRD, and network NW, one is 0 and the other is 1.
It is called a system and is displayed by adding 0 or 1 to each symbol. ) Processor PR0, which constitutes the management processor MPR, connects the communication control device to the communication bus CBUS0.
The processor PR1 is fixedly connected via the IMPC0, and the processor PR1 is connected to the communication bus CBUS1 as a communication control device.
Fixedly connected via IMPC1. In addition, the two sets of processors PR that make up each call processing processor CPR are connected to the corresponding communication control device IMPC.
This creates two sets of communication buses CBUS0 and CBUS1.
selectively connected to one side. Each communication bus CBUS
0 and CBUS1, one is used as an active system and the other is used as a backup system according to instructions from the corresponding processors PR0 and PR1 of the management processor MPR. The communication bus CBUS0 or CBUS1, which has become the active system, is used for data transfer between the active processor PR of each call processing processor CPR and the corresponding processor PR of the management processor MPR.
CBUS1 is used for data transfer between the backup processor PR of each call processing processor CPR and the corresponding processor PR of the management processor MPR. Therefore, each communication control device corresponding to each processor PR constituting each call processing processor CPR
IMPC is connected to the active communication bus CBUS0 or CBUS1 if the corresponding processor PR is the active system, and is connected to the protection communication bus CBUS0 or CBUS1 if the corresponding processor PR is the backup system. Each communication bus CBUS0 and CBUS1 has a communication bus controller IPBC0 or IPBC1, respectively.
is provided, and the communication bus CBUS0 or CBUS1
A communication bus arising from the processor PR that shares the
Controls requests to use CBUS0 or CBUS1.
Each communication bus control device IPBC0 and IPBC1 polls the identification number assigned to each communication control device IMPC and uses the communication bus CBUS0 or CBUS1.
to the connected communication control device IMPC. When the communication control device IMPC that has a request to use the communication bus CBUS0 or CBUS1 receives its own unique identification number, the communication control device IMPC requests the use of the communication bus CBUS0 or CBUS1.
After sending a signal to stop polling to IPBC0 or IPBC1, the communication bus CBUS0 or CBUS1 is occupied and necessary data transfer is performed. When the data transfer is completed, the communication control device IMPC sends a signal to the communication bus control device IPBC0 or IPBC1 to restart the polling that has been stopped, and the communication bus CBUS0
Or release the occupation of CBUS1.

(c) Prior Art and Problems FIG. 2 is a diagram showing an example of a conventional communication bus route control method in this type of data transfer bus system. The data transfer bus system shown in FIG. 2 has the same configuration as that in FIG. Device MM, signal reception distribution device
SRD or network NW is omitted.
Each of the communication bus control devices IPBC0 and IPBC1 assigns an identification number A0 to the communication control device IMPC of the corresponding management processor MPR, and assigns an identification number A0 to each communication control device IMPC of each of the n groups of call processing processors CPR. , each with identification number A1
to A2n were assigned, and polling was controlled for each of the 2n+1 identification numbers. Polling using such a large number of identification numbers takes a long time, and it is necessary to individually manage whether the processor PR corresponding to each communication control device IMPC is operating in the active system or the backup system.
Data transfer via the communication bus CBUS0 or CBUS1 required complex processing.

(d) Purpose of the Invention The purpose of the present invention is to eliminate the drawbacks of the conventional communication bus route control method as described above, and to reduce the identification number of the communication control device necessary for data transfer via the communication bus as much as possible. The objective is to realize a communication bus route control system that simplifies the processing required for data transfer via the communication bus as much as possible by reducing the number of connections and by eliminating the need to manage the current and spare status of the corresponding processing device as much as possible.

(e) Structure of the Invention The purpose of this invention is to provide a plurality of sets of call processing processors CPR each consisting of two processors PR0 and PR1, one of which operates as an active system and the other as a backup system, one of which operates as an active system, and the other as a backup system. between a set of management processors MPR that operates as a management processor MPR and the call processing processor CPR or
and duplex communication buses CBUS0 and CBUS1 used for mutual data transfer between the call processing processors (CPR) or between the call processing processors (CPR) and the management processor; Each communication bus is provided with communication bus control devices IPBC0 and IPBC1, and each processor of each of the call processing processors can be connected to any of the duplex communication buses via the communication control devices IMPC0 and IMPC1. , each processor of each of the call processing processors and the communication control device are connected via a processor bus, and each of the management processors is connected to one of the duplex communication buses via the communication control device,
In a data transfer bus system in which one of two processors, the management processor operating as an active system and a call processing processor of each set, is used as an active system and data is transferred via the communication bus of the active system, each call A communication control device connected to each processor of the processing processor includes transfer control units IF0 and IF1 corresponding to the duplexed communication bus, respectively;
The common section includes a control circuit CTL that occupies a communication bus connected via the transfer control section and controls data transfer with other communication control devices. The transfer control section includes a driver D and a receiver R that transmit and receive data to and from correspondingly connected communication buses, and each transfer control section receives current/standby information from the processor device of the call processing processor. and the current/standby information of the communication bus connected to the own transfer control unit, and the information received from the processor of the call processing processor indicates the current use, and the information received from the communication bus indicates the current use. means G10, G20, G30, G40, G1 for driving said driver and receiver when
1, G21, G31, and G41, and is achieved by connecting the active processors of the two processors constituting the call processing processor to the active communication bus of the duplexed communication bus.

(f) Embodiment of the invention An embodiment of the invention will be described below with reference to the drawings. FIG. 3 is a diagram showing a control method of a communication control device according to an embodiment of the present invention, and FIG. 4 is a diagram showing a communication bus route control method according to an embodiment of the present invention. In FIG. 3, the communication control device IMPC includes transfer control units IF0 and IF1 corresponding to the redundant communication buses CBUS0 and CBUS1, respectively;
It consists of a common section COM. Each transfer control unit IF
0 and IF1 are respectively provided with a driver D and a receiver R that transmit and receive data to and from the corresponding communication bus CBUS0 or CBUS1.
In addition, the common part COM includes the transfer control part IF0 or IF
Communication bus CBUS0 or
It is equipped with a control circuit CTL that performs various controls for occupying CBUS1, and controls data transfer with other communication control device IMPC to be communicated with via the occupied communication bus CBUS0 or CBUS1. . From the corresponding processor PR, the processor PR is sent via the processor bus PBUS.
If the processor PR is currently operating in the active system, the active protection signal A/S with a logic value of 1 is transmitted, and if the processor PR is currently operating in the protection system, the active protection signal A/S with a logic value of 0 is transmitted. . In addition, the communication bus control device IPBC corresponding to each communication bus CBUS0 and CBUS1
0 and IPBC1, the corresponding communication bus CBUS
0 and CBUS1, the communication bus CBUS0
or logical value 1 if CBUS1 is the active system
The working standby signal A/S0 or A/S1 is transmitted to each communication control device IMPC, and the communication bus CBUS0
Or logical value 0 if CBUS1 is a standby system.
A working standby signal A/S0 or A/S1 is transmitted. Communication bus CBUS0 is currently in use, and communication bus CBUS0 is currently in use.
If CBUS1 is a backup system, the communication bus
Working standby signal A/S0 with logical value 1 from CBUS0
However, the communication bus CBUS1 also transmits the working standby signal A/S1 having a logic value of 0. When the corresponding processor PR operates as the active system in such a state, the active standby signal A/S with a logic value of 1 is transmitted from the processor bus PBU, so that the gates G10, G30, and G4 in the transfer control unit IF0
0 is in a conductive state, and all gates G11 to G41 in the transfer control unit IF1 are in a blocked state. As a result, the drive signal dv sent from the control circuit CTL of the common section COM energizes only the driver D and receiver R in the transfer control section IF0, and the driver D and receiver R in the transfer control section IF1.
is not energized, the communication control unit IMPC connects the corresponding processor PR to the communication bus CBUS, which is the current system.
It will be connected to 0. Furthermore, when the corresponding processor PR operates as a standby system, the active standby signal A/S with a logic value of 0 is transmitted from the processor bus PBUS, so the gates G21, G31, and G41 in the transfer control unit IF1 are rendered conductive. state, and the gate G1 in the transfer control unit IF0
0 to G40 are all in the inhibited state. As a result, the drive signal dv sent from the control circuit CTL of the common section COM is transferred to the driver D in the transfer control section IF1.
energizes only the receiver R and the transfer control unit IF.
Since the driver D and receiver R located at 0 are not activated, the communication control device IMPC connects the corresponding processor PR to the communication bus CBUS1, which is a standby system. On the other hand, if communication bus CBUS0 is the backup system and communication bus CBUS1 is the active system, then
A working standby signal A/S0 having a logic value of 0 is transmitted from the communication bus CBUS0, and a working standby signal A/S1 having a logic value of 1 is transmitted from the communication bus CBUS1. When the corresponding processor PR operates as the active system in such a state, the active standby signal A/S with a logic value of 1 is transmitted from the processor bus PBUS.
Gates G11, G31, and G41 in the transfer control section IF1 become conductive, and the transfer control section IF1 becomes conductive.
Gates 10 to G40 in IF0 are all in a blocked state. As a result, the control circuit of the common part COM
The drive signal dv sent from the CTL is transferred to the transfer control unit IF
Since only the driver D and receiver R in the transfer control unit IF0 are energized and the driver D and receiver R in the transfer control unit IF0 are not energized, the communication control device IMPC
The corresponding processor PR is connected to the communication bus CBUS1 which is the active system. Also, if the corresponding processor PR operates as a backup system,
Since the active standby signal A/S with a logical value of 0 is transmitted from the processor bus PBUS, the transfer control unit IF0
The gates G20, G30, and G40 in the transfer control section IF1 are in a conductive state, and the gates G11 to G41 in the transfer control section IF1 are all in a blocking state. As a result, the drive signal dv sent from the control circuit CTL of the common section COM energizes only the driver D and receiver R in the transfer control section IF0, and
Since driver D and receiver R in IF1 are not activated, communication control device IMPC connects the corresponding processor PR to communication bus CBUS0, which is a standby system. In the data transfer bus system shown in FIG. 4 configured using such a communication control device IMPC, the communication bus control device IPBC
0 and IPBC1 are management processors MPR and n
The same identification numbers A0 to An are assigned to each of the two sets of communication control devices IMPC0 and IMPC1 corresponding to the respective call processing processors CPR. Each communication bus control device IPBC0 and IPBC1 controls the corresponding communication bus CBUS0 or
The logic value 0 or logic value 1 via CBUS1
Polling is performed using the identification numbers A0 to An while transmitting the active standby signal A/S0 or A/S1. Each communication control device IMPC connects the corresponding processor PR to either one of the communication buses CBUS0 and CBUS1 depending on whether the corresponding processor PR is operating in the active system or the standby system. Therefore, the communication bus control devices IPBC0 and IPBC1 only need to perform polling using n+1 identification numbers, and each communication control device
IMPC is also a processor PR that transfers data between each other.
It is possible to monopolize the connected communication bus CBUS0 or CBUS1 and execute data transfer without determining whether the communication bus CBUS0 or CBUS1 is operating in the active system or the backup system.

As is clear from the above description, according to this embodiment, the communication bus control devices IPBC0 and IPBC1 are
The management processor MPR and n sets of call processing processors CPR can be polled using +1 identification numbers, which is about half the number in FIG. 2 (2n+1), resulting in a reduction in processing time. In addition, each processor PR is automatically connected to the active or standby communication bus CBUS0 or CBUS1 depending on whether it is operating in the active or standby system. There is no need to individually determine whether CBUS0 and CBUS1 are the active system or the backup system, and the data transfer process is simplified.

Note that FIGS. 3 and 4 are merely one embodiment of the present invention, and the configuration of the communication control device IMPC, for example, is not limited to that shown in the figures, and many other modifications may be considered. However, the effects of the present invention remain the same in either case. Furthermore, the configuration of the data transfer bus system to which the present invention is applied is not limited to that shown in the drawings, and many other modifications may be considered, but the effects of the present invention remain the same in any case. Furthermore, it goes without saying that the object of the present invention is not limited to electronic exchanges.

(g) Effects of the Invention As described above, according to the present invention, in the data transfer bus system, the identification number of the communication control device required for data transfer via the communication bus is reduced by about half, and the corresponding processing It has become possible to realize a communication bus route control method that eliminates the need to manage active and spare devices and communication buses, and greatly simplifies the processing required for data transfer via the communication bus.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of a data transfer bus system in an electronic exchange to which the present invention is applied, and FIG.
The figure shows an example of a conventional communication bus route control method in this type of data transfer bus system, FIG. 3 shows a control method of a communication control device according to an embodiment of the present invention, and FIG. FIG. 2 is a diagram illustrating a communication bus route control method according to an embodiment. In the figure, CPR is a call processing processor, MPR
is the management processor, PR is the processor, CC is the central processing unit, MM is the main memory, SRD is the signal reception distribution device, NW is the network, IOC is the input/output control device, I0 is the input/output device, PBUS is the processor bus, IMPC is the communication control device, CBUS0 and
CBUS1 is a communication bus, IPBC0 and IPBC1 are communication bus control devices, IF0 and IF1 are transfer control units,
COM is a common part, CTL is a control circuit, D is a driver, R is a receiver, G10 to 40 and G11
G41 to G41 are gates, A/S, A/S0 and A/S1 are active reserve signals, dv is a drive signal, A0
A2n to A2n indicate identification numbers.

Claims (1)

[Scope of Claims] 1. A plurality of sets of call processing processors CPR each consisting of two processors PR0 and PR1, one of which operates as an active system and the other as a standby system, one of which operates as an active system, and one of which operates as a backup system.
a pair of management processors MPR, the other of which operates as a backup system, and duplex communication buses CBUS0 and CBUS1 used for mutual data transfer between the call processing processor CPR or between the call processing processor CPR and the management processor; It is equipped with communication bus control devices IPBC0 and IPBC1 provided for each of the communication buses that control the use of the communication bus, and each processor of each of the call processing processors is connected to the duplex processor via the communication control devices IMPC0 and IMPC1. The processors of each of the call processing processors and the communication control device are connected via the processor bus, and the management processors are connected to each other via the communication control device for duplex communication. connected to one of the buses,
In a data transfer bus system in which one of two processors, the management processor operating as an active system and a call processing processor of each set, is an active system and data is transferred via the communication bus of the active system, each call A communication control device connected to each processor of the processing processor includes transfer control units IF0 and IF1 corresponding to the duplexed communication buses, respectively, and a common unit COM, and the common unit is connected to the transfer control unit via the transfer control unit. Equipped with a control circuit CTL that controls data transfer between other communication control devices by occupying a communication bus connected to the Each of the transfer control units includes a driver D and a receiver R for transmitting and receiving, and each of the transfer control units receives working/standby information from the processor device of the call processing processor and the working/standby information of the communication bus connected to its own transfer control unit. means G10, G20, for driving the driver and receiver when the information received from the processor of the call processing processor indicates the current use, and the information received from the communication bus indicates the current use; G30, G4
A communication bus comprising: Route control method.