JPH0230596B2 - - Google Patents

Info

Publication number
JPH0230596B2
JPH0230596B2 JP54122228A JP12222879A JPH0230596B2 JP H0230596 B2 JPH0230596 B2 JP H0230596B2 JP 54122228 A JP54122228 A JP 54122228A JP 12222879 A JP12222879 A JP 12222879A JP H0230596 B2 JPH0230596 B2 JP H0230596B2
Authority
JP
Japan
Prior art keywords
substrate
semiconductor
layer
metal layer
coating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP54122228A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5646583A (en
Inventor
Noboru Masuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP12222879A priority Critical patent/JPS5646583A/ja
Publication of JPS5646583A publication Critical patent/JPS5646583A/ja
Publication of JPH0230596B2 publication Critical patent/JPH0230596B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01049—Indium [In]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Hall/Mr Elements (AREA)
JP12222879A 1979-09-21 1979-09-21 Semiconductor device and manufacture thereof Granted JPS5646583A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12222879A JPS5646583A (en) 1979-09-21 1979-09-21 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12222879A JPS5646583A (en) 1979-09-21 1979-09-21 Semiconductor device and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS5646583A JPS5646583A (en) 1981-04-27
JPH0230596B2 true JPH0230596B2 (enrdf_load_stackoverflow) 1990-07-06

Family

ID=14830733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12222879A Granted JPS5646583A (en) 1979-09-21 1979-09-21 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS5646583A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2569052B1 (fr) * 1984-08-10 1987-05-22 Thomson Csf Procede d'interconnexion de circuits integres
JPS63152185A (ja) * 1986-12-16 1988-06-24 Sharp Corp 感磁性半導体装置の製造方法
US5316803A (en) * 1992-12-10 1994-05-31 International Business Machines Corporation Method for forming electrical interconnections in laminated vias

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5544364Y2 (enrdf_load_stackoverflow) * 1972-07-26 1980-10-17
JPS5137424U (enrdf_load_stackoverflow) * 1974-09-09 1976-03-19
CH645208A5 (de) * 1978-10-31 1984-09-14 Bbc Brown Boveri & Cie Verfahren zur herstellung von elektrischen kontakten an halbleiterbauelementen.

Also Published As

Publication number Publication date
JPS5646583A (en) 1981-04-27

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