JPH02299248A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH02299248A JPH02299248A JP1120684A JP12068489A JPH02299248A JP H02299248 A JPH02299248 A JP H02299248A JP 1120684 A JP1120684 A JP 1120684A JP 12068489 A JP12068489 A JP 12068489A JP H02299248 A JPH02299248 A JP H02299248A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- flexible printed
- semiconductor device
- conductive pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- 238000000034 method Methods 0.000 abstract description 6
- 238000005476 soldering Methods 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 2
- 239000000463 material Substances 0.000 abstract description 2
- 239000008188 pellet Substances 0.000 description 4
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/361—Assembling flexible printed circuits with other printed circuits
- H05K3/363—Assembling flexible printed circuits with other printed circuits by soldering
Abstract
Description
【発明の詳細な説明】 ［産業上の利用分野］ 本発明は半導体装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor device.
〔従来の技術Ｊ
周知のように、ＩＣペレットのアッセンブリ工程におい
て、その小型化のため樹脂テープ上に設けた銅箔から成
る導電パターンにペレットを接続するテープボンディン
グ技術が開発されている。[Prior Art J] As is well known, in the process of assembling IC pellets, a tape bonding technique has been developed in which the pellets are connected to a conductive pattern made of copper foil provided on a resin tape in order to reduce the size of the IC pellets.
このテープボンディングされたＩＣを外部電気回路と接
続するための方法として、第２図に示すようにフレキシ
ブルテープをある大′きさで切断してＩＣが実装された
フレキシブルプリント配線板と成し、上記フレキシブル
プリント配線板の導電パターンをさらに外部のプリント
配線板上に形成された導電パターンにろう付は等により
接続する方法（アウター“リードボンディング）が知ら
れている。As a method for connecting this tape-bonded IC to an external electric circuit, as shown in Fig. 2, a flexible tape is cut into a certain size to form a flexible printed wiring board on which the IC is mounted. A method (outer "lead bonding") is known in which the conductive pattern of the flexible printed wiring board is further connected to a conductive pattern formed on an external printed wiring board by brazing or the like.
［発明が解決しようとする課題Ｊ
しかし、このようなアウターリードボンディング法では
つぎのような問題点がある。すなわち、フレキシブルプ
リント配線板のアウターリードの１本に対し、外部プリ
ント配線板上に１つの専用接続ランドを設ける必要があ
る。このため複数個のＩＣを実装する場合、メモリー■
Ｃ等のように同一配線ライン上にパラレルに接続する場
合でも１個のＩＣに対し１組の接続ランドを設けなけれ
ばならず、プリント配線板上の平面方向のスペースを縮
小することが困難となる。[Problem to be Solved by the Invention J] However, such an outer lead bonding method has the following problems. That is, it is necessary to provide one dedicated connection land on the external printed wiring board for one outer lead of the flexible printed wiring board. Therefore, when mounting multiple ICs, memory ■
Even when connecting in parallel on the same wiring line as in C, etc., one set of connection lands must be provided for one IC, making it difficult to reduce the horizontal space on the printed wiring board. Become.
本発明の目的は、このような問題を解決し、プリント配
線板の平面方向のスペースを縮小した小型の半導体装置
を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to solve such problems and provide a small-sized semiconductor device in which the space of a printed wiring board in the planar direction is reduced.
［課題を解決するための手段Ｊ
本発明の半導体装置は、１枚のプリント配線板とＩＣを
テープボンディングされた複数のフレキシブルプリント
配線板より成り、前記プリント配＃ｉ板上の同一面の同
一位置上に上記フレキシブルプリント配線板が多重に配
置され、上記フレキシブルプリント配線板の導電パター
ンが相互に電気的に接続され、うち１個のフレキシブル
プリント配線板の導電パターンが前記プリント配線板の
導電パターンに電気的に接続されて成ることを特徴とす
る。[Means for Solving the Problems J] The semiconductor device of the present invention is composed of one printed wiring board and a plurality of flexible printed wiring boards to which ICs are tape-bonded, and the semiconductor device is composed of one printed wiring board and a plurality of flexible printed wiring boards on which ICs are tape-bonded. The flexible printed wiring boards are arranged in multiple positions, the conductive patterns of the flexible printed wiring boards are electrically connected to each other, and the conductive pattern of one of the flexible printed wiring boards is connected to the conductive pattern of the printed wiring board. It is characterized by being electrically connected to.
［実 施 例Ｊ
第１図に本発明の実施例を示す。まず、プリント配線板
７の導電パターン６にＩＣＩがテープボンデインクされ
たフレキシブルプリント配線板４′の導電パターン３を
半田付等により接続する。上記フレキシブルプリント配
線板には、その基材フィルム４′の一部に接続用の孔５
を設けておき、その孔を介してさらにもう１個のフレキ
シブルプリント配線板を半田付等により接続する。[Example J FIG. 1 shows an example of the present invention. First, the conductive pattern 3 of the flexible printed wiring board 4', on which the ICI is tape-bonded, is connected to the conductive pattern 6 of the printed wiring board 7 by soldering or the like. The flexible printed wiring board has connection holes 5 in a part of the base film 4'.
is provided, and another flexible printed wiring board is connected through the hole by soldering or the like.
本実施例は、２重構造の例を示したが、さらに上部に接
続することにより３重以上の構造も可能である。また、
各ＩＣの端子が共通に接続できない配線の場合には、Ｉ
Ｃに接続しない外部回路への接続専用のパターンを下部
のフレキシブルプリント配線板に設け、上部のフレキシ
ブルプリント配線板の導電パターンをそこへ接続し外部
接続専用パターンを外部プリント配線板へ接続すること
により解決できる。Although this embodiment shows an example of a double structure, a triple or more structure is also possible by further connecting at the top. Also,
In the case of wiring that cannot connect the terminals of each IC in common,
By providing a pattern dedicated to connection to an external circuit that is not connected to C on the lower flexible printed wiring board, connecting the conductive pattern of the upper flexible printed wiring board to it, and connecting the pattern dedicated to external connection to the external printed wiring board. Solvable.
［発明の効果］
本発明によれば、プリント配線板上の１組の接続ランド
に対し、２個以上のＩＣを実装することか可能となり、
約２倍以上のスペース効率が得られるため本半導体装置
を用いた機器等を小型化することができる。[Effects of the Invention] According to the present invention, it is possible to mount two or more ICs on one set of connection lands on a printed wiring board,
Since the space efficiency is approximately twice as high, it is possible to downsize equipment using the present semiconductor device.
第１図は本発明の実施例における半導体装置の断面図、
第２図は従来技術における半導体装置の断面図。
ｌ・・・・・ＩＣベレット
２・・・・・モールド樹脂
３・・・・・フレキシブルプリント配線板の導電パター
ン
４．４′ ・・フレキシブルプリント配線板の基材フィ
ルム
５・・・・・フレキシブルプリント配線板の基材フィル
ムに設けた孔FIG. 1 is a cross-sectional view of a semiconductor device in an embodiment of the present invention;
FIG. 2 is a sectional view of a conventional semiconductor device. l...IC pellet 2...Mold resin 3...Conductive pattern 4,4' of flexible printed wiring board 5...Base material film of flexible printed wiring board 5...Flexible Holes made in the base film of printed wiring boards
Claims (1)
ープボンディングされた複数のフレキシブルプリント配
線板より成り、前記プリント配線板上の同一面の同一位
置に前記フレキシブルプリント配線板が多重に配置され
、前記フレキシブルプリント配線板の導電パターンが相
互に電気的に接続され、それらのうち１個のフレキシブ
ルプリント配線板の導電パターンが、前記プリント配線
板の導電パターンに電気的に接続されて成ることを特徴
とする半導体装置。It consists of a plurality of flexible printed wiring boards in which one printed wiring board and semiconductor integrated circuits (ICs) are tape-bonded, and the flexible printed wiring boards are arranged in multiple layers at the same position on the same surface on the printed wiring board, The conductive patterns of the flexible printed wiring board are electrically connected to each other, and the conductive pattern of one of the flexible printed wiring boards is electrically connected to the conductive pattern of the printed wiring board. semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1120684A JPH02299248A (en) | 1989-05-15 | 1989-05-15 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1120684A JPH02299248A (en) | 1989-05-15 | 1989-05-15 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02299248A true JPH02299248A (en) | 1990-12-11 |
Family
ID=14792392
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1120684A Pending JPH02299248A (en) | 1989-05-15 | 1989-05-15 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02299248A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2494223A (en) * | 2012-03-02 | 2013-03-06 | Novalia Ltd | Flexible circuit board assembly |
-
1989
- 1989-05-15 JP JP1120684A patent/JPH02299248A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2494223A (en) * | 2012-03-02 | 2013-03-06 | Novalia Ltd | Flexible circuit board assembly |
| GB2494223B (en) * | 2012-03-02 | 2014-03-12 | Novalia Ltd | Circuit board assembly |
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