US20060000718A1 - Substrate plating methods and apparatus - Google Patents
Substrate plating methods and apparatus Download PDFInfo
- Publication number
- US20060000718A1 US20060000718A1 US10/881,016 US88101604A US2006000718A1 US 20060000718 A1 US20060000718 A1 US 20060000718A1 US 88101604 A US88101604 A US 88101604A US 2006000718 A1 US2006000718 A1 US 2006000718A1
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- Prior art keywords
- pad
- major surface
- package substrate
- substrates
- deformable conductor
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
- H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/0152—Temporary metallic carrier, e.g. for transferring material
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1536—Temporarily stacked PCBs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1581—Treating the backside of the PCB, e.g. for heating during soldering or providing a liquid coating on the backside
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Definitions
- inventive subject matter is related to plating of a substrate. More specifically, embodiments of the invention relate to methods and apparatus for plating a substrate without the need of a plating bar.
- Integrated circuits have been manufactured for many years. Manufacturing integrated circuits involves integrating various active and passive circuit elements into a piece of semiconductor material, referred to as a die.
- the die is attached to a package substrate to form a ceramic or plastic package.
- the die is encapsulated within the package substrate to form or finish the package.
- the finished package can be attached directly to a printed circuit board by connecting input/output pins, arranged along a major surface of the package, to corresponding pads on the printed circuit board.
- the finished package is attached to an interposer.
- the finished package and the interposer are then attached to a printed circuit board.
- An electronic system can be formed by connecting various finished packages, containing various dies or integrated circuits, to a printed circuit board.
- the printed circuit board will include traces for interconnecting the various integrated circuits or dies associated with the various packages.
- BGA ball grid array
- BGA packages are directly attached to a supporting substrate such as a printed circuit board.
- an interposer is directly attached to the printed circuit board and the BGA package is attached to the interposer.
- the interposer includes routing traces and vias that connect the solder bumps of the BGA to contacts that are attached to the printed circuit board.
- the interposer “fans out” the relatively small die pad pitch of the integrated circuit to the larger contact pad pitch of the printed circuit board.
- the interposer material has a coefficient of thermal expansion intermediate the coefficient of thermal expansion of the printed circuit board and the coefficient of thermal expansion of the BGA package. The interposer, therefore, reduces mechanical stress induced by different coefficients of thermal expansion between the package and the printed circuit board.
- FIG. 1 is a top view of a printed circuit board having a package that is formed according to an embodiment of the invention.
- FIG. 2 illustrates a top view of an unfinished package substrate, according to an embodiment of this invention.
- FIG. 3 illustrates a cross-sectional view of a package substrate prior to plating materials onto the wire bond pads, according to an embodiment of this invention.
- FIG. 4 illustrates an exploded cross-sectional view of a pair of package substrates prior to plating of the wire bond pads, and a conductive adhesive tape, according to an embodiment of this invention.
- FIG. 5 illustrates an exploded cross-sectional view of a conductive adhesive tape sandwiched between a pair of package substrates, according to an embodiment of this invention.
- FIG. 6 illustrates a cross-sectional view of a package substrate, according to an embodiment of this invention.
- FIG. 7 illustrates a cross-sectional view of a package substrate prior to plating materials onto the wire bond pads, according to another embodiment of this invention.
- FIG. 8 illustrates an exploded cross-sectional view of a pair of package substrates prior to plating of the wire bond pads, and a reusable conductive portion, according to another embodiment of this invention.
- FIG. 9 illustrates an exploded cross-sectional view of a reusable conductive portion sandwiched between a pair of package substrates, according to another embodiment of this invention.
- FIG. 10 illustrates a cross-sectional view of package that includes a die attached to the package substrate, according to an embodiment of this invention.
- FIG. 11 illustrates a flow diagram of a method of plating the bond fingers of a package substrate, according to an embodiment of this invention.
- FIG. 12 illustrates another flow diagram of a method of plating the bond fingers of a package substrate, according to an embodiment of this invention.
- FIG. 1 is a top view of a printed circuit board 100 .
- the printed circuit board 100 includes an electrical device or component 1000 having a package substrate 600 formed according to an embodiment of the invention.
- the printed circuit board (“PCB”) 100 is a multi-layer plastic board that includes patterns of printed circuits on one or more layers of insulated material. The patterns of conductors correspond to the wiring of an electronic circuit formed on one or more of the layers of the printed circuit board 100 .
- the printed circuit board 100 also includes electrical traces 110 .
- the electrical traces 110 can be found on an exterior surface 120 of the printed circuit board 100 , and also can be found on the various layers within the printed circuit board 100 .
- Printed circuit boards also include through holes (not shown in FIG. 1 ) which are used to interconnect traces on various layers of the printed circuit board 100 .
- the printed circuit board 100 can also include planes of metallized materials such as ground planes, power planes, or voltage reference planes (not shown in FIG. 1 ).
- the printed circuit board 100 is also populated with various components 130 , 132 , 134 , 138 , 1000 .
- the components 130 , 132 , 134 , 138 , 1000 can be either discrete components, or semiconductor chips which include thousands of transistors.
- the components 130 , 132 , 134 , 138 , 1000 can use any number of technologies to connect to the exterior surface 120 of the printed circuit board 100 .
- pins may be inserted into plated through holes, or pins may be extended through the printed circuit board 100 .
- An alternative technology is surface mount technology, where an electrical component, such as component 1000 , mounts to an array of pads on the exterior surface 120 of the printed circuit board 100 .
- component 1000 could be a ball grid array package or device that has an array of balls or bumps that interact or are connected to a corresponding array of pads on the exterior surface 120 of the printed circuit board 100 .
- the electrical device or component 1000 includes a package substrate 600 and a die 1010 (shown in FIG. 10 ).
- the package substrate 600 is formed according to an embodiment of this invention.
- the die is electrically coupled to the package substrate 600 to form a package 1020 that can be attached to the printed circuit board 100 .
- the printed circuit board 100 can also include traces 110 for making external connections to other electrical or electronic devices.
- the component 1000 is a central processing chip or microprocessor, that can be used as a controller or for any other function.
- the printed circuit board 100 shown is a daughter board, the printed circuit board 100 could also be a motherboard, and the component or electrical device could be the main processing unit for a computer. In some computing environments, multiple main processing units can be used.
- the printed circuit board 100 includes a first edge connector 140 and a second edge connector 142 .
- Other traces that connect with the edge connectors 140 , 142 will have traces internal to the printed circuit board 100 .
- FIG. 2 illustrates a top view of an unfinished package substrate 200 , according to an embodiment of this invention.
- the unfinished package substrate 200 is formed along with other package substrates. Portions of other package substrates are shown as elements 201 , 202 , 203 , 204 .
- a plurality of package substrates 200 , 201 , 202 , 203 , 204 will be formed on a single sheet of printed circuit board material.
- the sheet of printed circuit board material that includes a plurality of unfinished package substrates 200 , 201 , 202 , 203 , 204 is treated to form a plurality of finished substrates 600 .
- the printed circuit board material is cut along the cut lines 211 , 212 , 213 , 214 to form a plurality of individual, finished substrates 600 (see FIG. 6 ) from the previously unfinished package substrates 200 , 201 , 202 , 203 , 204 , according to an embodiment. Since each of the individual unfinished package substrates 200 are treated substantively the same, only the treatment of one individual, unfinished package substrate 200 will now be further detailed. Details of the remaining package substrates 201 , 202 , 203 , 204 will not be further detailed for the sake of simplicity.
- the unfinished package substrate 200 includes a land pad major surface side 310 (shown in FIGS. 3-6 ) and a wire bond pad major surface side 320 .
- the land pad major surface side 320 includes at least one bond finger 322 and a trace 332 .
- a via 340 extends through a portion of the unfinished package substrate 200 .
- the via 340 is lined with conductive material 342 .
- the via 340 and the electrical trace 332 attach the bond finger 322 to a land on the land pad surface side 310 (shown in FIGS. 3-6 ).
- FIG. 3 illustrates a cross-sectional view of unfinished package substrate 200 prior to plating, according to an embodiment of this invention.
- the wire bond pad major surface side 320 includes patterned photoresist 350 .
- the patterned photoresist is formed by laying down a layer of photoresist and then exposing certain portions of the photoresist with either a negative or a positive image. Unwanted photoresist can be removed (either the exposed portion or the unexposed portion) to produce openings in the photoresist at the wire bond pad of the bond finger 322 .
- the photoresist is formulated to substantially electrically isolate the wire bond pads of the bond fingers 322 .
- the photoresist is also formulated to remain in place when exposed to an electrolytic plating solution.
- the land pad major surface side 310 includes a land pad 312 .
- the land pad major surface side 310 also includes a layer of photoresist 360 that electrically isolates the land pad 312 from the remaining portion of the land pad major surface side 310 .
- the openings in the photoresist 360 are formulated in substantially the same fashion as the openings in the photoresist 350 on the wire bond pad major surface side 320 .
- the openings in the photoresist 350 correspond to the wire bond pads of the bond fingers 322
- the openings in the photoresist 360 correspond to the land pads 312 on the land pad major surface side 310 of the unfinished package substrate 200 .
- FIG. 4 illustrates an exploded cross-sectional view of a pair of unfinished package substrates 200 , 200 ′ prior to plating of the wire bond pads, such as bond finger 322 , and a conductive adhesive tape 410 , according to an embodiment of this invention.
- the conductive adhesive tape 410 is capable of carrying a current, and is also capable of sealing the land pad major surface side 310 of each of the unfinished package substrates 200 , 200 ′.
- the conductive adhesive tape 410 is available under the product name X-7001 from SUMITOMO 3M Limited of Tokyo, Japan.
- FIG. 5 illustrates an exploded cross sectional view of the conductive adhesive tape 410 sandwiched between a pair of unfinished package substrates 200 , 200 ′, according to an embodiment of this invention.
- the conductive adhesive tape 410 is deformable. As the first unfinished package substrate 200 is forced toward the second unfinished package substrate 200 ′, the conductive adhesive tape 410 deforms. Portions of the conductive adhesive tape extend into the openings in the photoresist 360 which correspond to the land pads 312 .
- the conductive adhesive tape 410 As the conductive adhesive tape 410 is sandwiched between the first unfinished package substrate 200 and the second unfinished package substrate 200 ′, the conductive adhesive tape deforms or conforms until it contacts the land pads 312 of the first unfinished package substrate 200 and the second unfinished package substrate 200 ′.
- the conductive adhesive tape 410 therefore, places each of the land pads 312 into electrical connection with a source of current 510 .
- the source of current 510 is electrically connected to the conductive adhesive tape 410 .
- the land pads 312 are connected to the wire bond pads of the bond fingers 322 by way of the via 340 .
- the plating package 500 is placed into an electrolytic solution.
- the conductive adhesive tape 410 substantially seals the land pads 312 from the electrolytic solution.
- the source of current 510 is enabled.
- the current flows through the conductive adhesive tape 410 to each of the land pads 312 through a via 340 and the bond fingers 322 of the wire bond pad.
- the source of current 510 is enabled for a selected amount of time in order to produce a plating layer 522 on the wire bond pad of the bond fingers 322 .
- the plating layer 522 in an embodiment includes a layer of nickel and a layer of gold.
- the plating package 500 In order to obtain different layers, the plating package 500 must be placed in different electrolytic solutions to produce layers of different compositions. While in each solution, the source of current 510 is enabled for a selected amount of time to produce a plating layer or a portion of a plating layer 522 of a selected thickness. After the plating layer 522 has been deposited, the plating package 500 is disassembled.
- the conductive adhesive layer 410 generally is used only one time. Therefore the conductive adhesive layer 410 is discarded.
- FIG. 6 illustrates a cross-sectional view of a package substrate 600 , according to an embodiment of this invention.
- the end result is the substrate pad 600 .
- the substrate pad 600 has a plating layer 522 on the wire bond pad of the bond finger 322 .
- the main difference between the unfinished package substrate 200 and the package substrate 600 is that the bond finger 322 of the wire bond pad is plated with plating layer 522 .
- the substrate package 600 is ready to receive a die or chip 1000 as shown in FIG. 10 .
- the plating layer of nickel and gold provides a layer on the bond finger 322 of the wire bond pad that will provide for a reliable electrical connection between a wire associated with the die 1000 and the wire bond pad of the bonding finger 322 .
- the plating layer 522 can also have layers of different materials in other embodiments of the invention.
- Other plating layer 522 compositions require placing the plating package 500 in different electrolytic solutions and enabling the source of current 510 for a selected amount of time.
- FIG. 7 illustrates a cross-sectional view of an unfinished package substrate 200 prior to plating materials onto the wire bond pads of the bond fingers 322 , according to another embodiment of this invention.
- the wire bond pad major surface side 320 includes patterned photoresist 350 .
- the patterned photoresist is formed by laying down a layer of photoresist and then exposing certain portions of the photoresist with either a negative or a positive image. Unwanted photoresist can be removed (either the exposed portion or the unexposed portion) to produce openings in the photoresist at the wire bond pad of the bond finger 322 .
- the photoresist is formulated to substantially electrically isolate the wire bond pads of the bond fingers 322 .
- the photoresist is also formulated to remain in place when exposed to an electrolytic plating solution.
- the land pad major surface side 310 includes a land pad 312 .
- the land pad major surface side 310 also includes a layer of photoresist 360 that electrically isolates the land pad 312 from the remaining portion of the land pad major surface side 310 .
- the openings in the photoresist 360 are formulated in substantially the same fashion as the openings in the photoresist 350 on the wire bond pad major surface side 320 .
- the openings in the photoresist 350 correspond to the wire bond pads of the bond fingers 322 and the openings in the photoresist 360 correspond to the land pads 312 on the land pad major surface side 310 of the unfinished package substrate 200 .
- FIG. 8 illustrates an exploded cross-sectional view of a pair of package substrates 200 , 200 ′ prior to plating of the wire bond pads, and a reusable conductive portion 800 , according to another embodiment of this invention.
- the reusable conductive portion 800 includes a metal plate 810 . Attached to the metal plate 810 is a first conductive cushion sheet 820 and a second conductive cushion sheet 822 . The conductive cushion sheets are also deformable. Also attached to the metal sheet around the periphery of the conductive cushion sheets 820 , 822 is a first sealing portion 830 and a second sealing portion 832 . The sealing portions 830 , 832 are attached to the metal sheet and can be either conductive or non-conductive.
- FIG. 9 illustrates an exploded cross-sectional view of a reusable conductive portion 800 sandwiched between a pair of package substrates 200 , 200 ′, according to another embodiment of this invention.
- Pressure is applied to the reusable conductive portion 800 , and specifically to the conductive cushion sheet 820 and the conductive cushion sheet 822 .
- the pressure causes the conductive cushion sheet 820 to deform and make electrical contact with the land pads 312 of the unfinished package substrate 200 in the upper position, while the conductive cushion sheet 822 conforms and makes electrical contact with the land pads 312 of the package substrate 200 ′ in the lower position, as shown in FIG. 9 .
- the seal 830 , 832 complies with the surfaces 360 of the two unfinished package substrates 200 , 200 ′. It should be noted that the seals 830 , 832 are positioned about the periphery or outside the periphery of the conductive cushion sheet 820 and the conductive cushion sheet 822 , but inboard of the outer periphery of the package substrates 200 , 200 ′.
- a first clamp 910 and a second clamp 912 capture the land pad major surface 320 of each of the package substrates 200 .
- Clamp 910 has an opening therein, which allows a portion of the metal plate 810 to extend beyond the clamp so that it can be connected to a source of current 900 .
- the source of current 900 is attached to the metal plate 810 .
- the reusable conductive portion 800 sandwiched between the two package substrates 200 , and clamped with clamps 910 and 912 forms an plating package 950 .
- the clamps 910 , 912 assure that the land pad major surface 310 and the contacts the land pads 312 are substantially sealed from an electrolytic solution.
- the electrolytic package 950 can then be placed into an electrolytic solution.
- the source of current 900 is enabled for a selected amount of time to plate the wire bond pads of the bond fingers 322 .
- the wire bond pads of the bond fingers 322 are provided with a plating layer 522 .
- the plating layer 522 includes at least a layer of nickel and a layer of gold plating. The gold plating provides for a reliable bond between the wires of a die and the plating layer 522 on the wire bond pad of the bond finger 322 .
- the electrolytic plating package 950 is disassembled.
- the conductive cushion sheet attached to the metal plate 810 , as well as the seals 830 , 832 are reusable.
- another pair of package substrates can be used to sandwich the reusable conductive portion 800 and the electrolytic plating process can be repeated.
- FIG. 10 illustrates a cross-sectional view of a package that includes a die 1000 attached to the package substrate 600 .
- the package substrate 600 includes a plating pad 522 .
- the package substrate 600 differs from the unfinished package substrate 200 in that the plating layer 522 on the wire bond pad of the bond fingers 322 is finished and ready to receive a wire 1010 of the die 1000 .
- the die 1000 is attached to the plating layer 522 of the wire bond pad of the bond finger 322 .
- the die 1000 attached to the package substrate 600 forms a package or a substantial portion of the package.
- the die can be encapsulated or further processed to complete a package, which can be attached to a printed circuit board, such as circuit board 100 shown in FIG. 1 .
- FIG. 11 illustrates a flow diagram of a method 1100 of plating the bond fingers of a package substrate, according to an embodiment of this invention.
- the method 1100 for plating a first pad on a first major surface of a substrate with a first major surface and a second major surface includes connecting the first pad on the first major surface to a second pad on a second major surface of the substrate 1112 , and masking portions of the first major surface 1114 to selectively prevent plating on portions of the first major surface.
- connecting the first pad on the first major surface to a second pad on the second major surface 1112 includes connecting the first pad and the second pad through a via.
- the method 1100 further includes sealing 1116 the second major surface from the electrolytic solution.
- sealing the second major surface from the electrolytic solution 1116 includes placing a conductive adhesive tape over the second major surface.
- the method 1100 further includes placing the first pad on the first major surface into an electrolytic solution 1118 and applying a current to the second pad 1120 .
- applying a current to the second pad 1120 includes placing an electrical conductor having a deformable portion in contact with the second pad, and applying the voltage to the electrical conductor.
- FIG. 12 illustrates another flow diagram of a method 1200 of plating the bond fingers of a package substrate, according to an embodiment of this invention.
- the method 1200 for plating a first pad on a first major surface on each of a plurality of substrates, each substrate having a first major surface and a second major surface includes: connecting the first pad on the first major surface to a second pad on a second major surface of the substrate through a via in the substrate 1210 ; placing a deformable conductor in contact with the second major surface and the second pad of one of the plurality of substrates 1212 ; placing a deformable conductor in contact with the second major surface and the second pad of another of the plurality of substrates 1214 ; and clamping the one of the plurality of substrates, the other of the plurality of substrates, and the deformable conductor together 1216 .
- the method 1200 further includes placing the first pad on the first major surface of the one of the plurality of substrates and the another of the plurality of substrates into an electrolytic
- placing a deformable conductor in contact with the second major surface and the second pad of one of the plurality of substrates 1212 includes placing a first side of a deformable conductor in contact with the second major surface and the second pad of the one of the plurality of substrates.
- placing a deformable conductor in contact with the second major surface and the second pad of another of the plurality of substrates 1212 includes placing a second side of a deformable conductor in contact with the second major surface and the second pad of the one of the plurality of substrates.
- the method 1212 also includes substantially sealing the second major surface of the one of the plurality of substrates from the electrolytic solution 1218 .
- Another embodiment of the method 1200 includes substantially sealing the second major surface of the one of the plurality of substrates from the electrolytic solution, and substantially sealing the second major surface of the one of the plurality of substrates from the electrolytic solution.
- the deformable conductor includes a conductive adhesive tape.
- the deformable conductor includes a metal plate, a first conductive sheet on a first side of the metal plate, and a second conductive sheet on a second side of the metal plate.
- the method 1200 also includes applying a current to the deformable conductor 1220 .
- an apparatus includes a first package substrate and a deformable conductor.
- the first package substrate includes a first major surface having a first pad, a second major surface having a second pad, and an electrical pathway in the first package substrate between the first pad and the second pad.
- the deformable conductor is in electrical communication with the second major surface and the second pad.
- the apparatus also includes a second package substrate.
- the second package substrate includes a third major surface having a third pad, a fourth major surface having a fourth pad, and an electrical pathway in the second package substrate between the third pad and the fourth pad.
- the deformable conductor is in electrical communication with the fourth major surface and the fourth pad.
- the deformable conductor is a conductive adhesive tape.
- the deformable conductor includes a metal plate, a first conductive sheet on a first side of the metal plate, a second conductive sheet on a second side of the metal plate, and a seal.
- the seal is coupled to the metal plate.
- the seal is positioned to substantially seal the second pad and the fourth pad from an environment surrounding the first package substrate and the second package substrate.
- the apparatus also includes a source of current communicatively coupled to the metal plate. In some embodiments, a source of current is communicatively coupled to the deformable conductor.
- An electrolytic bath is in fluid communication with the first package substrate. In some embodiments, an electrolytic bath is in fluid communication with the first package substrate and the second package substrate.
- an apparatus includes a first package substrate, a second package substrate and a deformable conductor sandwiched between the first package substrate and the second package substrate.
- the first package substrate includes a first major surface having a first pad, a second major surface having a second pad, and an electrical connection between the first pad and the second pad.
- the second package substrate includes a third major surface having a third pad, a fourth major surface having a fourth pad, and an electrical connection between the third pad and the fourth pad.
- the deformable conductor deforms to make electrical contact with the second pad and the fourth pad.
- the electrical connection between the first pad and the second pad is a via within the first package substrate.
- the electrical connection between the third pad and the fourth pad is a via within the second package substrate.
- the apparatus also includes a seal separating the second pad and the fourth pad from an environment in contact with the first pad and the third pad.
- An electrolytic fluid is in fluid communication with the first pad and the third pad. The seal prevents fluid communication of the second pad and the fourth pad with the electrolytic fluid.
Abstract
An apparatus includes a first package substrate, a second package substrate, and a deformable conductor sandwiched between the first package substrate and the second package substrate.
Description
- The inventive subject matter is related to plating of a substrate. More specifically, embodiments of the invention relate to methods and apparatus for plating a substrate without the need of a plating bar.
- Integrated circuits have been manufactured for many years. Manufacturing integrated circuits involves integrating various active and passive circuit elements into a piece of semiconductor material, referred to as a die. The die is attached to a package substrate to form a ceramic or plastic package. In some embodiments, the die is encapsulated within the package substrate to form or finish the package. The finished package can be attached directly to a printed circuit board by connecting input/output pins, arranged along a major surface of the package, to corresponding pads on the printed circuit board. In other embodiments, the finished package is attached to an interposer. The finished package and the interposer are then attached to a printed circuit board. An electronic system can be formed by connecting various finished packages, containing various dies or integrated circuits, to a printed circuit board. The printed circuit board will include traces for interconnecting the various integrated circuits or dies associated with the various packages.
- Advances in semiconductor manufacturing technology have resulted in increased numbers of transistors on each integrated circuit, and an increase in the functionality of each integrated circuit. One result of the increase in functionality includes an increase in the number of input/output (I/O) connections between the integrated circuit and the package substrate. One adaptation designed to address the increased need for I/O connections without consuming an unacceptably large amount of area was the development of ball grid array (BGA) I/O connections for an integrated circuit. BGA devices include a plurality of solder bumps formed by a process commonly referred to as controlled collapsed chip connection (C4). In such a package, a large number of I/O connection terminals are disposed in a two dimensional array over a substantial portion of a major surface of the package. In some instances, BGA packages are directly attached to a supporting substrate such as a printed circuit board. In other instances, an interposer is directly attached to the printed circuit board and the BGA package is attached to the interposer. The interposer includes routing traces and vias that connect the solder bumps of the BGA to contacts that are attached to the printed circuit board. The interposer “fans out” the relatively small die pad pitch of the integrated circuit to the larger contact pad pitch of the printed circuit board. In many applications, the interposer material has a coefficient of thermal expansion intermediate the coefficient of thermal expansion of the printed circuit board and the coefficient of thermal expansion of the BGA package. The interposer, therefore, reduces mechanical stress induced by different coefficients of thermal expansion between the package and the printed circuit board.
- Embodiments of the invention are pointed out with particularity in the appended claims. However, a more complete understanding of the inventive subject matter may be derived by referring to the detailed description when considered in connection with the figures, wherein like reference numbers refer to similar items throughout the figures, and:
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FIG. 1 is a top view of a printed circuit board having a package that is formed according to an embodiment of the invention. -
FIG. 2 illustrates a top view of an unfinished package substrate, according to an embodiment of this invention. -
FIG. 3 illustrates a cross-sectional view of a package substrate prior to plating materials onto the wire bond pads, according to an embodiment of this invention. -
FIG. 4 illustrates an exploded cross-sectional view of a pair of package substrates prior to plating of the wire bond pads, and a conductive adhesive tape, according to an embodiment of this invention. -
FIG. 5 illustrates an exploded cross-sectional view of a conductive adhesive tape sandwiched between a pair of package substrates, according to an embodiment of this invention. -
FIG. 6 illustrates a cross-sectional view of a package substrate, according to an embodiment of this invention. -
FIG. 7 illustrates a cross-sectional view of a package substrate prior to plating materials onto the wire bond pads, according to another embodiment of this invention. -
FIG. 8 illustrates an exploded cross-sectional view of a pair of package substrates prior to plating of the wire bond pads, and a reusable conductive portion, according to another embodiment of this invention. -
FIG. 9 illustrates an exploded cross-sectional view of a reusable conductive portion sandwiched between a pair of package substrates, according to another embodiment of this invention. -
FIG. 10 illustrates a cross-sectional view of package that includes a die attached to the package substrate, according to an embodiment of this invention. -
FIG. 11 illustrates a flow diagram of a method of plating the bond fingers of a package substrate, according to an embodiment of this invention. -
FIG. 12 illustrates another flow diagram of a method of plating the bond fingers of a package substrate, according to an embodiment of this invention. - The description set out herein illustrates various embodiments of the invention, and such description is not intended to be construed as limiting in any manner.
- In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings that form a part hereof, and in which are shown by way of illustration specific embodiments in which the inventive subject matter can be practiced. The embodiments illustrated are described in sufficient detail to enable those skilled in the art to practice the teachings disclosed herein. Other embodiments can be utilized and derived therefrom, such that structural and logical substitutions and changes can be made without departing from the scope of the inventive subject matter. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of various embodiments of the invention is defined only by the appended claims, along with the full range of equivalents to which such claims are entitled.
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FIG. 1 is a top view of a printedcircuit board 100. The printedcircuit board 100 includes an electrical device orcomponent 1000 having apackage substrate 600 formed according to an embodiment of the invention. The printed circuit board (“PCB”) 100 is a multi-layer plastic board that includes patterns of printed circuits on one or more layers of insulated material. The patterns of conductors correspond to the wiring of an electronic circuit formed on one or more of the layers of the printedcircuit board 100. The printedcircuit board 100 also includeselectrical traces 110. Theelectrical traces 110 can be found on anexterior surface 120 of the printedcircuit board 100, and also can be found on the various layers within the printedcircuit board 100. Printed circuit boards also include through holes (not shown inFIG. 1 ) which are used to interconnect traces on various layers of the printedcircuit board 100. The printedcircuit board 100 can also include planes of metallized materials such as ground planes, power planes, or voltage reference planes (not shown inFIG. 1 ). - The printed
circuit board 100 is also populated withvarious components components components exterior surface 120 of the printedcircuit board 100. For example, pins may be inserted into plated through holes, or pins may be extended through the printedcircuit board 100. An alternative technology is surface mount technology, where an electrical component, such ascomponent 1000, mounts to an array of pads on theexterior surface 120 of theprinted circuit board 100. For example,component 1000 could be a ball grid array package or device that has an array of balls or bumps that interact or are connected to a corresponding array of pads on theexterior surface 120 of the printedcircuit board 100. The electrical device orcomponent 1000 includes apackage substrate 600 and a die 1010 (shown inFIG. 10 ). Thepackage substrate 600 is formed according to an embodiment of this invention. The die is electrically coupled to thepackage substrate 600 to form apackage 1020 that can be attached to the printedcircuit board 100. - The printed
circuit board 100 can also includetraces 110 for making external connections to other electrical or electronic devices. In an embodiment of the invention, thecomponent 1000 is a central processing chip or microprocessor, that can be used as a controller or for any other function. Although the printedcircuit board 100 shown is a daughter board, the printedcircuit board 100 could also be a motherboard, and the component or electrical device could be the main processing unit for a computer. In some computing environments, multiple main processing units can be used. - As shown in
FIG. 1 , the printedcircuit board 100 includes afirst edge connector 140 and asecond edge connector 142. As shown inFIG. 1 there are external traces, such aselectrical trace 110, on theexternal surface 120 of the printedcircuit board 100, that connect to certain of the outputs associated with thefirst edge connector 140. Other traces that connect with theedge connectors circuit board 100. -
FIG. 2 illustrates a top view of anunfinished package substrate 200, according to an embodiment of this invention. As shown inFIG. 2 , theunfinished package substrate 200 is formed along with other package substrates. Portions of other package substrates are shown aselements package substrates unfinished package substrates finished substrates 600. After finishing the finished package substrates, the printed circuit board material is cut along the cut lines 211, 212, 213, 214 to form a plurality of individual, finished substrates 600 (seeFIG. 6 ) from the previouslyunfinished package substrates unfinished package substrates 200 are treated substantively the same, only the treatment of one individual,unfinished package substrate 200 will now be further detailed. Details of the remainingpackage substrates - The
unfinished package substrate 200 includes a land pad major surface side 310 (shown inFIGS. 3-6 ) and a wire bond padmajor surface side 320. The land padmajor surface side 320 includes at least onebond finger 322 and atrace 332. A via 340 extends through a portion of theunfinished package substrate 200. The via 340 is lined withconductive material 342. The via 340 and theelectrical trace 332 attach thebond finger 322 to a land on the land pad surface side 310 (shown inFIGS. 3-6 ). -
FIG. 3 illustrates a cross-sectional view ofunfinished package substrate 200 prior to plating, according to an embodiment of this invention. As shown inFIG. 3 , the wire bond padmajor surface side 320 includes patternedphotoresist 350. The patterned photoresist is formed by laying down a layer of photoresist and then exposing certain portions of the photoresist with either a negative or a positive image. Unwanted photoresist can be removed (either the exposed portion or the unexposed portion) to produce openings in the photoresist at the wire bond pad of thebond finger 322. The photoresist is formulated to substantially electrically isolate the wire bond pads of thebond fingers 322. The photoresist is also formulated to remain in place when exposed to an electrolytic plating solution. The land padmajor surface side 310 includes aland pad 312. The land padmajor surface side 310 also includes a layer ofphotoresist 360 that electrically isolates theland pad 312 from the remaining portion of the land padmajor surface side 310. The openings in thephotoresist 360 are formulated in substantially the same fashion as the openings in thephotoresist 350 on the wire bond padmajor surface side 320. The openings in thephotoresist 350 correspond to the wire bond pads of thebond fingers 322, and the openings in thephotoresist 360 correspond to theland pads 312 on the land padmajor surface side 310 of theunfinished package substrate 200. - Now referring to
FIGS. 3-6 , a method for fabricating anunfinished package substrate 200 according to an embodiment of the invention will now be discussed.FIG. 4 illustrates an exploded cross-sectional view of a pair ofunfinished package substrates bond finger 322, and a conductiveadhesive tape 410, according to an embodiment of this invention. The conductiveadhesive tape 410 is capable of carrying a current, and is also capable of sealing the land padmajor surface side 310 of each of theunfinished package substrates adhesive tape 410 is available under the product name X-7001 from SUMITOMO 3M Limited of Tokyo, Japan. -
FIG. 5 illustrates an exploded cross sectional view of the conductiveadhesive tape 410 sandwiched between a pair ofunfinished package substrates adhesive tape 410 is deformable. As the firstunfinished package substrate 200 is forced toward the secondunfinished package substrate 200′, the conductiveadhesive tape 410 deforms. Portions of the conductive adhesive tape extend into the openings in thephotoresist 360 which correspond to theland pads 312. In other words, as the conductiveadhesive tape 410 is sandwiched between the firstunfinished package substrate 200 and the secondunfinished package substrate 200′, the conductive adhesive tape deforms or conforms until it contacts theland pads 312 of the firstunfinished package substrate 200 and the secondunfinished package substrate 200′. The conductiveadhesive tape 410, therefore, places each of theland pads 312 into electrical connection with a source of current 510. The source of current 510 is electrically connected to the conductiveadhesive tape 410. Theland pads 312 are connected to the wire bond pads of thebond fingers 322 by way of thevia 340. - As shown in
FIG. 5 , the twounfinished package substrates 200 sandwiching the conductiveadhesive tape 410 and having the source of current 510 attached thereto form aplating package 500. Theplating package 500 is placed into an electrolytic solution. The conductiveadhesive tape 410 substantially seals theland pads 312 from the electrolytic solution. Once in the electrolytic solution, the source of current 510 is enabled. The current flows through the conductiveadhesive tape 410 to each of theland pads 312 through a via 340 and thebond fingers 322 of the wire bond pad. The source of current 510 is enabled for a selected amount of time in order to produce aplating layer 522 on the wire bond pad of thebond fingers 322. - The
plating layer 522, in an embodiment includes a layer of nickel and a layer of gold. In order to obtain different layers, theplating package 500 must be placed in different electrolytic solutions to produce layers of different compositions. While in each solution, the source of current 510 is enabled for a selected amount of time to produce a plating layer or a portion of aplating layer 522 of a selected thickness. After theplating layer 522 has been deposited, theplating package 500 is disassembled. The conductiveadhesive layer 410 generally is used only one time. Therefore the conductiveadhesive layer 410 is discarded. -
FIG. 6 illustrates a cross-sectional view of apackage substrate 600, according to an embodiment of this invention. After disassembly of the plating package and discarding of the conductiveadhesive layer 410, the end result is thesubstrate pad 600. Thesubstrate pad 600 has aplating layer 522 on the wire bond pad of thebond finger 322. The main difference between theunfinished package substrate 200 and thepackage substrate 600 is that thebond finger 322 of the wire bond pad is plated withplating layer 522. Thesubstrate package 600 is ready to receive a die orchip 1000 as shown inFIG. 10 . The plating layer of nickel and gold provides a layer on thebond finger 322 of the wire bond pad that will provide for a reliable electrical connection between a wire associated with thedie 1000 and the wire bond pad of thebonding finger 322. It should be noted that theplating layer 522 can also have layers of different materials in other embodiments of the invention.Other plating layer 522 compositions require placing theplating package 500 in different electrolytic solutions and enabling the source of current 510 for a selected amount of time. -
FIG. 7 illustrates a cross-sectional view of anunfinished package substrate 200 prior to plating materials onto the wire bond pads of thebond fingers 322, according to another embodiment of this invention. The wire bond padmajor surface side 320 includes patternedphotoresist 350. The patterned photoresist is formed by laying down a layer of photoresist and then exposing certain portions of the photoresist with either a negative or a positive image. Unwanted photoresist can be removed (either the exposed portion or the unexposed portion) to produce openings in the photoresist at the wire bond pad of thebond finger 322. The photoresist is formulated to substantially electrically isolate the wire bond pads of thebond fingers 322. The photoresist is also formulated to remain in place when exposed to an electrolytic plating solution. The land padmajor surface side 310 includes aland pad 312. The land padmajor surface side 310 also includes a layer ofphotoresist 360 that electrically isolates theland pad 312 from the remaining portion of the land padmajor surface side 310. The openings in thephotoresist 360 are formulated in substantially the same fashion as the openings in thephotoresist 350 on the wire bond padmajor surface side 320. The openings in thephotoresist 350 correspond to the wire bond pads of thebond fingers 322 and the openings in thephotoresist 360 correspond to theland pads 312 on the land padmajor surface side 310 of theunfinished package substrate 200. -
FIG. 8 illustrates an exploded cross-sectional view of a pair ofpackage substrates conductive portion 800, according to another embodiment of this invention. The reusableconductive portion 800 includes ametal plate 810. Attached to themetal plate 810 is a firstconductive cushion sheet 820 and a secondconductive cushion sheet 822. The conductive cushion sheets are also deformable. Also attached to the metal sheet around the periphery of theconductive cushion sheets first sealing portion 830 and asecond sealing portion 832. The sealingportions -
FIG. 9 illustrates an exploded cross-sectional view of a reusableconductive portion 800 sandwiched between a pair ofpackage substrates conductive portion 800, and specifically to theconductive cushion sheet 820 and theconductive cushion sheet 822. The pressure causes theconductive cushion sheet 820 to deform and make electrical contact with theland pads 312 of theunfinished package substrate 200 in the upper position, while theconductive cushion sheet 822 conforms and makes electrical contact with theland pads 312 of thepackage substrate 200′ in the lower position, as shown inFIG. 9 . As theunfinished package substrates seal surfaces 360 of the twounfinished package substrates seals conductive cushion sheet 820 and theconductive cushion sheet 822, but inboard of the outer periphery of thepackage substrates - A
first clamp 910 and asecond clamp 912 capture the land padmajor surface 320 of each of thepackage substrates 200.Clamp 910 has an opening therein, which allows a portion of themetal plate 810 to extend beyond the clamp so that it can be connected to a source of current 900. The source of current 900 is attached to themetal plate 810. The reusableconductive portion 800 sandwiched between the twopackage substrates 200, and clamped withclamps clamps major surface 310 and the contacts theland pads 312 are substantially sealed from an electrolytic solution. The electrolytic package 950 can then be placed into an electrolytic solution. While the plating package 950 is placed in the electrolytic solution, the source of current 900 is enabled for a selected amount of time to plate the wire bond pads of thebond fingers 322. In an embodiment of the invention, the wire bond pads of thebond fingers 322 are provided with aplating layer 522. In an embodiment of the invention, theplating layer 522 includes at least a layer of nickel and a layer of gold plating. The gold plating provides for a reliable bond between the wires of a die and theplating layer 522 on the wire bond pad of thebond finger 322. After aplating layer 522 is formed on the wire bond pad of thebond finger 322 or on all the bond fingers of thepackage substrates metal plate 810, as well as theseals conductive portion 800 and the electrolytic plating process can be repeated. -
FIG. 10 illustrates a cross-sectional view of a package that includes adie 1000 attached to thepackage substrate 600. Thepackage substrate 600 includes aplating pad 522. Thepackage substrate 600 differs from theunfinished package substrate 200 in that theplating layer 522 on the wire bond pad of thebond fingers 322 is finished and ready to receive awire 1010 of thedie 1000. As shown inFIG. 10 , thedie 1000 is attached to theplating layer 522 of the wire bond pad of thebond finger 322. Thedie 1000 attached to thepackage substrate 600 forms a package or a substantial portion of the package. After thedie 1000 is attached, the die can be encapsulated or further processed to complete a package, which can be attached to a printed circuit board, such ascircuit board 100 shown inFIG. 1 . -
FIG. 11 illustrates a flow diagram of amethod 1100 of plating the bond fingers of a package substrate, according to an embodiment of this invention. Themethod 1100 for plating a first pad on a first major surface of a substrate with a first major surface and a second major surface includes connecting the first pad on the first major surface to a second pad on a second major surface of thesubstrate 1112, and masking portions of the firstmajor surface 1114 to selectively prevent plating on portions of the first major surface. In some embodiments, connecting the first pad on the first major surface to a second pad on the secondmajor surface 1112 includes connecting the first pad and the second pad through a via. Themethod 1100 further includes sealing 1116 the second major surface from the electrolytic solution. In some embodiments, sealing the second major surface from theelectrolytic solution 1116 includes placing a conductive adhesive tape over the second major surface. Themethod 1100 further includes placing the first pad on the first major surface into anelectrolytic solution 1118 and applying a current to thesecond pad 1120. In some embodiments, applying a current to thesecond pad 1120 includes placing an electrical conductor having a deformable portion in contact with the second pad, and applying the voltage to the electrical conductor. -
FIG. 12 illustrates another flow diagram of a method 1200 of plating the bond fingers of a package substrate, according to an embodiment of this invention. The method 1200 for plating a first pad on a first major surface on each of a plurality of substrates, each substrate having a first major surface and a second major surface includes: connecting the first pad on the first major surface to a second pad on a second major surface of the substrate through a via in thesubstrate 1210; placing a deformable conductor in contact with the second major surface and the second pad of one of the plurality ofsubstrates 1212; placing a deformable conductor in contact with the second major surface and the second pad of another of the plurality ofsubstrates 1214; and clamping the one of the plurality of substrates, the other of the plurality of substrates, and the deformable conductor together 1216. The method 1200 further includes placing the first pad on the first major surface of the one of the plurality of substrates and the another of the plurality of substrates into anelectrolytic solution 1218. - In an embodiment of the method 1200, placing a deformable conductor in contact with the second major surface and the second pad of one of the plurality of
substrates 1212 includes placing a first side of a deformable conductor in contact with the second major surface and the second pad of the one of the plurality of substrates. In another embodiment, placing a deformable conductor in contact with the second major surface and the second pad of another of the plurality ofsubstrates 1212 includes placing a second side of a deformable conductor in contact with the second major surface and the second pad of the one of the plurality of substrates. Themethod 1212 also includes substantially sealing the second major surface of the one of the plurality of substrates from theelectrolytic solution 1218. - Another embodiment of the method 1200 includes substantially sealing the second major surface of the one of the plurality of substrates from the electrolytic solution, and substantially sealing the second major surface of the one of the plurality of substrates from the electrolytic solution. In an embodiment, the deformable conductor includes a conductive adhesive tape. In another embodiment, the deformable conductor includes a metal plate, a first conductive sheet on a first side of the metal plate, and a second conductive sheet on a second side of the metal plate. The method 1200 also includes applying a current to the
deformable conductor 1220. - As shown in
FIGS. 1-10 , an apparatus includes a first package substrate and a deformable conductor. The first package substrate includes a first major surface having a first pad, a second major surface having a second pad, and an electrical pathway in the first package substrate between the first pad and the second pad. The deformable conductor is in electrical communication with the second major surface and the second pad. The apparatus also includes a second package substrate. The second package substrate includes a third major surface having a third pad, a fourth major surface having a fourth pad, and an electrical pathway in the second package substrate between the third pad and the fourth pad. The deformable conductor is in electrical communication with the fourth major surface and the fourth pad. In one embodiment, the deformable conductor is a conductive adhesive tape. In an embodiment, the deformable conductor includes a metal plate, a first conductive sheet on a first side of the metal plate, a second conductive sheet on a second side of the metal plate, and a seal. The seal is coupled to the metal plate. The seal is positioned to substantially seal the second pad and the fourth pad from an environment surrounding the first package substrate and the second package substrate. The apparatus also includes a source of current communicatively coupled to the metal plate. In some embodiments, a source of current is communicatively coupled to the deformable conductor. An electrolytic bath is in fluid communication with the first package substrate. In some embodiments, an electrolytic bath is in fluid communication with the first package substrate and the second package substrate. - As shown in
FIGS. 5 and 9 , an apparatus includes a first package substrate, a second package substrate and a deformable conductor sandwiched between the first package substrate and the second package substrate. The first package substrate includes a first major surface having a first pad, a second major surface having a second pad, and an electrical connection between the first pad and the second pad. The second package substrate includes a third major surface having a third pad, a fourth major surface having a fourth pad, and an electrical connection between the third pad and the fourth pad. The deformable conductor deforms to make electrical contact with the second pad and the fourth pad. The electrical connection between the first pad and the second pad is a via within the first package substrate. The electrical connection between the third pad and the fourth pad is a via within the second package substrate. The apparatus also includes a seal separating the second pad and the fourth pad from an environment in contact with the first pad and the third pad. An electrolytic fluid is in fluid communication with the first pad and the third pad. The seal prevents fluid communication of the second pad and the fourth pad with the electrolytic fluid. - The foregoing description of the specific embodiments reveals the general nature of the inventive subject matter sufficiently that others can, by applying current knowledge, readily modify and/or adapt it for various applications without departing from the generic concept, and therefore such adaptations and modifications are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments.
- It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Accordingly, the embodiments of the invention are intended to embrace all such alternatives, modifications, equivalents and variations as fall within the spirit and broad scope of the appended claims.
Claims (29)
1. A method for plating a first pad on a first major surface of a substrate, the substrate having a first major surface and a second major surface, the method comprising:
connecting the first pad on the first major surface to a second pad on a second major surface of the substrate;
applying a voltage to the second pad; and
placing the first pad on the first major surface into an electrolytic solution.
2. The method of claim 1 further comprising masking portions of the first major surface to selectively prevent plating on portions of the first major surface.
3. The method of claim 1 wherein connecting the first pad on the first major surface to a second pad on the second major surface includes connecting the first pad and the second pad through a via.
4. The method of claim 1 further comprising sealing the second major surface from the electrolytic solution.
5. The method of claim 4 wherein sealing the second major surface from the electrolytic solution includes placing a conductive adhesive tape over the second major surface.
6. The method of claim 1 wherein applying a voltage to the second pad includes:
placing an electrical conductor having a deformable portion in contact with the second pad; and
applying the voltage to the electrical conductor.
7. A method for plating a first pad on a first major surface on each of a plurality of substrates, each substrate having a first major surface and a second major surface, the method comprising:
connecting the first pad on the first major surface to a second pad on a second major surface of the substrate through a via in the substrate;
placing a deformable conductor in contact with the second major surface and the second pad of one of the plurality of substrates;
placing a deformable conductor in contact with the second major surface and the second pad of another of the plurality of substrates; and
applying a voltage to the deformable conductor.
8. The method of claim 7 further comprising placing the first pad on the first major surface of the one of the plurality of substrates and another of the plurality of substrates into an electrolytic solution.
9. The method of claim 7 wherein placing a deformable conductor in contact with the second major surface and the second pad of one of the plurality of substrates includes placing a first side of a deformable conductor in contact with the second major surface and the second pad of the one of the plurality of substrates
10. The method of claim 9 wherein placing a deformable conductor in contact with the second major surface and the second pad of another of the plurality of substrates includes placing a second side of a deformable conductor in contact with the second major surface and the second pad of the one of the plurality of substrates.
11. The method of claim 8 further comprising substantially sealing the second major surface of the one of the plurality of substrates from the electrolytic solution.
12. The method of claim 8 further comprising:
substantially sealing the second major surface of the one of the plurality of substrates from the electrolytic solution; and
substantially sealing the second major surface of another of the plurality of substrates from the electrolytic solution.
13. The method of claim 7 wherein the deformable conductor includes a conductive adhesive tape.
14. The method of claim 7 wherein the deformable conductor includes:
a metal plate;
a first conductive sheet on a first side of the metal plate; and
a second conductive sheet on a second side of the metal plate.
15. The method of claim 7 further comprising clamping the one of the plurality of substrates, the other of the plurality of substrates, and the deformable conductor together.
16. An apparatus comprising:
a first package substrate, further including:
a first major surface having a first pad;
a second major surface having a second pad; and
an electrical pathway in the first package substrate between the first pad and the second pad; and
a deformable conductor in electrical communication with the second major surface and the second pad.
17. The apparatus of claim 16 further comprising a second package substrate, further including:
a third major surface having a third pad;
a fourth major surface having a fourth pad; and
an electrical pathway in the second package substrate between the third pad and the fourth pad, wherein the deformable conductor is in electrical communication with the fourth major surface and the fourth pad.
18. The apparatus of claim 17 wherein the deformable conductor is a conductive adhesive tape.
19. The apparatus of claim 17 wherein the deformable conductor comprises:
a metal plate;
a first conductive sheet on a first side of the metal plate; and
a second conductive sheet on a second side of the metal plate.
20. The apparatus of claim 19 further comprising a seal coupled to the metal plate, the seal positioned to substantially seal the second pad and the fourth pad from an environment surrounding the first package substrate and the second package substrate.
21. The apparatus of claim 19 further comprising a source of current communicatively coupled to the metal plate.
22. The apparatus of claim 16 further comprising a source of current communicatively coupled to the deformable conductor.
23. The apparatus of claim 16 further comprising an electrolytic bath in fluid communication with the first package substrate.
24. The apparatus of claim 17 further comprising an electrolytic bath in fluid communication with the first package substrate and the second package substrate.
25. An apparatus comprising:
a first package substrate further comprising:
a first major surface having a first pad;
a second major surface having a second pad; and
an electrical connection between the first pad and the second pad;
a second package substrate further comprising:
a third major surface having a third pad;
a fourth major surface having a fourth pad; and
an electrical connection between the third pad and the fourth pad; and
a deformable conductor sandwiched between the first package substrate and the second package substrate.
26. The apparatus of claim 25 wherein the deformable conductor deforms to make electrical contact with the second pad and the fourth pad.
27. The apparatus of claim 25 wherein the electrical connection between the first pad and the second pad is a via within the first package substrate, and wherein the electrical connection between the third pad and the fourth pad is a via within the second package substrate.
28. The apparatus of claim 25 further comprising a seal separating the second pad and the fourth pad from an environment in contact with the first pad and the third pad.
29. The apparatus of claim 25 further comprising:
an electrolytic fluid in fluid communication with the first pad and the third pad; and
a seal preventing fluid communication of the second pad and the fourth pad with the electrolytic fluid.
Priority Applications (1)
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US10/881,016 US20060000718A1 (en) | 2004-06-30 | 2004-06-30 | Substrate plating methods and apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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US10/881,016 US20060000718A1 (en) | 2004-06-30 | 2004-06-30 | Substrate plating methods and apparatus |
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US20060000718A1 true US20060000718A1 (en) | 2006-01-05 |
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US10/881,016 Abandoned US20060000718A1 (en) | 2004-06-30 | 2004-06-30 | Substrate plating methods and apparatus |
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Cited By (2)
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US20110241060A1 (en) * | 2010-04-01 | 2011-10-06 | Au Optronics Corporation | Glass sealing package and manufacturing method thereof |
US20140237360A1 (en) * | 2007-09-04 | 2014-08-21 | Apple Inc. | Editing interface |
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US4842699A (en) * | 1988-05-10 | 1989-06-27 | Avantek, Inc. | Method of selective via-hole and heat sink plating using a metal mask |
US4931598A (en) * | 1988-12-30 | 1990-06-05 | 3M Company | Electrical connector tape |
US20040040856A1 (en) * | 2002-09-03 | 2004-03-04 | Sumitomo Metal Electronics Devices Inc. | Method for making plastic packages |
US6815126B2 (en) * | 2002-04-09 | 2004-11-09 | International Business Machines Corporation | Printed wiring board with conformally plated circuit traces |
US7256495B2 (en) * | 2003-02-24 | 2007-08-14 | Samsung Electro-Mechanics Co., Ltd. | Package substrate manufactured using electrolytic leadless plating process, and method for manufacturing the same |
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US4842699A (en) * | 1988-05-10 | 1989-06-27 | Avantek, Inc. | Method of selective via-hole and heat sink plating using a metal mask |
US4931598A (en) * | 1988-12-30 | 1990-06-05 | 3M Company | Electrical connector tape |
US6815126B2 (en) * | 2002-04-09 | 2004-11-09 | International Business Machines Corporation | Printed wiring board with conformally plated circuit traces |
US20040040856A1 (en) * | 2002-09-03 | 2004-03-04 | Sumitomo Metal Electronics Devices Inc. | Method for making plastic packages |
US7256495B2 (en) * | 2003-02-24 | 2007-08-14 | Samsung Electro-Mechanics Co., Ltd. | Package substrate manufactured using electrolytic leadless plating process, and method for manufacturing the same |
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US20140237360A1 (en) * | 2007-09-04 | 2014-08-21 | Apple Inc. | Editing interface |
US20110241060A1 (en) * | 2010-04-01 | 2011-10-06 | Au Optronics Corporation | Glass sealing package and manufacturing method thereof |
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