TW201343019A - System in package assembly, print circuit board assembly and fabrications thereof - Google Patents
System in package assembly, print circuit board assembly and fabrications thereof Download PDFInfo
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- TW201343019A TW201343019A TW101113121A TW101113121A TW201343019A TW 201343019 A TW201343019 A TW 201343019A TW 101113121 A TW101113121 A TW 101113121A TW 101113121 A TW101113121 A TW 101113121A TW 201343019 A TW201343019 A TW 201343019A
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- circuit board
- package
- printed circuit
- assembly
- lead frame
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- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 229910000679 solder Inorganic materials 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 8
- 238000005516 engineering process Methods 0.000 description 10
- 230000017525 heat dissipation Effects 0.000 description 5
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Abstract
Description
本揭示係有關於一種電子組件，特別是有關於一種系統級封裝組件。The present disclosure relates to an electronic component, and more particularly to a system-in-package assembly.
傳統的技術係使用全卡模組(full-mini card)或半卡模組(half-mini card)提供行動電腦的連接器，然而，隨著行動電腦尺寸的小型化，全卡模組或半卡模組因為尺寸太大，且例如螺栓等機械構件佔用到較大的面積，已不符合現行行動電腦的需求。現已開發出尺寸相對較小的板對板連線(board to board connection)技術，然而，此技術仍不能滿足持續縮小的行動電腦之需求。The traditional technology uses a full-mini card or a half-mini card to provide a connector for a mobile computer. However, with the miniaturization of mobile computers, full-card modules or half Since the card module is too large in size and mechanical components such as bolts occupy a large area, it does not meet the requirements of the current mobile computer. A relatively small board to board connection technology has been developed, however, this technology still does not meet the needs of a continuously shrinking mobile computer.
根據上述，業界已開發出系統級封裝(System In Package，SIP)超高密度的封裝結構，其係將複數個構成積體電路晶片安裝在一個封裝模組。系統級封裝(SIP)由於具備異質整合特性，被廣泛應用在各種微小化需求上，加上高密度與高傳輸的高階封裝製程，讓積體電路在輕薄短小之餘，仍可擁有更強大效能，同時系統級封裝(SIP)提供了不同半導體製程技術以及不同功能晶片的整合封裝方式，更拓展系統級封裝(SiP)應用層面，因此常用於開發需要整合大量記憶體，時間短，量小但多樣化的產品，如數位相機、MP3播放器等，甚至連手機等通訊產品也可運用系統級封裝(SIP)搶占市場。According to the above, the industry has developed a system-in-package (SIP) ultra-high-density package structure in which a plurality of constituent integrated circuit chips are mounted in a package module. System-in-package (SIP) is widely used in various miniaturization requirements due to its heterogeneous integration. High-density and high-transmission high-order packaging processes allow integrated circuits to be more powerful and lighter. At the same time, system-in-package (SIP) provides different semiconductor process technologies and integrated packaging methods for different functional chips, and further expands the system-in-package (SiP) application level. Therefore, it is often used for development in which a large amount of memory needs to be integrated, and the time is short and the amount is small. Diversified products, such as digital cameras, MP3 players, and even mobile phones and other communications products can use the system-in-package (SIP) to seize the market.
如第1圖所示，現行之技術係將系統級封裝模組透過焊錫106接合，連接至印刷電路板102，然而，此技術當組件發生問題時，不容易進行修訂(rework)或更換組件。另外，此技術系統級封裝模組104所產生之熱量僅能透過焊錫接合106散熱，隨熱元件密度的增高，其散熱能力已不符高密度和極小模組的需求。As shown in FIG. 1, the current technology connects the system-in-package modules through the solder 106 to the printed circuit board 102. However, this technique is not easy to rework or replace components when components are in trouble. In addition, the heat generated by the system-level package module 104 can only dissipate heat through the solder joint 106. As the density of the heat element increases, the heat dissipation capability does not meet the requirements of high density and extremely small modules.
根據上述，業界需要一封裝組件，其尺寸夠小，且不需使用到機械組件，可符合高密度的需求。In light of the above, the industry needs a package assembly that is small enough and does not require the use of mechanical components to meet high density requirements.
根據上述，本揭示提供一種系統級封裝組件，包括：一系統級封裝模組，包括複數個接合墊；一導線架，接合至系統級封裝模組之接合墊，其中導線架包括複數個引腳。In accordance with the above, the present disclosure provides a system-in-package assembly comprising: a system-in-package module comprising a plurality of bond pads; a leadframe bonded to a bond pad of the system-in-package module, wherein the leadframe includes a plurality of pins .
本揭示提供一種印刷電路板組件，包括：一印刷電路板，至少包括一開口；及一系統級封裝組件，包括：一系統級封裝模組；及一導線架，接合至系統級封裝模組，其中導線架包括複數個引腳；其中系統級封裝組件係鑲嵌於印刷電路板之開口中。The present disclosure provides a printed circuit board assembly comprising: a printed circuit board including at least one opening; and a system-in-package assembly comprising: a system-in-package module; and a lead frame coupled to the system-in-package module The lead frame includes a plurality of pins; wherein the system-in-package components are embedded in the openings of the printed circuit board.
本揭示提供一種系統級封裝組件之製作方法，包括：提供一系統級封裝模組，包括複數個接合墊；將一導線架，接合至系統級封裝模組之接合墊，其中導線架包括複數個引腳；及對導線架之引腳進行一成形步驟，使上述引腳形成特定的形狀。The present disclosure provides a method for fabricating a system-in-package assembly, comprising: providing a system-in-package module comprising a plurality of bond pads; bonding a lead frame to a bond pad of a system-in-package module, wherein the lead frame includes a plurality of a pin; and a forming step of the lead of the lead frame to form the pin into a specific shape.
為讓本發明之特徵能更明顯易懂，下文特舉實施例，並配合所附圖式，作詳細說明如下：In order to make the features of the present invention more comprehensible, the following detailed description of the embodiments and the accompanying drawings
以下詳細討論實施本發明之實施例。可以理解的是，實施例提供許多可應用的發明概念，其可以較廣的變化實施。所討論之特定實施例僅用來揭示使用實施例的特定方法，而不用來限定揭示的範疇。Embodiments embodying the invention are discussed in detail below. It will be appreciated that the embodiments provide many applicable inventive concepts that can be implemented in a wide variety of variations. The specific embodiments discussed are merely illustrative of specific ways of using the embodiments and are not intended to limit the scope of the disclosure.
以下內文中之「一實施例」是指與本發明至少一實施例相關之特定圖樣、結構或特徵。因此，以下「在一實施例中」的敘述並不是指同一實施例。另外，在一或多個實施例中的特定圖樣、結構或特徵可以適當的方式結合。值得注意的是，本說明書的圖式並未按照比例繪示，其僅用來揭示本發明。In the following, "an embodiment" means a specific pattern, structure or feature relating to at least one embodiment of the present invention. Therefore, the following "in one embodiment" does not refer to the same embodiment. In addition, specific patterns, structures, or features in one or more embodiments may be combined in a suitable manner. It is noted that the drawings of the present specification are not drawn to scale and are merely used to disclose the invention.
本發明係提供一封裝組件，其尺寸夠小，且不需使用到機械組件，可符合高密度的需求，可改善高密度模組的散熱，很容易修訂或更換組件，且與系統組裝後具有相對較小的厚度。The invention provides a package assembly which is small in size and does not need to use mechanical components, can meet the requirement of high density, can improve the heat dissipation of the high-density module, can easily modify or replace the component, and has the system assembly Relatively small thickness.
以下配合第2A圖、第2B圖、第3A圖和第3B圖描述揭示本發明一實施例系統級封裝組件(system in package assembly)之製造方法，第2A圖和第3A圖顯示系統級封裝組件200之剖面圖，第2B圖和第3B圖顯示系統級封裝組件200之下視圖。請參照第2A圖和第2B圖，本實施例提供一系統級封裝(system in package，簡稱SIP)模組202，其中系統級封裝模組202是在一積體電路(IC)包裝體中，包含一個或多個晶片，加上被動元件，如濾波器、電容、電阻、天線等任一元件以上之封裝，也就是說系統級封裝在一個封裝內將包含上述不同類型的器件和電路晶片組裝在一起，構建成更為複雜的、完整的系統。系統級封裝(SIP)可包括多晶片模組(multi-chip module；MCM)技術、多晶片封裝(multi-chip package；MCP)技術、晶片堆疊(stack die)，或將主/被動元件內埋於基板(embedded substrate)等技術。系統級封裝中互連技術(interconnection)可以為打線接合(wire bonding)、覆晶技術(flip chip)、異方性導電膠(Anisotropic Conductive Adhesive or Anisotropic Conductive Film)等，作為與IC基板間的互連。系統級封裝係將複數個構成積體電路晶片、主動元件或被動元件組裝在一個封裝模組，晶片可以為邏輯元件、記憶體、處理器、基頻、及/或無線射頻等。如第2A圖和第2B圖所示，本實施例系統級封裝模組202於下側包括複數個接合墊203。Hereinafter, a method for manufacturing a system in package assembly according to an embodiment of the present invention will be described with reference to FIGS. 2A, 2B, 3A, and 3B, and FIG. 2A and FIG. 3A show system-in-package components. A cross-sectional view of 200, 2B and 3B shows a bottom view of the system in package assembly 200. Referring to FIG. 2A and FIG. 2B, the embodiment provides a system in package (SIP) module 202, wherein the system-in-package module 202 is in an integrated circuit (IC) package. Contains one or more wafers, plus passive components, such as filters, capacitors, resistors, antennas, etc., which means that the system-in-package will contain the different types of devices and circuit wafer assemblies in one package. Together, build into a more complex, complete system. System-in-package (SIP) may include multi-chip module (MCM) technology, multi-chip package (MCP) technology, stack die, or buried active/passive components Technology such as an embedded substrate. The interconnection technology in the system-in-package may be wire bonding, flip chip, anisotropic conductive adhesive (Anisotropic Conductive Adhesive or Anisotropic Conductive Film), etc., as mutual interaction with the IC substrate. even. The system-in-package packs a plurality of integrated circuit chips, active components or passive components in a package module, which may be a logic component, a memory, a processor, a baseband, and/or a radio frequency. As shown in FIG. 2A and FIG. 2B , the system-in-package module 202 of the present embodiment includes a plurality of bonding pads 203 on the lower side.
接著，請參照第3A圖和第3B圖，系統級封裝模組之接合墊203電性接合一包括引腳206之導線架204(lead frame)。在本發明一實施例中，系統級封裝模組202可藉由異方性導電膠(anisotropic conductive film，ACF)電性接合導線架204。另外，系統級封裝模組202之接合墊203可結由焊錫208接合導線架204，且焊錫208與焊錫208間之間隙可填入底膠(underfill)210。在本發明一實施例中，底膠210可以為一環氧樹脂。此外，在本發明另一實施例中，可使用金屬鍵合薄膜(metallic bonding film)，藉由熱壓合(thermal lamination)之製程，將系統級封裝模組202與導線架204接合。Next, referring to FIGS. 3A and 3B, the bonding pads 203 of the system-in-package module are electrically coupled to a lead frame 204 including pins 206. In an embodiment of the invention, the system-in-package module 202 can electrically bond the lead frame 204 by an anisotropic conductive film (ACF). In addition, the bonding pads 203 of the system-in-package module 202 can be bonded to the lead frame 204 by solder 208, and the gap between the solder 208 and the solder 208 can be filled with an underfill 210. In an embodiment of the invention, the primer 210 may be an epoxy resin. In addition, in another embodiment of the present invention, the system-in-package module 202 can be bonded to the lead frame 204 by a thermal bonding process using a metallic bonding film.
後續，進行一成形步驟，將引腳形成一特定的形狀。如第4A圖所示，在本發明一實施例中，引腳402在側視圖中可以為一線形。如第4B圖所示，在本發明一實施例中，引腳404在側視圖中可以大體上為Z字形，其中引腳404包括第一部分406、第二部分408和第三部分410，第二部分408大體上與第一部分406和第三部分410垂直。第4C圖所示，在本發明一實施例中，引腳412在側視圖中可以大體上為弧形。Subsequently, a forming step is performed to form the pins into a specific shape. As shown in FIG. 4A, in an embodiment of the invention, the pins 402 may be in a line shape in a side view. As shown in FIG. 4B, in an embodiment of the invention, the pin 404 can be substantially zigzag in a side view, wherein the pin 404 includes a first portion 406, a second portion 408, and a third portion 410, a second Portion 408 is generally perpendicular to first portion 406 and third portion 410. As shown in FIG. 4C, in an embodiment of the invention, the pins 412 can be generally arcuate in side view.
以下配合第5圖描述本發明一實施例系統級封裝組件500形成於印刷電路板組件之使用方式。請參照第5圖，在印刷電路板502之厚度大於系統封裝模組504之厚度的實施例中，可將系統級封裝組件500之導線架508的引腳510製作成在側視圖中為一線形，因此，如第5圖所示，可將系統封裝模組504倒置，鑲嵌入印刷電路板502之開口506中，且引腳510經由焊錫512接合印刷電路板502。請參照第1圖和第5圖，習知技術包括印刷電路板和系統級封裝模組之堆疊的印刷電路板組件的總厚度為Z1，本實施例包括印刷電路板502和系統級封裝模組504之印刷電路板組件的總厚度為Z2，Z2顯然小於Z1。The manner in which the system-in-package assembly 500 of one embodiment of the present invention is formed on a printed circuit board assembly is described below in conjunction with FIG. Referring to FIG. 5, in an embodiment in which the thickness of the printed circuit board 502 is greater than the thickness of the system package module 504, the leads 510 of the lead frame 508 of the system-in-package assembly 500 can be made in a line shape in a side view. Therefore, as shown in FIG. 5, the system package module 504 can be inverted, embedded in the opening 506 of the printed circuit board 502, and the pins 510 bond the printed circuit board 502 via the solder 512. Referring to FIGS. 1 and 5, the conventional technology includes a printed circuit board assembly of a printed circuit board and a system-in-package module having a total thickness of Z 1 . This embodiment includes a printed circuit board 502 and a system-level package module. The total thickness of the printed circuit board assembly of group 504 is Z 2 and Z 2 is clearly less than Z 1 .
以下配合第6圖描述本發明另一實施例系統級封裝組件600形成於印刷電路板組件之使用方式。請參照第6圖，在印刷電路板602之厚度小於系統封裝模組604之厚度的實施例中，可將系統級封裝組件600之導線架606的引腳608製作成在側視圖中大體上為Z字形，其中Z字形引腳608包括第一部分610、第二部分612和第三部分614，第二部分612大體上與第一部分610和第三部分614垂直。如第6圖所示，可將系統級封裝模組604鑲嵌入印刷電路板602的開口605中，且引腳608之第三部分614經由焊錫616接合印刷電路板602。The manner in which the system-in-package assembly 600 of another embodiment of the present invention is formed on a printed circuit board assembly is described below in conjunction with FIG. Referring to FIG. 6, in an embodiment in which the thickness of the printed circuit board 602 is less than the thickness of the system package module 604, the leads 608 of the leadframe 606 of the system in package assembly 600 can be fabricated to be substantially in a side view. The zigzag shape, wherein the zigzag pin 608 includes a first portion 610, a second portion 612, and a third portion 614 that is generally perpendicular to the first portion 610 and the third portion 614. As shown in FIG. 6, system in package module 604 can be embedded in opening 605 of printed circuit board 602, and third portion 614 of pin 608 engages printed circuit board 602 via solder 616.
以下配合第7圖描述本發明另一實施例系統級封裝組件700形成於印刷電路板組件之使用方式。請參照第7圖，本實施例可將印刷電路板704製作成開口706兩側包括導電側壁708之結構，且如第8圖所示，導電側壁708可以為半圓形之電鍍穿孔，其中半圓形之電鍍穿孔包括一弧形側和一平面側，平面側暴露於印刷電路板704的開口706中，且該半圓形之電鍍穿孔電性連接印刷電路板704之線路711。請再參照第7圖，本實施例可將系統級封裝組件700之導線架712的引腳710製作成在側視圖中為弧形，如此本實施例之系統級封裝組件700可插入印刷電路板704之開口706中，使導線架712的引腳710藉由導電側壁708電性連接印刷電路板704之線路711。值得注意的是，本實施例的系統級封裝組件700若發現問題，或系統結構改變時，可很容易的進行修整或置換。另外，本實施例可使用制動裝置或黏合裝置(未繪示)，使系統級封裝組件之引腳與導電側壁可對位準確及/或提供更好的接觸。The manner in which the system-in-package assembly 700 of another embodiment of the present invention is formed on a printed circuit board assembly is described below in conjunction with FIG. Referring to FIG. 7, the printed circuit board 704 can be formed into a structure including conductive sidewalls 708 on both sides of the opening 706. As shown in FIG. 8, the conductive sidewall 708 can be a semi-circular plated perforation, half of which The circular plated perforations include an arcuate side and a planar side, the planar side being exposed to the opening 706 of the printed circuit board 704, and the semicircular plated perforations electrically connecting the line 711 of the printed circuit board 704. Referring to FIG. 7, the lead 710 of the lead frame 712 of the system-in-package assembly 700 can be made curved in a side view, so that the system-in-package assembly 700 of the present embodiment can be inserted into the printed circuit board. In the opening 706 of the 704, the lead 710 of the lead frame 712 is electrically connected to the line 711 of the printed circuit board 704 by the conductive sidewall 708. It should be noted that the system-in-package component 700 of the present embodiment can be easily trimmed or replaced if a problem is found or the system structure is changed. In addition, the present embodiment can use a braking device or a bonding device (not shown) to make the pins of the system-in-package assembly and the conductive sidewalls can be aligned accurately and/or provide better contact.
根據上述，本發明系統級封裝組件具有以下優點：第一，本發明系統級封裝組件僅微幅增加引腳尺寸，兼顧系統封裝微型化的優勢與易重工替換的優點，且不需使用到機械構件；第二，由於金屬構成之導線架本身即具備良好的散熱能力，本發明可藉由導線架提供散熱，改善於於系統級封裝模組之散熱；第三，本發明的系統級封裝組件若發現問題，或系統結構改變時，可很容易的進行修整或置換；第四，本發明的系統級封裝組件在與印刷電路板接合後，相較於習知技術，具有較小的厚度。According to the above, the system-in-package assembly of the present invention has the following advantages: First, the system-in-package assembly of the present invention only slightly increases the pin size, taking into consideration the advantages of miniaturization of the system package and the advantages of easy rework, and does not require the use of machinery. Secondly, since the lead frame made of metal has good heat dissipation capability, the present invention can provide heat dissipation by the lead frame to improve heat dissipation of the system-in-package module; and third, the system-in-package assembly of the present invention If a problem is found, or the system structure changes, it can be easily trimmed or replaced. Fourth, the system-in-package assembly of the present invention has a smaller thickness after bonding with the printed circuit board than conventional techniques.
雖然本揭示之較佳實施例說明如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the preferred embodiment of the present disclosure is described above, it is not intended to limit the invention, and it is obvious to those skilled in the art that the present invention can be modified and retouched without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application attached.
102．．．印刷電路板102. . . A printed circuit board
104．．．系統級封裝模組104. . . System level package module
106．．．焊錫接合106. . . Solder joint
202．．．系統級封裝模組202. . . System level package module
203．．．接合墊203. . . Mat
204．．．導線架204. . . Lead frame
206．．．引腳206. . . Pin
208．．．焊錫208. . . Solder
210．．．底膠210. . . Primer
402．．．引腳402. . . Pin
404．．．引腳404. . . Pin
406．．．第一部分406. . . first part
408．．．第二部分408. . . the second part
410．．．第三部分410. . . the third part
500．．．系統級封裝組件500. . . System level package component
502．．．印刷電路板502. . . A printed circuit board
504．．．系統封裝模組504. . . System package module
506．．．開口506. . . Opening
508．．．導線架508. . . Lead frame
510．．．引腳510. . . Pin
512．．．焊錫512. . . Solder
600．．．系統級封裝組件600. . . System level package component
602．．．印刷電路板602. . . A printed circuit board
604．．．系統封裝模組604. . . System package module
606．．．導線架606. . . Lead frame
608．．．引腳608. . . Pin
610．．．第一部分610. . . first part
612．．．第二部分612. . . the second part
614．．．第三部分614. . . the third part
616．．．焊錫616. . . Solder
700．．．系統級封裝組件700. . . System level package component
704．．．印刷電路板704. . . A printed circuit board
706．．．開口706. . . Opening
708．．．導電側壁708. . . Conductive sidewall
710．．．引腳710. . . Pin
711．．．線路711. . . line
第1圖顯示傳統系統級封裝組件之剖面圖。Figure 1 shows a cross-sectional view of a conventional system-in-package assembly.
第2A圖顯示本發明一實施例系統級封裝組件製造方法中間步驟之剖面圖。2A is a cross-sectional view showing an intermediate step of a method of fabricating a system-in-package assembly in accordance with an embodiment of the present invention.
第2B圖顯示本發明一實施例系統級封裝組件製造方法中間步驟之平面圖。Figure 2B is a plan view showing the intermediate steps of a method of fabricating a system-in-package assembly in accordance with an embodiment of the present invention.
第3A圖顯示本發明一實施例系統級封裝組件之剖面圖。3A is a cross-sectional view showing a system-in-package assembly in accordance with an embodiment of the present invention.
第3B圖本發明一實施例系統級封裝組件之平面圖。Figure 3B is a plan view of a system in package assembly in accordance with an embodiment of the present invention.
第4A圖顯示本發明另一實施例系統級封裝組件之剖面圖。Figure 4A is a cross-sectional view showing a system in package assembly of another embodiment of the present invention.
第4B圖顯示本發明另一實施例系統級封裝組件之剖面圖。Figure 4B is a cross-sectional view showing a system in package assembly of another embodiment of the present invention.
第4C圖顯示本發明另一實施例系統級封裝組件之剖面圖。Figure 4C is a cross-sectional view showing a system in package assembly of another embodiment of the present invention.
第5圖顯示本發明一實施例系統級封裝組與印刷電路板組裝後之剖面圖。Figure 5 is a cross-sectional view showing the assembly of the system-in-package group and the printed circuit board in accordance with an embodiment of the present invention.
第6圖顯示本發明另一實施例系統級封裝組與印刷電路板組裝後之剖面圖。Figure 6 is a cross-sectional view showing the assembly of the system-in-package set and the printed circuit board in accordance with another embodiment of the present invention.
第7圖顯示本發明另一實施例系統級封裝組與印刷電路板組裝後之剖面圖。Figure 7 is a cross-sectional view showing the assembled system package group and printed circuit board according to another embodiment of the present invention.
第8圖顯示本發明一實施包括導電側壁之印刷電路板的立體圖。Figure 8 is a perspective view of a printed circuit board including conductive sidewalls in accordance with one embodiment of the present invention.
202．．．系統級封裝模組202. . . System level package module
203．．．接合墊203. . . Mat
204．．．導線架204. . . Lead frame
206．．．引腳206. . . Pin
208．．．焊錫208. . . Solder
210．．．底膠210. . . Primer
Claims (17)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101113121A TWI435667B (en) | 2012-04-13 | 2012-04-13 | Print circuit board assembly |
| CN201210128806.XA CN103379736B (en) | 2012-04-13 | 2012-04-27 | Printed circuit board assembly and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101113121A TWI435667B (en) | 2012-04-13 | 2012-04-13 | Print circuit board assembly |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201343019A true TW201343019A (en) | 2013-10-16 |
| TWI435667B TWI435667B (en) | 2014-04-21 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW101113121A TWI435667B (en) | 2012-04-13 | 2012-04-13 | Print circuit board assembly |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN103379736B (en) |
| TW (1) | TWI435667B (en) |
Families Citing this family (2)
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|---|---|---|---|---|
| CN113658923A (en) * | 2020-05-12 | 2021-11-16 | 宇瞻科技股份有限公司 | Packaging structure |
| CN113688595B (en) * | 2020-05-19 | 2023-08-18 | 上海复旦微电子集团股份有限公司 | System-in-package circuit schematic design method and device, and readable storage medium |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0513647A (en) * | 1991-07-05 | 1993-01-22 | Fujitsu Ltd | Semiconductor device |
| US5608262A (en) * | 1995-02-24 | 1997-03-04 | Lucent Technologies Inc. | Packaging multi-chip modules without wire-bond interconnection |
| KR100237051B1 (en) * | 1996-12-28 | 2000-01-15 | 김영환 | Bottom lead semiconductor package and method of manufacturing the same |
| JP3297387B2 (en) * | 1998-11-20 | 2002-07-02 | 沖電気工業株式会社 | Method for manufacturing semiconductor device |
| US6606237B1 (en) * | 2002-06-27 | 2003-08-12 | Murata Manufacturing Co., Ltd. | Multilayer capacitor, wiring board, decoupling circuit, and high frequency circuit incorporating the same |
| KR100604848B1 (en) * | 2004-04-30 | 2006-07-31 | 삼성전자주식회사 | System in package having solder bump vs gold bump contact and manufacturing method thereof |
| US7660128B2 (en) * | 2004-09-30 | 2010-02-09 | Emcore Corporation | Apparatus for electrical and optical interconnection |
| TWI269361B (en) * | 2005-06-17 | 2006-12-21 | Advanced Semiconductor Eng | Structure of substrate integrated embedded passive component and method of forming the same |
| TWI325617B (en) * | 2006-12-18 | 2010-06-01 | Chipmos Technologies Inc | Chip package and method of manufacturing the same |
| TWI326909B (en) * | 2007-01-03 | 2010-07-01 | Advanced Semiconductor Eng | Chip package structure |
| KR20090059391A (en) * | 2007-12-06 | 2009-06-11 | 삼성전자주식회사 | Package structure and method of manufacturing the same |
| TWI394252B (en) * | 2008-08-05 | 2013-04-21 | Unimicron Technology Corp | Package substrate |
-
2012
- 2012-04-13 TW TW101113121A patent/TWI435667B/en not_active IP Right Cessation
- 2012-04-27 CN CN201210128806.XA patent/CN103379736B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN103379736A (en) | 2013-10-30 |
| TWI435667B (en) | 2014-04-21 |
| CN103379736B (en) | 2016-04-20 |
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