JPH0229848A - System control device - Google Patents

Abstract

PURPOSE:To prevent a processor from generating malfunction by processing only a specific communication request out of plural inter-processor communication requests. CONSTITUTION:In the case of connecting a processor 1, a flag corresponding to the processor 1 out of access flags 43 is setup. then, an inter-processor(P) communication suppressing flag 44 corresponding to the processor 1 is set up and all interruptions other than XIP (indicates the end of an I/O instruction). Prior to the start of the processor 1, a processor 2 sets up data for processing the XIP interruption in a memory 3. The processor 1 reads out necessary data from a recording medium and sets up them in the memory 3. Consequently, a specific P communication request can be received from the data set up in the memory 3, and at the time of executing interruption processing corresponding to the communication request of a specific type, the communication requests of other types are not received, so that the processor can be prevented from generating malfunction.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a system control device, and more particularly to a system control device that performs memory access processing from a plurality of processing devices and inter-device communication request processing.

In conventional system control devices of this type, a flag indicating that connection is possible is provided for each of the plurality of processing devices, and when the 5-read flag is set, access to the memory becomes possible. At the same time, the configuration also allows communication requests between processing devices.

An example of such a system control device is JP-A-60-
There is one disclosed in Publication No. 3774.

In this way, the conventional system control device is configured so that when it receives a memory access request from a processing device and a request for communication between processing devices at the same time, both of them are in a connectable state.

Here, if an interrupt is made to the processing device due to an inter-processing device communication request and the 5-read processing device processes this interrupt, it is necessary to set the data for the interrupt processing in memory. As mentioned above, if a memory access request and a communication request between processing units are received at the same time,
Since both are in a connectable state, there is a drawback that if an interrupt occurs before the data for interrupt processing is set in the memory, the processing device will not operate correctly.

Data for processing only a specific type of interrupt is set in memory by another processing device, and data for processing interrupts for other types of communication requests is set by the processing device itself to handle the specific type of interrupt. It may be set in memory during communication request interrupt processing. Here, the specific type of communication request generally refers to an interrupt communication request indicating the end of an input/output command.

Therefore, if a communication request other than a specific type of communication request is accepted before the data for performing this interrupt processing has been set in the memory, the processing device that accepted the request will malfunction.

In particular, this becomes a problem when a plurality of processing devices are connected to a system control device, or when one processing device is connected to another processing device while it is operating.

SUMMARY OF THE INVENTION Therefore, the present invention has been made to solve the drawbacks of the conventional methods, and its purpose is to accept other types of communication requests during interrupt processing for a specific type of communication request. It is an object of the present invention to provide a system control device that can prevent malfunctions of a processing device.

According to the basic invention, there is provided a system control device that performs memory access processing from a plurality of processing devices and inter-device communication request processing, the system control device being provided corresponding to each of the processing devices, and configured to perform corresponding processing. means for controlling on/off access requests from devices, and means provided corresponding to each of the processing devices to selectively enable only a specific type of communication request among the processing of inter-device communication requests from the corresponding processing devices; A system control device is obtained, which is characterized in that it includes the following.

K Vertical Type Examples of the present invention will be described below in detail with reference to the drawings.

The figure is a block diagram of an embodiment of the present invention, in which the system control device 4 includes two processing devices 1.2 and 2.
．． A memory 3 that can be accessed in common from 2 is connected. The processing device 1.2 makes an access request to the system control device 4 and receives an inter-processing device communication request (P communication request) from one system control device 4.

Two access flags 43 are provided corresponding to the processing devices 1 and 2, and access requests to the system control device can be turned on and off freely.If the flags are reset, the AND gates 45 and 54 are activated. are turned off,
Access requests from each processing device are no longer supplied to the access control unit 41.

Furthermore, two P communication suppression flags 44 are provided corresponding to the processing devices 1 and 2, and can freely suppress requests other than the XIP P communication request indicating the end of an input/output command among P communication requests. be. If this flag is set, the nant gates 47 and 50 are turned off, and the decoder 5
This suppresses requests other than XlPP communication requests from 2.53. The input to this decoder 52.53 is information from the P communication control unit 42, and the decoder 52.53 determines whether the P communication request is XIP (indicating the end of an input/output command) or other information. If it is XIP, it is led out to each processing device 1.2 via an inverter 46 and a Nant gate 48, and via an inverter 49 and a Nant gate 51, respectively. If it is other than XIP, each processing bag is transmitted through the Nantes gate 47.50, which is controlled on/off by the output of the P communication suppression flag 44, and further through the Nantes gate 48.51! 1.
2.

The access control unit 41 accesses the memory 3 in response to access requests from the processing devices 1 and 2, and the two
2. The P communication control unit 42 is activated by the access control unit 41 when the access request is a P communication request, and sends the P communication request to the processing device 1.about.2. The memory 3 is accessed by the access control unit 41 when the access request is for memory access. Decoder 52.
53 is for checking whether the P communication request is XIP.

In such a configuration, when connecting the processing device 1,
First, among the access flags 43, the flag corresponding to the processing device 1 is set. Next, the 1 communication inhibition flag 44 corresponding to the processing device 1 is set to inhibit all interrupts other than XIP.

It is assumed that the processing device 2 sets data for processing XIP interrupts in the memory 3 before the processing device 1 is started. When the processing device 1 is started, the processing device 1 generates an input/output command and reads and sets necessary data on the memory 3 from a recording medium such as a disk. The processing device 1 receives the X12 interrupt indicating the end of the input/output instruction through the decoder 5.
2 and inverter 46. Receive via Nantes Gate 48.

Since the data set in the memory 3 makes it possible to accept other P communication requests, the 1 communication suppression flag 44 is reset, and the decoder 52 and Nantes gate 47.4
It becomes possible to receive the Ike's P communication request via 8.

As described above, according to the present invention, malfunctions of processing devices can be prevented by processing only specific communication requests among communication requests between processing devices.

[Brief explanation of the drawing]

The figure is a block diagram of an embodiment of the invention. Explanation of symbols of main parts 1.2... Processing device 3...Memory 4...System control device 41...Access control section 42...P communication control section 43...Access flag 44...P communication suppression flag

Claims (1)

[Claims] (1) A system control device that performs memory access processing from a plurality of processing devices and inter-device communication request processing,
A means provided corresponding to each of the processing devices for controlling on/off access requests from the corresponding processing device; and a means provided corresponding to each of the processing devices to process inter-device communication requests from the corresponding processing device. 1. A system control device comprising means for selectively enabling only a specific type of communication request.