JPH01263763A - Instruction execution control system - Google Patents

Abstract

PURPOSE:To effectively control the execution of a virtual computer instruction which is required to be exclusively executed between processors in a relatively simple constitution by progressing only the instruction execution of a single processor and stopping the other processors. CONSTITUTION:Mode display 10 which indicates the quest mode to execute a virtual computer is provided in each processor 1. When the said mode display 10 displays the guest mode, a stop request generating part 12 transmits a stop request signal 11 for the request of the stop of the other processors before the execution of a prescribed instruction. A preceding memory control device 2 receives the stop request signal 11, and repeats it as a stop control signal 13 to the entire processors 1 by a stop request propagating part 20. Simultaneously, among the processors which transmit the stop request signals 11 by a stop request selecting part 21, the highest order from the prescribed preferential order is selected. By receiving the stop control signal 13 by a responding part 15, the processor 1 notifies a stop control part 18, stops the execution of the instruction, and sends a stop response signal 14 as needed.

Description

[Detailed Description of the Invention] [Summary] An instruction execution control method for efficiently controlling the execution of virtual machine instructions that need to be executed exclusively between processing units in a multiprocessor system that executes virtual machines is provided. In a computer consisting of a plurality of processing devices having a guest mode that executes a virtual machine, the processing for which the highest predetermined priority is set among the processing devices sending the stop request signal. A device is provided with means for transmitting a progress control signal, and the processing device transmits the stop request signal to another processing device before executing a predetermined command in the guest mode. means for stopping execution of the instruction by a signal indicating that another processing device has transmitted the stop request signal; and means for executing the predetermined instruction by receiving the progress control signal. The system is configured to provide the following.

[Industrial application field]

The present invention relates to an instruction execution control method for virtual machine instructions that need to be executed exclusively between processing units in a multiprocessor system that executes virtual machines.

In computers, methods for controlling one or more other virtual computer systems, so-called virtual computers, are well known.

In that case, each virtual computer is under the control of a monitor program for controlling the virtual computer of the real computer (hereinafter referred to as VM monitor), and the virtual computer to which control is transferred by the VM monitor is the processing unit of the real computer. executed.

In one known virtual machine control method, the virtual storage area under the management of the VM monitor is controlled so that it appears as real storage from the virtual computer, so in that case, the (virtual) real storage page of the virtual computer contains the VM The monitor performs so-called paging control.

[Prior art and problems to be solved by the invention] As is well known, in virtual memory type computers, the storage area on the main storage device is divided into blocks of, for example, 2 kilobytes, and real pages are managed as units. Allocate real storage pages to the required virtual pages in the virtual storage area.

In order to control so-called paging, which involves allocation and cancellation of allocation of real pages to virtual pages, information indicating the access status of each real page is required. For example, one bit each called a reference bit and an update bit is required. A well-known method is to provide a page corresponding to each real page.

In that case, the reference bit and update bit are reset to "0" when a real page is allocated, and when an area within that real page is accessed, the corresponding reference bit is reset to "0" as an operation integrated with the access. A control mechanism is provided which sets the update bit to "1" and also sets the update bit to "1" if the access is for writing data.

By doing so, both bits can be used in paging control as data for determining whether the page in question is currently a highly needed page, or whether page out is required when page allocation is switched. can.

Since both bits are control information separate from general data and programs, a total of 7 bits are stored in a storage mechanism separate from the program storage space, along with 5 bits of information for memory protection functions that require similar handling. It is held as bit key information II.

Therefore, special instructions are required to access that information, such as l to read key information.
5K (Insert Storage Key) instruction,
5SK (Set Stora) for updating key information
ge Key) instruction, and an RRB for reading the reference bit and update bit, and resetting the reference bit to 0''.
(Reset Reference Bit) command, etc.

In the case of a virtual computer as well, the above-mentioned control mechanism works for the real page accessed by the execution of the virtual computer, and the reference bit and update bit are sent, and the real page is transferred to the virtual computer. The virtual machine program can use both bits correctly as long as the state in which they are assigned continues.

However, as mentioned above, the virtual real page that is directly visible to the virtual machine (hereinafter referred to as virtual real page) is a virtual page in the virtual space prepared by the VM monitor, and an actual real page is allocated to that virtual page. Therefore,
The real page assigned to the virtual real page may be switched to another real page by the paging control of the VM monitor.

As a result, reference bits and update bits are naturally bounded, but as a real page, that is, a virtual real page simulated for a virtual machine, the reference bits and update bits are treated as the same virtual real page regardless of real page switching. The content of focus must be mb't.

For this purpose, the VM monitor provides a virtual key information area for each virtual machine to hold key information corresponding to the virtual real page, and in the guest mode, which is provided for specific control of the execution of the virtual machine of the processing unit, When a key information processing command is executed, it refers to both the key information of the relevant real page and the corresponding information of the virtual key information area, and processes the virtual real page so that there is no contradiction in the continuity of the state. , so that the image information matches in the execution results.

That is, in the SSK command, designated key information is set for both. In the ISK instruction, the logical sum of the two is read as a result, and the same content is set in both. Further, in the RRB instruction, the reference bit and update bit of the logical sum of the two are read as a result, and the update bit with the same value and the reference bit of "0" are set as the new contents of both.

Therefore, if the same virtual machine is being executed by two or more processing units, and the virtual machines of both processing units execute key information processing instructions for the same virtual real page in parallel, the key information of the real page and the virtual Because both the key information in the key information 9181 area and the key information in the key information 9181 area must be processed, depending on the execution timing of both processing units, for example, the virtual key information area may be forcibly set by executing the SSK command of one of the processing units. The key information is set, the RRB instruction execution result of the other processing device is set in the key information of the real page, and when the instruction execution of both processing devices is finished, the key information of the real page and the key information of the virtual key information area are set. This may result in a situation where the two do not match, causing inconsistency in subsequent processing.

The present invention aims to provide an instruction execution control method for efficiently controlling the execution of virtual machine instructions that need to be executed exclusively between processing units with a relatively simple configuration in a multiprocessor system that executes virtual machines. shall be.

[Means to solve the problem]

The figure is a block diagram showing the configuration of the present invention.

The figure shows the configuration of a multiprocessor system, in which a main memory control device 2 connects a plurality of processing devices 1 and controls information exchange between the processing device 1 and other devices. A stop request generation unit 12 that issues a stop request signal 11 according to a predetermined command type, and a stop control signal 1
3, and a stop control section 18 that receives the progress control signal 16 and stops the processing of the instruction execution processing section 17 under predetermined conditions. includes a stop request propagation unit 20 that receives a stop request signal 11 from all processing devices 1 and sends a stop request signal 13 to all processing devices 1; and a stop request signal 11 and a stop response signal 14.
A stop request selection section 21 is provided which receives the request and sends a progress control signal 16 to the processing device 1.

[For production]

Each processing device 1 has a mode display 10 indicating the guest mode in which the virtual machine is executed, and when the mode display 10 is the guest mode, the stop request generation unit 12 performs other processing before executing a predetermined instruction. A stop request signal 11 is transmitted to request stopping of the device.

The main storage control device 2 receives the stop request signal 11 and relays it as a stop control signal 13 to all the processing devices l by the stop request propagation unit 20, and also transmits the stop request signal 11 by the stop request selection unit 21. Among the devices 1, one processing device having the highest predetermined priority is selected, and if necessary, the progress control signal 16 is transmitted with reference to the stop response signal 14.

In the processing device 1, when the stop control signal 13 is received by the response unit 15, the stop control unit 18 is notified to stop the execution of the command, and if necessary, the stop response signal 14 is sent out.

The stop control unit 18 sends a signal to stop the instruction execution to the instruction execution processing unit 17 based on the signal from the stop request generation unit 12 or the signal from the response unit 15, and when the instruction execution is stopped due to the signal from the stop request generation unit 12. By receiving the progress control signal 16, the command execution processing unit 17 is released from the command execution stop control.

According to the above control method, when executing necessary commands such as the key information processing command, exclusive control is performed between the processing devices by allowing only one processing device to proceed with the instruction execution and stopping the other processing devices. I can do it.

[Example] The figure shows the configuration of a multi-process system, in which a plurality of processing devices 1 are connected to a main memory control device 2 as is well known, and the main memory control device 2 transfers data from each processing device 1 to the main memory ( (not shown) and the exchange of information between processing devices.

Each processing device 1 has a mode display 10 indicating the guest mode in which the virtual machine is executed, and the instruction execution processing unit 17 processes fetching, interpretation, and execution of instructions as usual, and the mode display 10 indicates the guest mode. is displayed, the configuration is such that the execution process for a predetermined instruction is changed to a process defined for the virtual machine and then executed.

The stop request generation unit 12 of each processing device 1 inputs the display on the mode display 10 and a signal sent from the instruction execution processing unit 17 indicating the instruction type of the instruction to be executed, and executes a predetermined instruction in the guest mode. For example, when it is detected that the above-mentioned key information processing command is executed, a stop request signal 11 for requesting the stop of other processing devices is sent to the main storage control device 2. It also sends a signal to the stop control section 18 to stop the instruction execution processing section 17 from executing the instructions.

When the main storage control device 2 receives a stop request signal 11 from any of the processing devices 1, the stop request propagation unit 20 relays it to all the processing devices 1 as a stop control signal 13, and each processing device 1
When the response unit 15 receives this stop control signal 13, it notifies the stop control unit 1 and stops execution of the command.
A stop response signal 14 is sent to the main storage control device 2.

Therefore, in the main memory control device 2, the stop request selection unit 21 selects one of the processing devices 1 sending the stop request signal 11 in the set priority order, and all the processing devices 1 respond with a stop request. After confirming that the signal 14 has been received, the progress control signal 16 is sent only to the selected processing device 1.

In the processing device 1, the stop control unit 18 receives the progress control signal 16, and when the stop request generation unit 12 has stopped the progress control signal 16, the stop control unit 18 issues an instruction to the instruction execution processing unit 17 by receiving the progress control signal 16. Since the execution stop control is released, the instruction execution processing unit 17 starts executing the key information processing instruction that has been stopped.

As a result, when the stop request generation unit 12 detects the completion of execution of the key information processing command or the like that caused the stop request signal 11 to be issued, the stop request signal 11 is terminated.

At this point, if the stop request signal 11 is not output from another processing device, all the stop request signals 11 will be terminated.
The stop control 1 signal 13 and the progress control signal 16 from the main storage control device 2 are terminated, and the instruction execution of all the processing devices 1 is restored to the normal state and restarted.

However, if the stop request signal 11 is also issued from one or more other processing devices l, the stop request selection unit 21
When one of the stop request signals 11 input manually disappears, another processing device is selected and operates to send the progress control signal 16 to that processing device 1.
The command is executed by the processing device 1 that newly receives the progress control signal 16.

In this way, if a plurality of processing devices 1 try to execute key information processing commands etc. at the same time, the stop request selection unit 21
Only one processing device selected according to the priority set is allowed to execute the instructions in order, and exclusive control of instruction execution is possible.

Therefore, in the above example of the key information processing instruction, if the same virtual computer is being executed by two or more processing devices, and the virtual computers of the image processing devices are attempting to execute the key information processing instruction for the same virtual real page in parallel, Also, until the processing device finishes processing both the key information of the real page and the key information of the virtual key information area by executing the command, other processing devices will not update the information, so the key information It is always guaranteed that the key information of the real page and the key information of the virtual key information area match after execution of the processing instruction.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, in a multiprocessor system that executes virtual machines, execution control of virtual machine instructions that need to be executed exclusively between processing units can be efficiently performed. It has significant industrial effects.

[Brief explanation of the drawing]

The figure is a block diagram showing the configuration of the present invention. In the figure, 1 is a processing device, 2 is a main memory control device, 10 is a mode display, 11 is a stop request signal, 12 is a stop request section, 13 is a stop control signal, 14 is a stop response signal, 15 is a response section, 16 17 is a progress control signal; 17 is an instruction execution processing unit; 18 is a stop control unit; 20 is a stop request propagation unit; and 21 is a stop request selection unit. A block diagram showing the configuration of the present invention.

Claims (1)

[Claims] In a computer consisting of a plurality of processing devices (1) having a guest mode (10) that executes a virtual machine, among the processing devices (1) transmitting a stop request signal (11),
Means (2) for transmitting a progress control signal (16) to the processing device to which the highest predetermined priority is set;
1), and the processing device (1) includes means (12) for transmitting the stop request signal (11) to other processing devices before executing a predetermined command in the guest mode. ), means (15, 1) for stopping execution of the instruction in response to a signal (13) indicating that another processing device (1) has transmitted the stop request signal;
8) and an instruction execution control system, comprising means (17, 18) for executing the predetermined instruction by receiving the progress control signal (16).