JPH02289361A - Printing controller in serial printer - Google Patents

Abstract

PURPOSE:To determine a gap between printing elements and to conduct printing without disordering a dot gap by providing a delay means for, with a delay from a printing signal to one of a plurality of printing elements, generating a printing signal to another one and a change-over means for changing over a printing signal to be delayed on the basis of a signal indicating a printing direction for scanning a printing line. CONSTITUTION:Gaps between a plurality of printing elements 2a - 2i, 3a - 3i are not set to be an integral multiple of a dot gap to be printed. Therefore, a printing signal 27 - 30 to the succeeding printing element is generated with a delay from a printing signal to the preceding printing element in a printing direction for scanning a printing line by a delay means 17, whereby the succeeding printing element is excited when it reaches a predetermined printing position. In this manner, dots can be printed at equal intervals without the need for setting gaps between the two or more printing elements to be an integral multiple of a dot gap. On the other hand, when a printing direction for scanning a printing line is changed over, the printing element on the preceding side in the previous printing line is turned to the succeeding side in a new printing line. Therefore, a printing signal to the appropriate printing element is changed over so as to be generated with a delay from the other printing element by a change-over means 38. In this manner, printing can be conducted without the occurrence of disorder in each of right or left printing directions.

Description

Detailed Description of the Invention [Industrial Application Field] The present invention relates to printing in a serial printer, particularly one having a print head in which a plurality of print elements are arranged side by side in the same row along the direction of movement of the print head. Regarding a control device.

[Prior art] In order to increase the printing speed of serial printers,
For example, as described in Japanese Patent Publication No. 62-22792, printing elements are arranged in two vertical columns, and two printing elements adjacent in the row direction in both columns are arranged at the same height. known to. In the device described in the above-mentioned publication, the interval between two printing elements in the row direction is set to an integral multiple of the dot interval of the dot matrix pattern to be printed. Therefore, when one printing element faces one printing column, the other printing element also faces the other column at a predetermined distance, and both printing elements must be driven simultaneously to print. No.

[Problems to be Solved by the Invention] The configuration described above requires a large amount of current when a large amount of printing data is given to each of the two rows of printing elements and printing is performed. Even if it is rare that such printing data is actually given, the voltage must not suddenly drop and become unable to print, so the design must have sufficient power supply capacity. Must be.

In order to solve this problem, the present invention sets the intervals between the printing elements so that a plurality of printing elements in the row direction are not driven at the same time, and also enables printing without disturbing the dot spacing.

[Technical Means for Solving the Problems] The present invention includes a print head in which a plurality of print elements are arranged side by side in the same row along the movement direction of the print head,
In a serial printer capable of printing lines in either direction from left to right or right to left, the interval between the plurality of printing elements is not an integral multiple of the dot interval of the dot matrix pattern to be printed. and means for generating printing signals to each of the plurality of printing elements, and generating a printing signal to other printing elements with a delay in response to a printing signal to one of the plurality of printing elements. and a switching means for switching a print signal to be delayed among print signals to the plurality of print elements based on a signal indicating a print direction for a print line.

[Operation] In this invention, since the spacing between the plurality of printing elements is not set to an integral multiple of the printing dot spacing, when the preceding printing element in the printing direction of the printing line prints in a predetermined printing column, The following print element is not in the position where it should be printed. For this reason, by generating a printing signal to a subsequent printing element with a delay with respect to a printing signal to a preceding printing element, the subsequent printing element is energized when it reaches a predetermined printing position. This allows dots to be printed at equal intervals even if the interval between the plurality of printing elements is not an integral multiple of the interval between printed dots. Also, when the printing direction for a printing line is switched, the printing element that was preceding in the previous printing line becomes the succeeding side in the new printing line, so the printing signal to that printing element is transferred to the other printing element. Switching is performed so as to delay the print signal, and printing can be performed without disturbance in either the left or right printing direction.

[Embodiment 2] As shown in FIG. 2, the print head 1 used in this embodiment includes two vertical columns of wire printing elements 2.
a to 21 and 3a to 31, and print by moving in the left and right direction in the drawing. The printing elements in each column are arranged so that two adjacent printing elements are lined up at the same height in the direction of movement of the print head 1.

Each printing element is independently driven toward the printing paper by an electromagnetic arrangement in a known manner.

In the dot matrix to be printed, in FIG. 3, the vertical dots are arranged as columns, and the horizontal dots are arranged as columns. In this embodiment, right printing elements 2a to 21 and left printing element 3a
31, the columns of the dot matrix pattern to be printed are alternately divided into two columns each. For example, when printing from left to right in Figure 3, 1.2, 5, 6.9
are assigned to the right printing elements 2a to 21, and the third column is assigned to the right printing elements 2a to 21.
The column 4.7.8 is assigned to the left printing elements 3a to 31.

The character pattern is designed so that adjacent columns in the same column do not have dots to be printed. As a result, two dots printed with the same stylus are always spaced apart by two or more columns.

The distance between the printing elements 2a to 21 and the printing elements 3a to 31 of the print head 1 in FIG. 2 is 5.67 of the distance (1/60 inch) between two adjacent columns in FIG. It is set to double. Therefore, after the right printing elements 2a to 21 print in a predetermined column, in the process of moving from left to right toward the next column to be printed, the left printing elements 3a to 31
reaches a given printing column, its printing element 3a
A driving signal for printing is applied to the right printing elements 2a to 31 after a fixed time delay from the printing of the right printing elements 2a to 21.

FIG. 1 shows the circuit for driving the printing elements.

Each column 2a to 2113a to 31 of the two-column printing element
, two data output latches 27 .
28.29.30 and two pulse width timers 1g, 1
9.20.21 and 2 NAND games)
22, 23, 24°25 are provided.

Print data sent from the host computer to the printer is converted into a dot matrix pattern as shown in FIG. The dot matrix pattern is then written column by column to the two data latches 11 and 12 through the data bus 37.

1 in Figure 3. When the pattern data of the second column is sequentially written to the data latch 11, the pattern data of the first column is transferred from the data latch 11 to the data output latch 27, and the pattern data of the second column is transferred to the data output latch 28. Ru.

Based on the distance between the printing elements 2a-21 and 3a-31, the left printing elements 3a-31 until the right printing elements 2a-21 reach between the 8th column and the 9th column in FIG. Since there is no data to be printed, non-print data "02" is written in the data latch 12 during this time, and "0" is also written in the data output latches 29 and 30.

The clock signal CLK, which is generated periodically, is sent to the counter 1.
3 is input. The count output of the counter 13 is input to the timing latch circuit 14.

Each time the count output reaches a certain value tf, the counter 13 is reset by a signal output from the timing latch circuit 14 to the counter 13, and starts counting up again. The constant value tf corresponds to the time it takes for the print head 1 to move a distance corresponding to one column in FIG. 3 when the print head 1 moves laterally. The output signal from the timing latch 14 is input to the gate switching circuit 15. The gate switching circuit 15 is composed of a flip-flop circuit, and inverts its output state every time a signal from the timing latch circuit 14 is input.

The output of the counter 13 is input to the direction switching circuit 38 via two coincidence circuits 16 and 17. One matching circuit 16
outputs a coincidence signal to the direction switching circuit 38 when the count-up output of the counter 13 is "1". This time td corresponds to the time from when the preceding printing elements 28 to 21 print until the subsequent printing elements 3a to 31 reach the nearest printing column.The direction switching circuit 38 indicates the printing direction. Based on the state of the signal HDDIR, the outputs of the two matching circuits 16, 17 are switched to the right printing element 2a-21 and the left printing element 3a-31, respectively.As is well known, the print head 1 is switched from left to right or right Printing can be performed in any horizontal movement from left to left, but when printing from left to right, the direction switching circuit 38 switches the matching circuit 16 to the right printing elements 2a to 21 as shown by the solid line in FIG. , the other matching circuit 17 is connected to the left printing elements 38 to 31, respectively, so that the right printing elements 2a to 21 can be used as preceding printing elements.Furthermore, when printing from right to left, the direction switching circuit 38 is connected to the second printing element. The matching circuit 16 is connected to the left printing element 3 as shown by the dotted line in the figure.
a to 31, and the other matching circuit 17 to left printing elements 2 to 31.
The left printing elements 3a to 31 can be used as preceding printing elements.

The output terminal of the gate switching circuit 15 has two NANDs (NAN
D) Connected directly to one input terminal of the gate 22.24 and connected via an inverter 26 to one input terminal of the other two NAND gates 23.25. One output terminal of the direction switching circuit 38 is connected to the right printing element 2a.
The other input terminal of the NAND gate 22.23 for .about.21 and the other output terminal are respectively connected to the other input terminal of the NAND gate 24.25 for the left printing elements 3a.about.31.

The pulse width timers 18, 19, 20, 21 output pulses of a length that determine the energization time of the printing element based on the outputs of the respective NAND gates 22, 23, 24, 25, respectively.

The data output latches 27 and 28 are connected to the right printing elements 2a to 21.
The two data output latches and 30 have output terminals a-i corresponding to the left printing elements 3a-31. Each data output latch 27, 28, 2
At 9.30, pattern data is written based on the output signals from the NAND gates 22 to 25, and is output to each output terminal a-i.

Output terminal of pulse width timer 18 and data output latch 27
The output terminal a of is connected to an exclusive NOR through a NAND gate 31.
) is connected to one input terminal of the gate 35a, the output terminal of the pulse width timer 19 and the output terminal a of the data output latch 28 are connected to the other input terminal of the gate 35a through a NAND gate 32; Gate 35a outputs a signal that energizes one printing element 2a. Others (7) EXCLUSIVE NOR gate 35
Similarly, for b to 35h, the output terminal of the pulse width timer 18 and the output terminal b to i of the data output latch 27, the output terminal of the pulse width timer 19 and the output terminal b of the data output latch 28
~i are connected to each other via a NAND gate (not shown).

Also, EXC for energizing the printing elements 38 to 31 in the left column.
Similarly, the LUSIVE NOR gates 36a to 361 also connect the output terminal of the pulse width timer 20 and the data output latch 2.
9, the output terminals of the pulse width timer 21 and the output terminals a-i of the data output latch 30 are connected to each other via the gates for the NAND gate 36a (only the gates are indicated by reference numbers 33 and 34). It is connected.

The operation will be explained below.

(1) When printing the characters shown in FIG. 3 by horizontally moving the print head from left to right, first the NAND gate 22 converts the output signal into data based on the output of the gate switching circuit 15 and the output of the matching circuit 16. It is output to the output latch 27 and the pulse width timer 18.

The falling edge 22a of the output signal of the NAND gate 22 (fourth
Using the trigger shown in FIG. 12 as a trigger, the pattern data of the first column is written into the data output latch 27, and a high potential (H) state is output to c-H among its output terminals. NAN
Using the rising edge 22b of the output signal of the D gate 22 as a trigger, the pulse width timer 18 outputs a pulse signal with a width W to the next stage NAND gate. This allows EXCLUSI
The VE NOR gates 35c to 35g output the pattern data of the first column by the pulse IPfjIW, and the printing elements 20 to 2g are energized.

(2) Next, in the left printing elements 3a to 31, -number circuit 1
After a certain period of time td from the output of 6, the minus number circuit 17 outputs an output. Based on the output of the -number circuit 17 and the output of the gate switching circuit 15, the NAND gate 24 outputs an output signal to the data output latch 29 and the pulse width timer 20. At this time, since the left printing elements 3a to 31 are not in the column to be printed, there is no pattern data to be written into the data output latch 29. The pulse width timer 20 outputs a pulse signal with a width W, but since there is no pattern data to be printed, the left printing elements 38-31 are not energized.

(3) Furthermore, from the beginning, the tf time agate switching circuit 15
The output state is inverted, and based on the output of the minus number circuit 16, N
AND gate 23 outputs. As a result, the pattern data of the second column is written into the data output latch 28, and an H-state output is provided to the output terminal b of the data output latch 28. On the other hand, the pulse width timer 19 outputs a pulse signal with a width W.

The EXCLUSIVE NOR gate 35b outputs the pattern data of the second column by the width W of the pulse,
Printing element 2b is energized.

At this time, there is still printing element 20 for printing the first column.
~2g has not returned, but the print data has been created so that the printing elements for printing the first and second columns do not overlap, and the two sets of pulse width timers and data output latches are independent. By doing so, you can print without any problems.

(4) From (3) above [6 hours later, the output signal of the minus number circuit 17 and the inverted output of the gate switching circuit 15 result in NAN
D gate 25 outputs. As a result, pulse width timer 2
1 outputs a pulse signal of width W, but at this time, since no pattern data is written in the data output latch 30, the left printing element is not energized.

(5) After 2tf time from the beginning, the gate switching circuit 15 returns to the initial state again. Similarly to (1) above, the pulse width timer 18 outputs the second pulse signal. However, at this time, the right printing elements 2a to 21 face the third column,
Since the third column is a column assigned to the left printing elements 3a to 31, the data output latch 27 receives the no-print signal "
0" is written. Therefore, right printing elements 2a to 2
1 is not energized.

(6) From then on, the four pulse width timers sequentially output the same operation as described above. When the right printing elements 2a to 21 reach the fifth column, the pattern data of the fifth column is written to the data output latch 27 in the same way as in (1) above, and the output terminals a and d are in the H state. The output will be displayed. The printing elements 2a and 2d are then energized by the width W of the output pulse of the pulse width timer 18.

(7) Thereafter, the non-printing state continues until the right printing elements 2a to 21 reach between the eighth column and the ninth column and the left printing elements 3a to 31 reach the third column.

When the left printing elements 3a to 31 reach the third column, the output of the gate switching circuit 15 is in an inverted state, and the -number circuit 1
Based on the output of 7, the NAND gate 25 outputs an output. Using the fall of the output of the NAND gate 25 as a trigger, the pattern data of the third column is written into the data output latch 30, and an H-state output is provided to the output terminals a and d. Using the rise of the output signal of the NAND gate 25 as a trigger, the pulse width timer 21 outputs a pulse signal with a width W to the next stage NAND gate.

This makes the NAND gate EXCLUSIVE
The pattern data of the third column is output through NOR gates 36a and 36d to energize printing elements 3a and 3d.

(8) Thereafter, the right printing elements 2a to 21 approach the ninth column, and the gate switching circuit 15 returns to its original output state again.

-When the number circuit 16 outputs, the NAND gate 22 outputs. The printing elements 2C to 2g are energized in the same way as in (1) above.

(9) Next, the left printing elements 38 to 31 approach the fourth column, but there is no data to be printed in the fourth column.

Similarly, since the fifth and sixth columns are assigned to the right print element, there is no data to be printed in the left print element.

When the left styles 3a to 31 reach the 7th column,
The output of the gate switching circuit 15 is in an inverted state, and the NAND gate 25 outputs an output based on the output of the minus number circuit 17. Similarly to (7) above, the pattern data of the seventh column is output to the output terminals a and d of the data output latch 30 in an H state.

And only the width of the output pulse from the pulse width timer 21,
Printing elements 3a and 3d are energized.

(10) While the printing elements 3a to 31 are moving from the seventh column to the eighth column, the gate switching circuit 15 returns to its initial output state again. When the printing elements 3a to 31 reach the eighth column, the NAND gate 24 outputs an output based on the output of the minus number circuit 17. As a result, the pattern data of the eighth column is written to the data output latch 29, and the printing element 3b is energized by the width of the output pulse from the pulse width timer 21.

(11) - When the printing of a line is completed and the next line is to be printed by horizontally moving the print head from right to left, the direction switching circuit 38 causes the print direction to match as shown by the dotted line based on the print direction signal HDDIR. The circuit 16 is connected to the left printing elements 3a to 31,
Other matching circuits 17 are connected to the right printing elements 2a-21, respectively. As a result, the left printing elements 3a to 31 print in advance, and the right printing elements 28 to 21 print to the left printing elements 3a to 31.
Printing is performed with a delay of td from the activation.

In the above embodiment, columns to be printed are assigned to the left and right printing elements, but it is also possible to print without determining the assignment. For example, as shown in Japanese Unexamined Patent Publication No. 63-239064, the preceding printing element prints all the data that can be printed in the driving cycle of the accident, and the following printing element prints the remaining data. FIG. 5 shows an example of the printing. The driving cycle of the printing element is set to 4 columns. When the preceding printing elements 2a to 21 print in the Oth column in FIG. 5, they can print again in the fourth column and onwards.

Hatched circles indicate dots that can be printed with the preceding print element. The subsequent printing elements 3a to 31 can print dots shown in white.

[Effects of the Invention] As described above, in this invention, since the spacing between the plurality of printing elements is not set to an integral multiple of the printing dot spacing, almost all the printing elements are not driven at the same time. , the load on the power supply can be reduced. Also, as mentioned above, even if the interval between printing elements is not an integral multiple of the printing dot interval, the printing signal to the subsequent printing element is generated by delaying the printing signal to the preceding printing element. , it is possible to print dots at equal intervals. When the printing direction is switched, the printing element to be delayed is switched, and printing can be performed equally in either the left or right printing direction.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram embodying the present invention, Fig. 2 is a front view of the print head, Fig. 3 is an explanatory diagram of the print pattern, Fig. 4 is a pulse waveform diagram, and Fig. 5 is a diagram of another embodiment. It is a figure which shows the printing example. In the figure, 1 is a print head, 2a to 2i, 3a to 31 are printing elements, 27 to 30 are pulse width timers as means for generating print signals, 17 is a coincidence circuit as a delay means, and 38
is a direction switching circuit as a switching means.

Claims (1)

[Claims] 1. A print head in which a plurality of print elements are arranged side by side in the same line along the direction of movement of the print head, and the print line can be moved in either direction from left to right or from right to left. In a serial printer that is capable of printing even though the plurality of printing elements are printed, the interval between the plurality of printing elements is not an integral multiple of the dot interval of the dot matrix pattern to be printed, and means for generating a printing signal to each of the plurality of printing elements. and a delay means for generating a printing signal to one of the plurality of printing elements with a delay in generating a printing signal to another printing element, based on a signal indicating a printing direction with respect to a printing line. , a switching means for switching a printing signal to be delayed among the printing signals to the plurality of printing elements.