JPH02280246A - Information processor - Google Patents

Abstract

PURPOSE:To execute an operand supply at a high speed by sending the operand data of plural blocks from a main storage means when not even a single effective operand exists in a buffer storage means. CONSTITUTION:An instruction processing means 1 issues the read request of the operand to a buffer storage means 2. The buffer storage means 2 investigates whether the operand to be required exists or not, the operand is sent to the instruction processing means 1 when it exists, and when it does not exist, the read request of the block to contain the required operand is issued to a main storage means 5. A control part 4 sends the operand data of the block to be required from a storage part 3 to the buffer storage means 2 and simultaneously, sends even the operand data of plural blocks successive to the block to be required from the storage part 3 to the buffer storage means 2 when not a single effective operand exists in the buffer storage means 2. Thus, the operand supply can be made speedy.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing device having a main memory storing operands, and in particular, when there is no valid operand in the buffer storage. The present invention relates to an information processing device that enables high-speed operand supply in a computer.

[Conventional technology]

In a conventional information processing device, when a buffer storage means makes a request to read a block to the main storage means, the main storage means sends only the operand data of the requested block to the main storage means. It had become.

[Problem to be solved by the invention]

Therefore, in the conventional information processing device, when there is no valid operand in the buffer storage means,
Until valid operands are accumulated in the buffer memory, there is a low probability that an operand required by the instruction processing means will exist in the buffer memory, resulting in a delay in operand supply.

[Means to solve the problem]

The information processing device of the present invention includes an instruction processing means for decoding and processing an instruction word, a main storage means for storing operands necessary for the instruction processing means to process the instruction, and the instruction processing means and the main storage means. and a buffer storage means for storing a copy of a part of the operand stored in the main storage means in blocks, the main storage means being able to read blocks from the buffer storage means. The present invention is characterized by comprising a control circuit for sending operand data of a plurality of blocks consecutive to the block as well as operand data of the block to the buffer storage means when a request is made.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. The instruction processing means 1 issues an operand read request to the buffer storage means 2. The buffer storage means 2 checks whether the requested operand exists or not, and if so, sends the operand to the instruction processing means 1. If the operand does not exist, a request is issued to the main storage means 5 to read the block containing the requested operand. The control unit 4 sends the operand data of the requested block from the storage unit 3 to the buffer storage means 2, and when there is no valid operand in the buffer storage means 2, the control unit 4 sends the operand data of the requested block. The operand data of multiple blocks is also stored in the storage unit 3.
from there to the buffer storage means 2.

〔Effect of the invention〕

As explained above, the present invention allows a large amount of operand data to be stored in the buffer memory with - number of operand requests by sending multiple blocks of operand data from the main memory when there is no valid operand in the buffer storage. Since the operands can be stored in the buffer storage means, the operands can be supplied from the buffer storage means to the instruction processing means at high speed.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention. 1... Instruction processing means, 2... Buffer storage means, 3...
- Storage unit, 4... Control unit, 5... Main storage means.

Claims (1)

[Claims] an instruction processing means for decoding and processing instruction words; a main storage means for storing operands necessary for the instruction processing means to process the instructions; and a main memory located between the instruction processing means and the main storage means. buffer storage means for storing a copy of a part of the operand stored in the storage means in units of blocks; when the main storage means receives a request to read a block from the buffer storage means, the main storage means stores a copy of the block; An information processing apparatus characterized by comprising a control circuit for sending operand data of a plurality of blocks consecutive to the block along with the operand data to the buffer storage means.