JPH0227757A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPH0227757A
JPH0227757A JP17656288A JP17656288A JPH0227757A JP H0227757 A JPH0227757 A JP H0227757A JP 17656288 A JP17656288 A JP 17656288A JP 17656288 A JP17656288 A JP 17656288A JP H0227757 A JPH0227757 A JP H0227757A
Authority
JP
Japan
Prior art keywords
leads
alloy
lead frame
semiconductor
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17656288A
Other languages
Japanese (ja)
Inventor
Takao Hirose
広瀬 隆雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP17656288A priority Critical patent/JPH0227757A/en
Publication of JPH0227757A publication Critical patent/JPH0227757A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Abstract

PURPOSE:To momentarily recover leads in initially formed shape even if the leads are deformed by forming the leads of shape memory alloy having conductivity. CONSTITUTION:Leads 1 are formed of shape memory alloy having conductivity. Its material includes nickel-titanium alloy, copper-zinc alloy, gold-cadmium alloy, nickel-aluminum alloy, etc. Thus, even if the leads are deformed due to drop during assembling or repairing or contact with something, the leads are momentarily returned to the initially formed shape by making the flame of a lighter close.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、各種の電子機器に使用される半導体装リード
フレームに関し、特に、落下、あるいは応力の付加によ
り変形してしまったリードを簡単に修復し得る半導体装
リードフレームに関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to semiconductor lead frames used in various electronic devices, and in particular can easily remove leads that have been deformed due to dropping or stress. The present invention relates to a repairable semiconductor lead frame.

[従来の技術] 従来、各種の電子機器に使用される半導体装リードフレ
ームは、複数の接続端子を有する半導体チップと、半導
体チップを収納する絶縁性を有するハウジングと、ハウ
ジングに固定された複数の導電性を有するリードと、半
導体チップの複数の接続端子と複数のリードとを連結す
る導電性を有する複数の極細のボンディングワイアと、
を備えている。
[Prior Art] Conventionally, semiconductor lead frames used in various electronic devices include a semiconductor chip having a plurality of connection terminals, an insulating housing that houses the semiconductor chip, and a plurality of semiconductor lead frames fixed to the housing. a conductive lead; a plurality of conductive ultra-fine bonding wires that connect the plurality of connection terminals of the semiconductor chip and the plurality of leads;
It is equipped with

一般に、この種の半導体装リードフレームは、プリント
基板等への実装効率をあげるために、全ての部品を小さ
く且細<シている。当然、ハウジングに固定される複数
の導電性を有するリードら、近年の半導体装リードフレ
ームにおいては、細く且形状ら複雑になっている。
Generally, in this type of semiconductor lead frame, all components are made small and thin in order to increase mounting efficiency on a printed circuit board or the like. Naturally, in recent semiconductor lead frames, a plurality of electrically conductive leads fixed to a housing have become thinner and more complex in shape.

[発明が解決しようとする課題] 上述した従来の半導体装リードフレームでは、組立、あ
るいは、修理中に落下したり、何かに触れたときに、リ
ードが直ぐに変形してしまうという欠点かある。
[Problems to be Solved by the Invention] The conventional semiconductor lead frame described above has a drawback in that the leads are easily deformed when dropped or touched by something during assembly or repair.

半導体装リードフレームの各リードは、それ専用のコネ
クタの接触端子に接続されるようになっているか、−本
でも変形すると装着できなくなる欠点があった。
Each lead of a semiconductor lead frame is connected to a contact terminal of a dedicated connector, or if the lead frame becomes deformed, it cannot be attached.

[課題を解決するための手段] 本発明は、上述した従来の問題点を解決すべくなされた
もので、簡単な操作で直ぐにリードの変形を修復するこ
とかできる半導体装リードフレームを提供することを目
的とする。
[Means for Solving the Problems] The present invention has been made to solve the above-mentioned conventional problems, and it is an object of the present invention to provide a semiconductor lead frame in which lead deformation can be repaired immediately with a simple operation. With the goal.

本発明は、上記目的を達成するため、複数の接続端子を
有する半導体チップと、半導木チップを収納する絶縁性
を有するハウジングと、ハウジングに固定された複数の
導電性を有するリードと、半導体チップの複数の接続端
子と複数のリードとを連結する導電性を有する複数の極
細のボンディングワイアと、を備えている半導体装リー
ドフレームにおいて、リードか、導電性を有する形状記
憶合金から製造されていることを特徴とする。
In order to achieve the above object, the present invention provides a semiconductor chip having a plurality of connection terminals, an insulating housing housing the semiconductor chip, a plurality of conductive leads fixed to the housing, and a semiconductor chip having a plurality of connection terminals. A semiconductor lead frame comprising a plurality of conductive ultra-thin bonding wires connecting a plurality of connection terminals of a chip and a plurality of leads, the leads being manufactured from a shape memory alloy having conductivity. It is characterized by the presence of

[実施例コ 次に、本発明の半導体装リードフレームについて図面を
参照して説明する。
[Embodiment] Next, a semiconductor lead frame of the present invention will be described with reference to the drawings.

第1図は、本発明に係る半導体装リードフレームの一実
施例を示す斜視図である。
FIG. 1 is a perspective view showing an embodiment of a semiconductor lead frame according to the present invention.

図面中、2は、複数の接続端子を有する半導体チップで
あり、4は、半導体チップ2を内部に収容して半導体チ
ップ2を保護する絶縁性を有するレンジである。1は、
レンジ4に固定された複数の導電性を有するリードであ
り、3は、半導体チップ2とリード1とを連結する導電
性を有する複数の極細のボンディングワイアである。
In the drawing, 2 is a semiconductor chip having a plurality of connection terminals, and 4 is an insulating range that houses the semiconductor chip 2 therein and protects the semiconductor chip 2. 1 is
A plurality of electrically conductive leads are fixed to the microwave oven 4, and reference numeral 3 indicates a plurality of electrically conductive ultra-thin bonding wires that connect the semiconductor chip 2 and the leads 1.

本発明に係る半導体装リードフレームにおいては、リー
ドが、導電性を有する形状記憶合金から製造されている
。材質としては、二ヶツルとチタンの合金(NT合金)
、銅・亜鉛合金、金・カドミウム合金、ニッケル・アル
ミニウム合金等がある。
In the semiconductor lead frame according to the present invention, the leads are manufactured from a shape memory alloy having electrical conductivity. The material is an alloy of Nigatsur and titanium (NT alloy).
, copper-zinc alloy, gold-cadmium alloy, nickel-aluminum alloy, etc.

例えば、NT合金で作られたリードを所望の形に加工し
ておき、これを摂氏三方〜千度で数分から三十分熱処理
する。これで、リードは、加工された形状を覚える。
For example, a lead made of an NT alloy is processed into a desired shape, and then heat treated at a temperature of 3 to 1,000 degrees Celsius for several minutes to 30 minutes. The lead will now remember the processed shape.

このように熱処理されたリードを使用した半導体装リー
ドフレームは、組立、あるいは、修理中に落下したり、
何かに触れて、リードか変形しても、ライタの炎を近け
る等して百度以上にすると瞬間的に最初に加工した形に
戻すことが出来る。
Semiconductor lead frames using heat-treated leads may fall during assembly or repair, or
Even if the reed is deformed by touching something, if you hold the flame of a lighter close to it and the temperature is above 100 degrees, it will instantly return to its original shape.

第2図は、本発明に係る半導体装リードフレームの池の
実施例を示す斜視図である。
FIG. 2 is a perspective view showing an embodiment of the pond of the semiconductor lead frame according to the present invention.

図面中、7は、複数のメタライズ8を有する積層セラミ
ンクであり、5は、積層セラミック7の回路を保護する
キャップであり、6は、積層セラミック7とキャップ5
との間に介在させた封止材である。メタライズ8の一端
は、リード1に接続されている。
In the drawing, 7 is a laminated ceramic having a plurality of metallizations 8, 5 is a cap that protects the circuit of the laminated ceramic 7, and 6 is a cap that protects the laminated ceramic 7 and the cap 5.
It is a sealing material interposed between the One end of the metallization 8 is connected to the lead 1.

第3図及び第4図は、第1図及び第2図の半導体装リー
ドフレームの異なる形状の実施例を示す斜視図である。
3 and 4 are perspective views showing examples of different shapes of the semiconductor lead frames shown in FIGS. 1 and 2. FIG.

[発明の効果] 以上説明したように本発明は、リードが、導電性を有す
る形状記憶合金から製造されているため、半導体実装リ
ードフレームが、組立、あるいは、修理中に落下したり
、何かに触れて、リードが変形しても、ライタの炎を近
ける等して百度以上にすると瞬間的に最初に加工した形
に修復することが出来る効果がある。
[Effects of the Invention] As explained above, in the present invention, since the leads are manufactured from a conductive shape memory alloy, the semiconductor mounting lead frame may be dropped or damaged during assembly or repair. Even if the reed is deformed by touching it, it has the effect of instantly restoring it to its original shape by bringing the flame of a lighter closer to the temperature above 100 degrees.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明に係る半導体装リードフレームの一実
施例を示す斜視図である。 第2図は、本発明に係る半導体装リードフレームの他の
実施例を示す斜視図である。 第3図及び第4図は、第1図及び第2図の半導体装リー
ドフレームの異なる形状の実施例を示す斜視図である。 1・・・・・・リード 2・・・・・・半導体チップ 3・・・・・・ボンディングワイア 4・・・・・・レンジ 5・・・・・・キャップ 6・・・・・封止材 7・・・・・・積層セラミック 8・・・・・・メタライズ
FIG. 1 is a perspective view showing an embodiment of a semiconductor lead frame according to the present invention. FIG. 2 is a perspective view showing another embodiment of the semiconductor lead frame according to the present invention. 3 and 4 are perspective views showing examples of different shapes of the semiconductor lead frames shown in FIGS. 1 and 2. FIG. 1... Lead 2... Semiconductor chip 3... Bonding wire 4... Range 5... Cap 6... Sealing Material 7... Laminated ceramic 8... Metallized

Claims (1)

【特許請求の範囲】[Claims] 複数の接続端子を有する半導体チップと、前記半導体チ
ップを収納する絶縁性を有するハウジングと、前記ハウ
ジングに固定された複数の導電性を有するリードと、前
記半導体チップの複数の接続端子と複数の前記リードと
を連結する導電性を有する複数の極細のボンディングワ
イアと、を備えている半導体実装リードフレームにおい
て、前記リードが、導電性を有する形状記憶合金から製
造されていることを特徴とするリードフレーム。
a semiconductor chip having a plurality of connection terminals; a housing having insulation properties that houses the semiconductor chip; a plurality of conductive leads fixed to the housing; a plurality of connection terminals of the semiconductor chip; A semiconductor mounting lead frame comprising a plurality of conductive ultra-fine bonding wires connecting leads, wherein the leads are manufactured from a conductive shape memory alloy. .
JP17656288A 1988-07-15 1988-07-15 Lead frame Pending JPH0227757A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17656288A JPH0227757A (en) 1988-07-15 1988-07-15 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17656288A JPH0227757A (en) 1988-07-15 1988-07-15 Lead frame

Publications (1)

Publication Number Publication Date
JPH0227757A true JPH0227757A (en) 1990-01-30

Family

ID=16015741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17656288A Pending JPH0227757A (en) 1988-07-15 1988-07-15 Lead frame

Country Status (1)

Country Link
JP (1) JPH0227757A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04163955A (en) * 1990-10-29 1992-06-09 Yamaha Corp Semiconductor device
US5787063A (en) * 1990-09-20 1998-07-28 Richoh Company, Ltd. Disk drive unit having improved shutter mechanism

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5787063A (en) * 1990-09-20 1998-07-28 Richoh Company, Ltd. Disk drive unit having improved shutter mechanism
US5912870A (en) * 1990-09-20 1999-06-15 Ricoh Company, Ltd. Disk drive unit having improved shutter mechanism
JPH04163955A (en) * 1990-10-29 1992-06-09 Yamaha Corp Semiconductor device

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