JPH02256268A - Cmos output buffer for semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To prevent the flow of a current to the terminal of a power source from an output terminal when the power source terminal is grounded and shorted by providing a diode whose anode is connected to the drain of a PMOS transistor and cathode is connected to the drain of an NMOS transistor, and connecting the output terminal to the drain of the NMOS transistor. CONSTITUTION:The anode of a diode 5 is connected to a P-channel MOS transistor 3. The cathode of the diode 5 is connected to the drain of an N-channel MOS transistor 6. An output terminal 8 is connected to the drain of the N-mos transistor 6. Even if a power source terminal 2 is grounded and a positive voltage is applied to the output terminal 8, the flow of the current to the power source terminal 2 from the output terminal can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a CMOS output buffer for a semiconductor integrated device.

[Conventional technology]

Conventionally, this type of CMOS output buffer for semiconductor integrated devices has a P-type diffusion layer 29 on an N-type substrate 39, as shown in FIG.
, 34, 37. N-type diffusion layers 30, 33. Gate electrode 3
2°36, input terminal 31. Output terminal 35. Power terminal 38
It has a transistor structure with
Transistor 24. N-channel MOS transistor 25
, diodes 26.27. Input terminal 22. Output terminal 28
゜The circuit configuration consists of a power supply terminal 23. As is clear from FIG. 3, a parasitic diode 26 is inserted in parallel to the source and drain of the conventional CMOS output buffer channel MOS transistor 24 for semiconductor integrated devices.

[Problem to be solved by the invention]

In the conventional CMOS output buffer for semiconductor integrated devices described above, the cathode and anode of the parasitic diode 26 are connected to the source and drain of the P-channel MOS transistor 24, respectively, so when the power is cut off, the output terminal is grounded via the diode. It has the disadvantage of being short-circuited.

An object of the present invention is to provide a C for semiconductor integrated device which solves the above-mentioned problems.
The purpose is to provide an MO3 output buffer.

[Means to solve the problem]

In order to achieve the above object, the CMO3 output buffer for a semi-dedicated integrated device according to the present invention has a diode anode connected to the drain of a P-channel MOS transistor of a CXOS output buffer sofa for a semiconductor integrated device, and a diode connected to the drain of an N-channel MO8 transistor. The cathodes of the N-channel MOS transistors are connected to each other, and the output terminal is connected to the drain of an N-channel MOS transistor.6 [Embodiment] Next, the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

In FIG. 1, the anode of a diode 5 is connected to the drain of a P-channel MOS transistor 3, and the
The drain of the channel MOS transistor 6 is connected to the cathode of the diode 5, and the output terminal 8 is further connected to the drain of the N-channel MOS transistor 6. Further, 1 is an input terminal, and 4.7 is a diode. In FIG. 1, even if the power supply terminal 2 is grounded and a positive voltage is applied to the output terminal 8, no current flows from the output terminal 8 to the power supply terminal 2 due to the diode 5.

FIG. 2 is a sectional view showing the circuit of FIG. 1 as a transistor structure. In FIG. 2, the N-type diffusion layer 18 and the P-type diffusion layer 17 form the cathode and anode of the diode, and the drain of the P-channel MO5 transistor 3 is
Type diffusion M14 is connected to P type diffusion layer 17, and N type diffusion layer 11 which is a train of N channel MOS transistor 6
is connected to the N-type diffusion layer 18 and the output terminal 21.

9 is an N-type diffusion layer, 10°15 is a gate electrode, 12.16
is a P-type diffusion layer, 13 is an N-type substrate, 19 is an input terminal, 20
is the power terminal.

〔Effect of the invention〕

As explained above, the present invention connects the anode of the diode to the drain of the P-channel MO5 transistor, the cathode of the diode to the drain of the N-channel MO5 transistor, and connects the output terminal to the drain of the N-channel MOS transistor. This has the effect of preventing current from flowing from the output terminal to the power supply terminal when the power supply terminal is short-circuited to ground.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a sectional view showing the circuit of FIG. 1 as a transistor structure, FIG. 3 is a circuit diagram showing a conventional example, and FIG. FIG. 2 is a cross-sectional view showing the circuit shown in the figure as a transistor structure. 1.19, 22.31... Input terminal 2.20, 23
, 38...Power supply terminal 3.24...P channel MOS
Transistor 4.5, 7, 26.27...Diode 6.25...N channel MOS transistor 8.21
,28.35...Output terminal 9, H,18,3(1,33...N type diffusion layer 10.1
5, 32.36... Gate electrode 12.14, 16, 1
7,29,34.37...P type diffusion layer 1.3,39.
・N type board

Claims (1)

[Claims] (1) Connect the anode of a diode to the drain of the P-channel MOS transistor of the CMOS output buffer for semiconductor integrated devices, connect the cathode of the diode to the drain of the N-channel MOS transistor, and connect the output terminal to the drain of the N-channel MOS transistor. A CMOS output buffer for a semiconductor integrated device, characterized in that: