JPH02254546A - Micro sequence circuit - Google Patents

Abstract

PURPOSE:To diagnose the health of an information processor at an arbitrary time during the operation of the information processor by performing update of health diagnosing program start indicating data and indication or setting of the start of a health diagnosing program by the indication from an external device in the middle of control program execution of the information processor. CONSTITUTION:When the address where health diagnostic program start indicating data updated by an update program in a second memory 2 is stored is accessed in the execution process of the control program, this data is supplied to an interrupt control circuit 3. The interrupt control circuit 3 indicates the storage address of the health diagnosing program stored in a first memory 1 and the execution indication of the health diagnostic program to a micro control circuit 4 to change the micro sequence, and execution of the health diagnostic program is started. When the execution of the update program in the memory 2 and the health diagnostic program is terminated, the changed micro sequence is returned to the micro sequence before the occurrence of interrupt. Thus, health diagnosis is performed at an arbitrary time in the middle of the operation of the information processor.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a micro-sequence circuit, and in particular, the present invention relates to a micro-sequence circuit, and in particular, a health check of an information processing device can be performed at any time during the operation of the information processing device, or during a specified operating state or operation. It relates to micro-sequence circuits that have functions that can be performed under certain circumstances.

[Conventional technology]

Conventionally, this type of micro-sequence circuit does not have the function of performing a health check at any time during the operation of the information processing device. The health checkup program was executed by automatically running the health checkup program while in the execution standby state.

[Problem to be solved by the invention]

In the conventional micro-sequence circuit described above, the health checkup program is run only in a certain predetermined state, so if the predetermined state is not obtained, the health checkup program is not run. First, there is a drawback that a health check of the information processing device is not performed.

An object of the present invention is to provide a micro-sequence circuit that solves the above problems.

[Means to solve the problem]

In order to achieve the above object, the micro sequence circuit of the present invention provides a first memory and a second memory that is read and accessed in the same manner as the first memory in an information processing device controlled by a micro program. an interrupt control circuit that issues an interrupt instruction to a micro sequence and generates an interrupt address; and a micro control circuit that controls reading and execution of a micro program stored in the first memory. , a control program for controlling the information processing device, a health checkup program, an update program for the second memory, etc. are stored in the first memory, startup instruction data for the health checkup program is stored in the second memory; the second stored in
According to an instruction from an interrupt control circuit that performs interrupt control using the health checkup program startup instruction data stored in the second memory and the output of the second memory as input by the means for starting the update program in the memory and the update program execution means. , starts the health checkup program stored in the first memory, and performs the health checkup operation of the information processing device at any time during the operation of the information processing device, or in a specified operating state or operating condition. .

〔Example〕

Next, one embodiment of the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In the figure, a first memory 1 is a memory that stores a control program for controlling the operation of the information processing apparatus, a health checkup program for the information processing apparatus, an update program for the second memory, and the like.

The second memory 2 is a memory that stores start instruction data for a health checkup program.

The interrupt control circuit 3 generates interrupt instructions and interrupt addresses for interrupting the micro-sequence in response to various interrupt factors.The micro-control circuit 4 controls the entire micro-sequence.

Register 5 receives the micro-
Store code.

Decoder 6 generates microcommand 30 from the microcode stored in register 5.

The address bus 100 is an address bus within the information processing device, and contains various information such as main memory address information when accessing the main memory and access address information when updating the first memory 1 and the second memory 2. This is a signal bus that carries address information.

The data bus 200 is a data bus within the information processing device, and is used to process data information and information when reading and writing data information when accessing the main memory and when updating the first memory 1 and the second memory 2. This is a signal bus that carries various data handled within the device.

The health checkup program activation instruction data stored in the second memory 2 is based on the stored data.

It directly instructs to start the health checkup program, or instructs to start the health checkup program based on other conditions such as execution of a specified micro-command, specified interrupt factor, presence or absence of failure detection, etc.

The first memory 1 and the second memory 2 are accessed simultaneously by a connecting line 14 from the microcontroller 4.

Next, a method of activating the update program for the second memory 2 stored in the first memory 1 will be explained.

A panel or work stage J connected to a diagnostic device (not shown) that can access main storage (not shown)
After writing the update address and update data of the second memory 2 to the communication area in the main storage device by operating a button (not shown), the diagnostic device issues an update program startup instruction via the connection line 18. 1 interrupt control circuit 3 receives the update program startup instruction given to it.
The update program storage address information of the second memory 2 stored in the second memory 1 is sent to the microcontroller 4 via the connection line 11, and an instruction to execute the update program is sent to the microcontroller 4 via the connection line 12.

The micro-control circuit 4 changes the micro-sequence and starts executing the update program. The update program reads the update address and update data of the second memory 2 written in the communication area in the main storage device, and updates the second memory 2 via the address bus 100 and the data bus 200. conduct.

Next, a method of starting the health checkup program stored in the first memory 1 will be explained.

The control program stored in the first memory is normally in operation to control the information processing device.

When the address where the health checkup program startup instruction data updated by the update program of the second memory 2 is accessed during the execution process of the control program, the health checkup program startup instruction data is accessed via the connection line 10. The signal is applied to the interrupt control circuit 3.

The interrupt control circuit 3 refers to the interrupt cause or failure information indicated by the connection line 13 based on the given health checkup program startup instruction data, if necessary, to determine the health status stored in the first memory 1. The storage address of the diagnostic program is given to the microcontroller 4 via the connection line 11, and the instruction to execute the health checkup program is given to the microcontroller 4 via the connection line 12. The micro-sequence is changed by the micro-control circuit 4 and the execution of the health checkup program is started.

When the execution of the update program and health check program in the second memory 2 is completed, the changed micro-sequence returns to the micro-sequence before the occurrence of the interrupt. This means that the update program and the health checkup program can be dynamically executed while the control program of the information processing device is being executed. If an abnormality in the information processing device is detected as a result of the execution of the health checkup program, the abnormality information is stored in the log area of the main storage device to notify the diagnostic device that there is an abnormality.

Upon receiving the report, the diagnostic device reads and outputs or displays the log area information as necessary, and informs maintenance personnel of information that allows maintenance work to be performed in accordance with the diagnostic results.

〔Effect of the invention〕

As explained above, the present invention updates the health checkup program startup instruction data and performs startup instructions or startup settings for the health checkup program in response to instructions from an external device while the control program of the information processing device is being executed. This has the advantage that the health checkup can be performed at any time during the operation of the information processing device or during a specified operating state or operating condition.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. 1...First memory 2...Second memory 3
...Interrupt control circuit 4...Micro control circuit 5
...Register 6...Decoder lO~1
7... Connection line 30... Micro command 100... Address bus 200... Data bus Patent applicant Ibaraki NEC Co., Ltd. Figure 1

Claims (1)

[Claims] (1) In an information processing device controlled by a micro program, a first memory, a second memory that is read and accessed in the same manner as the first memory, and an interrupt instruction and interrupt to a micro sequence. An interrupt control circuit that generates an address, and a microcontrol circuit that controls reading and execution of a microprogram stored in the first memory, and a control circuit that controls the information processing device in the first memory. program, a health checkup program, an update program for a second memory, etc., and a start instruction data for the health checkup program is stored in the second memory.
sequence circuit.