JPH02251197A - Manufacture of high-density printed circuit board - Google Patents
Manufacture of high-density printed circuit boardInfo
- Publication number
- JPH02251197A JPH02251197A JP7267689A JP7267689A JPH02251197A JP H02251197 A JPH02251197 A JP H02251197A JP 7267689 A JP7267689 A JP 7267689A JP 7267689 A JP7267689 A JP 7267689A JP H02251197 A JPH02251197 A JP H02251197A
- Authority
- JP
- Japan
- Prior art keywords
- electroless copper
- copper plating
- circuit pattern
- laminate
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 238000007747 plating Methods 0.000 claims abstract description 112
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 94
- 229910052802 copper Inorganic materials 0.000 claims abstract description 93
- 239000010949 copper Substances 0.000 claims abstract description 93
- 238000011282 treatment Methods 0.000 claims abstract description 25
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 21
- 239000000126 substance Substances 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims description 36
- 238000005530 etching Methods 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 8
- 230000004913 activation Effects 0.000 claims description 6
- 230000003647 oxidation Effects 0.000 claims description 6
- 238000007254 oxidation reaction Methods 0.000 claims description 6
- 238000000206 photolithography Methods 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 claims description 3
- 239000007788 liquid Substances 0.000 abstract description 6
- 239000002253 acid Substances 0.000 abstract description 5
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 abstract description 4
- 239000005751 Copper oxide Substances 0.000 abstract description 4
- 229910000431 copper oxide Inorganic materials 0.000 abstract description 4
- 230000002708 enhancing effect Effects 0.000 abstract 1
- 239000000243 solution Substances 0.000 description 27
- 239000000758 substrate Substances 0.000 description 22
- 229910000679 solder Inorganic materials 0.000 description 12
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 8
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 6
- 238000007772 electroless plating Methods 0.000 description 6
- 238000012360 testing method Methods 0.000 description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 6
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 4
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- 229910052804 chromium Inorganic materials 0.000 description 4
- 239000011651 chromium Substances 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 238000007788 roughening Methods 0.000 description 4
- ZWEHNKRNPOVVGH-UHFFFAOYSA-N 2-Butanone Chemical compound CCC(C)=O ZWEHNKRNPOVVGH-UHFFFAOYSA-N 0.000 description 3
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000000873 masking effect Effects 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 230000006911 nucleation Effects 0.000 description 3
- 238000010899 nucleation Methods 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- KCTAWXVAICEBSD-UHFFFAOYSA-N prop-2-enoyloxy prop-2-eneperoxoate Chemical compound C=CC(=O)OOOC(=O)C=C KCTAWXVAICEBSD-UHFFFAOYSA-N 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- UOCLXMDMGBRAIB-UHFFFAOYSA-N 1,1,1-trichloroethane Chemical compound CC(Cl)(Cl)Cl UOCLXMDMGBRAIB-UHFFFAOYSA-N 0.000 description 2
- VVBLNCFGVYUYGU-UHFFFAOYSA-N 4,4'-Bis(dimethylamino)benzophenone Chemical compound C1=CC(N(C)C)=CC=C1C(=O)C1=CC=C(N(C)C)C=C1 VVBLNCFGVYUYGU-UHFFFAOYSA-N 0.000 description 2
- NLXLAEXVIDQMFP-UHFFFAOYSA-N Ammonia chloride Chemical compound [NH4+].[Cl-] NLXLAEXVIDQMFP-UHFFFAOYSA-N 0.000 description 2
- 229920000298 Cellophane Polymers 0.000 description 2
- BAPJBEWLBFYGME-UHFFFAOYSA-N Methyl acrylate Chemical compound COC(=O)C=C BAPJBEWLBFYGME-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 239000005708 Sodium hypochlorite Substances 0.000 description 2
- PPBRXRYQALVLMV-UHFFFAOYSA-N Styrene Chemical compound C=CC1=CC=CC=C1 PPBRXRYQALVLMV-UHFFFAOYSA-N 0.000 description 2
- WGLPBDUCMAPZCE-UHFFFAOYSA-N Trioxochromium Chemical compound O=[Cr](=O)=O WGLPBDUCMAPZCE-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000003054 catalyst Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 238000005238 degreasing Methods 0.000 description 2
- 238000002845 discoloration Methods 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 230000008595 infiltration Effects 0.000 description 2
- 238000001764 infiltration Methods 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000011342 resin composition Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- SUKJFIGYRHOWBL-UHFFFAOYSA-N sodium hypochlorite Chemical compound [Na+].Cl[O-] SUKJFIGYRHOWBL-UHFFFAOYSA-N 0.000 description 2
- 239000001488 sodium phosphate Substances 0.000 description 2
- 229910000162 sodium phosphate Inorganic materials 0.000 description 2
- 239000007921 spray Substances 0.000 description 2
- 238000003786 synthesis reaction Methods 0.000 description 2
- RYFMWSXOAZQYPI-UHFFFAOYSA-K trisodium phosphate Chemical compound [Na+].[Na+].[Na+].[O-]P([O-])([O-])=O RYFMWSXOAZQYPI-UHFFFAOYSA-K 0.000 description 2
- SMZOUWXMTYCWNB-UHFFFAOYSA-N 2-(2-methoxy-5-methylphenyl)ethanamine Chemical compound COC1=CC=C(C)C=C1CCN SMZOUWXMTYCWNB-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N 2-Propenoic acid Natural products OC(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 1
- 229930185605 Bisphenol Natural products 0.000 description 1
- VVQNEPGJFQJSBK-UHFFFAOYSA-N Methyl methacrylate Chemical compound COC(=O)C(C)=C VVQNEPGJFQJSBK-UHFFFAOYSA-N 0.000 description 1
- 241000277284 Salvelinus fontinalis Species 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- HVVWZTWDBSEWIH-UHFFFAOYSA-N [2-(hydroxymethyl)-3-prop-2-enoyloxy-2-(prop-2-enoyloxymethyl)propyl] prop-2-enoate Chemical compound C=CC(=O)OCC(CO)(COC(=O)C=C)COC(=O)C=C HVVWZTWDBSEWIH-UHFFFAOYSA-N 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 235000019270 ammonium chloride Nutrition 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- CJDPJFRMHVXWPT-UHFFFAOYSA-N barium sulfide Chemical compound [S-2].[Ba+2] CJDPJFRMHVXWPT-UHFFFAOYSA-N 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- RWCCWEUUXYIKHB-UHFFFAOYSA-N benzophenone Chemical compound C=1C=CC=CC=1C(=O)C1=CC=CC=C1 RWCCWEUUXYIKHB-UHFFFAOYSA-N 0.000 description 1
- 239000012965 benzophenone Substances 0.000 description 1
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- ZCDOYSPFYFSLEW-UHFFFAOYSA-N chromate(2-) Chemical compound [O-][Cr]([O-])(=O)=O ZCDOYSPFYFSLEW-UHFFFAOYSA-N 0.000 description 1
- KRVSOGSZCMJSLX-UHFFFAOYSA-L chromic acid Substances O[Cr](O)(=O)=O KRVSOGSZCMJSLX-UHFFFAOYSA-L 0.000 description 1
- WHDPTDWLEKQKKX-UHFFFAOYSA-N cobalt molybdenum Chemical compound [Co].[Co].[Mo] WHDPTDWLEKQKKX-UHFFFAOYSA-N 0.000 description 1
- 229920001577 copolymer Polymers 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 229910000365 copper sulfate Inorganic materials 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- OPQARKPSCNTWTJ-UHFFFAOYSA-L copper(ii) acetate Chemical compound [Cu+2].CC([O-])=O.CC([O-])=O OPQARKPSCNTWTJ-UHFFFAOYSA-L 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- XXBDWLFCJWSEKW-UHFFFAOYSA-N dimethylbenzylamine Chemical compound CN(C)CC1=CC=CC=C1 XXBDWLFCJWSEKW-UHFFFAOYSA-N 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 235000019253 formic acid Nutrition 0.000 description 1
- AWJWCTOOIBYHON-UHFFFAOYSA-N furo[3,4-b]pyrazine-5,7-dione Chemical compound C1=CN=C2C(=O)OC(=O)C2=N1 AWJWCTOOIBYHON-UHFFFAOYSA-N 0.000 description 1
- LHGVFZTZFXWLCP-UHFFFAOYSA-N guaiacol Chemical compound COC1=CC=CC=C1O LHGVFZTZFXWLCP-UHFFFAOYSA-N 0.000 description 1
- 239000003112 inhibitor Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 1
- 229910052753 mercury Inorganic materials 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- NWVVVBRKAWDGAB-UHFFFAOYSA-N p-methoxyphenol Chemical compound COC1=CC=C(O)C=C1 NWVVVBRKAWDGAB-UHFFFAOYSA-N 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 239000005020 polyethylene terephthalate Substances 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明(第1発明と第2発明)は、高密度プリント回
路板の製造方法、特にスルーポールの内面のみに選択的
にめっきを行なう工程を有する同回路板の製造方法に関
するものである。[Detailed Description of the Invention] [Industrial Application Field] This invention (first invention and second invention) relates to a method for manufacturing a high-density printed circuit board, particularly a process of selectively plating only the inner surfaces of through poles. The present invention relates to a method of manufacturing the circuit board having the same.
多層基板のスルーホールの内面に銅めっきを施す場合、
従来は、孔あけした銅張積層板にめつき核処理を施し、
無電解銅めっきを薄く施して電気的な導通を得た後、電
気めっきによって所望の厚さのめっきを行なう方法がと
られてきた。When applying copper plating to the inner surface of the through-hole of a multilayer board,
Conventionally, perforated copper-clad laminates were plated and nucleated.
A method has been used in which a thin layer of electroless copper plating is applied to obtain electrical continuity, and then plating is performed to a desired thickness by electroplating.
この方法では、実装密度が増すに伴いスルーホール径が
小さくなり、また積層数が増して板厚が厚くなると、電
気めっきの厚さが、スルーホールの開口部付近で厚く、
奥になるにつれて薄くなるという問題があった。しかし
、この聞届は無電解銅めっきの採用によって解決できた
。In this method, as the mounting density increases, the through-hole diameter becomes smaller, and as the number of laminated layers increases and the plate thickness increases, the electroplating becomes thicker near the opening of the through-hole.
The problem was that it became thinner as it went deeper. However, this problem was resolved by using electroless copper plating.
ところが、この無電解銅めっきによれば、スルーホール
内面に析出した分と同じ厚さの銅が表面にも析出するた
め、回路パターン形成のためのエツチング量が増えて、
エツチングに時間を要するだけでなく、サイドエツチン
グやアンダーカットによってパターン粒度が低下するこ
とがあった。このため、無電解銅めっきは、高密度プリ
ント回路板の製造には不向であった。However, with this electroless copper plating, the same thickness of copper deposited on the inner surface of the through hole is deposited on the surface, which increases the amount of etching required to form a circuit pattern.
Not only does etching take time, but pattern grain size may be reduced due to side etching or undercutting. For this reason, electroless copper plating is not suitable for manufacturing high-density printed circuit boards.
そこで、こうした問題を解決するために、いくつかの提
案がなされている。Therefore, several proposals have been made to solve these problems.
たとえば、特開昭48−8063号公報には、スルーホ
ールをあけてからパターンエツチングを行ない、その後
めっき核処理を施し、ついて耐めっきソルダーレジスト
を塗布して無電解めっきを行なう方法が提案されている
。For example, Japanese Patent Application Laid-Open No. 48-8063 proposes a method in which pattern etching is performed after forming through holes, followed by plating nucleation treatment, followed by applying a plating-resistant solder resist and performing electroless plating. There is.
また、特開昭48−8062号公報には、孔あけした銅
張積層板に、めっき核処理を施してからパターンエツチ
ングを行ない、ついて耐めっきソルダーレジストを塗布
した後、無電解銅めっきを行なう方法が提案されている
。Furthermore, Japanese Patent Application Laid-open No. 48-8062 discloses that a perforated copper-clad laminate is subjected to plating nucleation treatment, pattern etching is then applied, a plating-resistant solder resist is applied, and then electroless copper plating is performed. A method is proposed.
さらに、特開昭61−70790号公報には、孔あけし
た銅張積層板に、めっき核処理を施し、無電解銅めっき
をスルーホール内の所望厚さよりも薄く施し、パターン
エツチングを行ない、耐めっきソルダーレジストを塗布
した後、少なくともスルーホールの内面を所望厚さまで
無電解めっきする方法が提案されている。Furthermore, JP-A-61-70790 discloses that a hole-drilled copper-clad laminate is subjected to plating nucleation treatment, electroless copper plating is applied to a thickness thinner than the desired thickness inside the through-hole, and pattern etching is performed to ensure durability. A method has been proposed in which after applying a plating solder resist, at least the inner surface of the through hole is electrolessly plated to a desired thickness.
しかし、これらの提案にも次のような問題がある。 However, these proposals also have the following problems.
すなわち、特開昭48−8063号公報の方法では、銅
配線パターンの精度は高くなるが、基材表面にめっき核
金属粒子が残留するため、マイグレーションを生じて回
路パターン間の絶縁性が低下する。That is, the method disclosed in JP-A-48-8063 improves the accuracy of the copper wiring pattern, but since the plating core metal particles remain on the surface of the base material, migration occurs and the insulation between the circuit patterns decreases. .
また、特開昭48−8062号公報の方法ては、種々の
処理工程においてめっき核が脱離したり、その機能が低
下することがある。Furthermore, in the method disclosed in Japanese Patent Application Laid-Open No. 48-8062, plating nuclei may be detached during various processing steps, or the function thereof may be deteriorated.
さらに、特開昭48−8062号公報や特開昭61−7
0790号公報の方法では、ソルダーレジストはインク
として供給されるため、必要部分に無電解銅めっきを行
なうときのマスキングは、スクリーン印刷で行なわれる
。ところが、このスクリーン印刷の精度には限界がある
。このため、この方法では、小径スルーポールやビン間
配線数の増加には対応しきれず、高密度プリント回路板
の作製は困難である。Furthermore, JP-A-48-8062 and JP-A-61-7
In the method of Publication No. 0790, since the solder resist is supplied as ink, masking when electroless copper plating is performed on necessary parts is performed by screen printing. However, there are limits to the accuracy of this screen printing. Therefore, this method cannot cope with an increase in the number of small-diameter through poles or wiring between bins, and it is difficult to manufacture a high-density printed circuit board.
また、ツルターレジストとして感光性を持つレジストを
使用することも可能であるが、レジストの耐めっき液性
が劣ることや、銅とレジストの界面にめっき液が浸入し
、配線の腐食などを引き起こすため、信頼性の高いプリ
ント回路板が得られない。It is also possible to use a photosensitive resist as a sulter resist, but the resistance of the resist to plating solutions is poor, and the plating solution can enter the interface between the copper and the resist, causing corrosion of the wiring. Therefore, a highly reliable printed circuit board cannot be obtained.
この発明(第1発明と第2発明)は、このような従来の
問題点に着目してなされたもので、無電解銅めっき時の
レジストと銅配線(回路パターン)の密着性を高めるこ
とができ、したがって、小径のスルーホールや高密度の
ピン間配線を有する高密度プリント回路板を信頼性よく
製造することができる同回路板の製造方法を提供するこ
とを目的とする。This invention (first invention and second invention) was made by focusing on such conventional problems, and it is possible to improve the adhesion between the resist and copper wiring (circuit pattern) during electroless copper plating. Therefore, an object of the present invention is to provide a method for manufacturing a high-density printed circuit board having small-diameter through holes and high-density wiring between pins with high reliability.
第1発明に係る高密度プリント回路板の製造方法は、次
の9工程を備えたものである。各工程を、それらを模式
的に示した第1図〜第9図によって説明する。The method for manufacturing a high-density printed circuit board according to the first invention includes the following nine steps. Each step will be explained with reference to FIGS. 1 to 9 which schematically show them.
(1)内層加工を行なった銅張積層板1に、第1図のよ
うに、スルーホール2をあける工程。(1) A step of drilling through holes 2 in the copper-clad laminate 1 that has undergone inner layer processing, as shown in FIG.
(2)スルーホール2をあけた銅張積層板】に、無電解
銅めっきのための活性化処理を施す工程、すなわち、同
積層板1に脱脂、酸化膜除去、粗化などの処理を行なっ
た後、第2図のように、めっき核3(通常パラジウム)
を付与する工程。(2) The step of applying activation treatment for electroless copper plating to the copper-clad laminate with through holes 2, that is, the laminate 1 is subjected to treatments such as degreasing, oxide film removal, and roughening. After that, as shown in Figure 2, plating nucleus 3 (usually palladium)
The process of imparting.
(3)活性化処理をしだ銅張積層板lの表面に、所定の
厚さより薄く(通常1〜5μm程度)無電解銅めっきを
施して、第3図のように、第1の無電解鋼めっき層4を
形成する工程。(3) After the activation treatment, electroless copper plating is applied to the surface of the copper-clad laminate l to a thickness thinner than a predetermined thickness (usually about 1 to 5 μm), and as shown in Figure 3, the first electroless copper plating is applied. Step of forming steel plating layer 4.
(4)薄い無電解銅めっき層4の表面に、エツチング(
テンティング法またははんだはがし法など)により、第
4図のように、回路パターン5を形成する工程。(4) Etching (
A step of forming a circuit pattern 5 as shown in FIG. 4 by a tenting method, a soldering method, etc.
(5)回路パターン5の表面に、化学酸化により、第5
図のように、酸化膜6を形成する工程。(5) A fifth layer is formed on the surface of the circuit pattern 5 by chemical oxidation.
As shown in the figure, a step of forming an oxide film 6.
(6)酸または無電解銅めっき液を用いた化学処理によ
り回路パターン5の表面に形成された酸化膜を、第6図
のように、溶解除去する工程。(6) A step of dissolving and removing the oxide film formed on the surface of the circuit pattern 5 by chemical treatment using acid or electroless copper plating solution, as shown in FIG.
(7)回路パターン5の上から銅張積層板1に、第7図
のように、無電解銅めっき液に耐性のあるホトレジスト
7を装着する工程。(7) A step of attaching a photoresist 7 resistant to electroless copper plating solution to the copper-clad laminate 1 from above the circuit pattern 5, as shown in FIG.
(8)写真製版技術を用いてホトレジスト7を露光し、
続いて現像し、第8図のように、レジストパターン8を
形成する工程。(8) Expose the photoresist 7 using photolithography technology,
This is followed by a step of developing and forming a resist pattern 8 as shown in FIG.
(9)少なくともスルーホール2の内面に、第9図のよ
うに、無電解銅めつきを行なって、第1の無電解銅めつ
き層4の上に第2の無電解銅めっき層9(信頼性の観点
から15μm以上)を形成し、両層4,9で所定の厚さ
の無電解銅めっき層10を形成する工程。(9) At least the inner surface of the through hole 2 is subjected to electroless copper plating as shown in FIG. 9, and a second electroless copper plating layer 9 ( 15 μm or more) from the viewpoint of reliability, and forming an electroless copper plating layer 10 with a predetermined thickness in both layers 4 and 9.
なお、(7)〜(9)の工程で使用した無電解銅めっき
時のマスキングのためのホトレジスト7は、ソルダーマ
スクとして使用される。上記ホトレジスト7は、無電解
銅めっき液に耐性を有することが必要である。Note that the photoresist 7 used for masking during electroless copper plating used in steps (7) to (9) is used as a solder mask. The photoresist 7 needs to have resistance to electroless copper plating solution.
第1発明で最も重要な工程は(5)〜(7)の工程であ
る。The most important steps in the first invention are steps (5) to (7).
すなわち、無電解銅めっき液に耐性のあるホトレジスト
7を装着する場合、回路パターン5とホトレジストアと
の密着性を向上させるために回路パターン5の表面改質
を行なう一連の工程である。ここにいう表面改質は、回
路パターン(銅配線)5の表面のみを化学的に酸化処理
して粗化したのち、酸または無電解銅めっき液を用いた
化学処理で酸化銅のみを選択的に溶解除去することによ
って行なわれる。That is, when attaching photoresist 7 that is resistant to electroless copper plating solution, this is a series of steps in which the surface of circuit pattern 5 is modified in order to improve the adhesion between circuit pattern 5 and the photoresist. The surface modification referred to here involves chemically oxidizing only the surface of the circuit pattern (copper wiring) 5 to roughen it, and then selectively removing only the copper oxide through chemical treatment using acid or electroless copper plating solution. This is done by dissolving and removing it.
化学酸化に使用する薬品としては、次亜塩素酸ナトリウ
ム、水酸化ナトリウム、リン酸ナトリウム等からなるも
の、酢酸銅、硫酸銅、硫化バリウム、塩化アンモニウム
からなるものなど、ど般的に黒化処理試薬として知られ
ているものを挙げることができる。Chemicals used for chemical oxidation include those consisting of sodium hypochlorite, sodium hydroxide, sodium phosphate, etc., and those consisting of copper acetate, copper sulfate, barium sulfide, ammonium chloride, etc., which are commonly used for blackening treatment. Those known as reagents can be mentioned.
酸化膜を溶解除去する処理液としては、硫酸。Sulfuric acid is used as a treatment solution to dissolve and remove the oxide film.
塩酸、硝酸、クロム酸、ギ酸、酢酸などを挙げることが
できるが、硫酸、塩酸、硝酸などが特に好ましい。これ
らの酸は0.5〜20容量%の水溶液として使用される
。その他の処理液としては、無電解銅めつき液を使用す
ることができる。Examples include hydrochloric acid, nitric acid, chromic acid, formic acid, and acetic acid, with sulfuric acid, hydrochloric acid, nitric acid, and the like being particularly preferred. These acids are used as 0.5-20% by volume aqueous solutions. As another treatment liquid, an electroless copper plating liquid can be used.
無電解銅めっき液はどのようなものでもよいが(9)の
工程で用いる無電解銅めっき液を用いるのが好ましい。Although any electroless copper plating solution may be used, it is preferable to use the electroless copper plating solution used in step (9).
ただし、このときに用いる無電解銅めっきの液温は、(
9)の工程で行なう無電解銅めっきの液温まり20〜3
0℃低く設定しておくのが好ましい。(9)の工程と同
じ液温に設定すると、酸化銅の溶解効率は上昇するが、
不必要な部分が無電解銅めっきされ、配線の信頼性が低
下する場合がある。20〜30℃低く設定すると、この
ような問題は起こらず、酸化銅の溶解を効果的に行なう
ことができる。However, the liquid temperature of electroless copper plating used at this time is (
9) Electroless copper plating solution temperature 20-3
It is preferable to set the temperature as low as 0°C. If the liquid temperature is set to the same as in step (9), the dissolution efficiency of copper oxide will increase, but
Unnecessary parts may be electroless copper plated, reducing the reliability of the wiring. If the temperature is set to 20 to 30 degrees Celsius, such problems will not occur and copper oxide can be effectively dissolved.
第2発明に係る高密度プリント回路板の製造方法は、次
の8工程を備えたものである。各工程を、それらを模式
的に示した第10〜17図によって説明する。The method for manufacturing a high-density printed circuit board according to the second invention includes the following eight steps. Each step will be explained with reference to FIGS. 10 to 17 which schematically show them.
(1)内層加工を行なった銅張積層板11に、第10図
のように、スルーホール12をあける工程。(1) A step of drilling through holes 12 in the copper-clad laminate 11 that has undergone inner layer processing, as shown in FIG.
(2)スルーホール12をあけた銅張積層板11に、無
電解銅めっきのための活性化処理を施す工程、すなわち
、同積層板11に脱脂、酸化膜除去、粗化などの処理を
行なりだ後、第11図のように、めっき核13(通常パ
ラジウム)を付与する工程。(2) A step of performing activation treatment for electroless copper plating on the copper-clad laminate 11 with the through holes 12, that is, the laminate 11 is subjected to treatments such as degreasing, oxide film removal, and roughening. After plating, as shown in FIG. 11, there is a step of applying plating nuclei 13 (usually palladium).
(3)活性化処理をしだ銅張積層板11の表面に、所定
の厚さより薄く(通常1〜5μm程度)無電解銅めっき
を施して、第13図のように、第1の無電解銅めっき層
14を形成する工程。(3) After the activation treatment, electroless copper plating is applied to the surface of the copper-clad laminate 11 to a thickness thinner than a predetermined thickness (usually about 1 to 5 μm), and as shown in FIG. Step of forming copper plating layer 14.
(4)この銅張積層板11の表面に樹脂層との密着性に
優れた銅以外の金属層15を、第13図のように、形成
する工程。(4) A step of forming a metal layer 15 other than copper, which has excellent adhesion with the resin layer, on the surface of this copper-clad laminate 11, as shown in FIG.
(5)この銅積層板11の表面に、エツチング(テンテ
ィング法またははんだはがし法など)により、第14図
のように、回路パターン16を形成する工程。(5) A step of forming a circuit pattern 16 on the surface of this copper laminate 11 by etching (tenting method, soldering method, etc.) as shown in FIG.
(6)回路パターン16の上から銅張積層板11に、第
15図のように、無電解銅め、・つき液に耐性のあるホ
トレジスト17を装着する工程。(6) A step of attaching electroless copper plating and photoresist 17 resistant to dripping liquid to the copper-clad laminate 11 from above the circuit pattern 16, as shown in FIG.
(7)写真製版技術を用いてホトレジスト17を露光し
、続いて現像し、第16図のように、レジストパターン
18を形成する工程。(7) A step of exposing the photoresist 17 using photolithography and developing it to form a resist pattern 18 as shown in FIG. 16.
(8)少なくともスルーホール2の内面に、第17図の
ように、無電解銅めっきを行なって、金属層15の上に
第2の無電解銅めっき層19(信頼性の観点から15μ
m以上)を形成し、3層14,15.19で所定の厚さ
の無電解銅めっき層20を形成する工程。(8) Electroless copper plating is performed on at least the inner surface of the through hole 2, as shown in FIG. 17, and a second electroless copper plating layer 19 (15μ
m or more) and form an electroless copper plating layer 20 of a predetermined thickness with three layers 14, 15, and 19.
なお、(6)〜(8)の工程で使用した無電解銅めっき
時のマスキングのためのホトレジスト17はソルタ゛−
マスクとして使用される。Note that the photoresist 17 used for masking during electroless copper plating used in steps (6) to (8) is a salter.
Used as a mask.
第2発明で使用する上記ホトレジスト17は、無電解銅
めっき液に耐性を有することが必要である。通常知られ
ているエツチングのためのドライフィルムレジストやソ
ルダーマスク用ホトレジスト等はアルカリ耐性か不十分
であり、この発明における使用は困難である。The photoresist 17 used in the second invention needs to have resistance to electroless copper plating solution. Generally known dry film resists for etching, photoresists for solder masks, etc. have insufficient alkali resistance and are difficult to use in the present invention.
第2発明で最も重要な工程は(4)〜(6)の工程であ
る。The most important steps in the second invention are steps (4) to (6).
すなわち、無電解銅めっき液に耐性のあるホトレジスト
17を装着する場合、回路パターンとレジストとの密着
性を向上させるために回路パターンの表面改質を行なう
一連の工程である。ここにいう表面改質は、回路パター
ン(銅配線)の表面に樹脂層15との密着性に優れた銅
以外の金属層を形成することによって行なわれる。この
金属層15の形成は、クロメート処理と呼ばれるクロム
めっきやコバルト・モリブデンめっき等のめつき法によ
るのが好適である。That is, when attaching the photoresist 17 that is resistant to electroless copper plating solution, this is a series of steps in which the surface of the circuit pattern is modified in order to improve the adhesion between the circuit pattern and the resist. The surface modification referred to here is performed by forming a metal layer other than copper, which has excellent adhesion to the resin layer 15, on the surface of the circuit pattern (copper wiring). The metal layer 15 is preferably formed by a plating method such as chromium plating or cobalt-molybdenum plating called chromate treatment.
第1発明においては、回路パターン5の表面の粗化を行
なうので、ホトレジスト7と回路パターン5との密着性
が向上し、無電解銅めっき時に、ホトレジスト7と回路
パターン5の界面(接合面)にめっき液が浸入せず、信
頼性よく無電解銅めっきを行なうことがてきる。In the first invention, since the surface of the circuit pattern 5 is roughened, the adhesion between the photoresist 7 and the circuit pattern 5 is improved, and the interface (bonding surface) between the photoresist 7 and the circuit pattern 5 is formed during electroless copper plating. Electroless copper plating can be performed reliably without the plating solution entering the surface.
第2発明においては、回路パターンの表面に樹脂層との
密着性に優ねた金属層15を形成するので、ホトレジス
ト17と回路パターン16の密着性が向上し、無電解銅
めっき時に、ホトレジスト17と回路パターン16の界
面にめっき液が浸入しない。このため、必要部分だけに
選択的に無電解銅めっきを精度よく行なうことができる
。In the second invention, since the metal layer 15 with excellent adhesion to the resin layer is formed on the surface of the circuit pattern, the adhesion between the photoresist 17 and the circuit pattern 16 is improved, and when electroless copper plating is performed, the photoresist 17 The plating solution does not enter the interface between the circuit pattern 16 and the circuit pattern 16. Therefore, electroless copper plating can be selectively performed only on necessary parts with high precision.
以下に、この発明の詳細な説明′1−る。 A detailed description of the invention is provided below.
実施例1〜3は第1発明の実施例であり、比較例1〜4
は実施例1〜3との比較のために示したものである。実
施例4.5は第2実施例であり、比較例5,6は実施例
4,5との比較のために示したものである。Examples 1 to 3 are examples of the first invention, and Comparative Examples 1 to 4
is shown for comparison with Examples 1 to 3. Examples 4 and 5 are second examples, and Comparative Examples 5 and 6 are shown for comparison with Examples 4 and 5.
(実施例1)
(1)ビスフェノール型エポキシアクリレートの合成
エピコート828(油化シェル社製、エポキシ当量19
0)570g (3当量)およびアクリル酸201g(
2,8モル)を1flのフラスコに入れ、重合禁止剤と
してメトキシフェノール0.77g (0,1重量%)
、ベンジルジメチルアミン3.9g(0,5重h1%)
を加えて、90℃で6時間反応させた。その後、常法に
より酸価を測定し、その値が1以下になったときに終点
とした。(Example 1) (1) Synthesis of bisphenol-type epoxy acrylate Epicote 828 (manufactured by Yuka Shell Co., Ltd., epoxy equivalent: 19
0) 570 g (3 equivalents) and 201 g acrylic acid (
2.8 mol) was placed in a 1 fl flask, and 0.77 g (0.1% by weight) of methoxyphenol was added as a polymerization inhibitor.
, benzyldimethylamine 3.9g (0.5wt h1%)
was added and reacted at 90°C for 6 hours. Thereafter, the acid value was measured by a conventional method, and when the value became 1 or less, it was considered as the end point.
(2)感光性エレメントの作製 まず、下記組成の感光性樹脂組成物の溶液を調整した。(2) Preparation of photosensitive element First, a solution of a photosensitive resin composition having the following composition was prepared.
上記(1)で合成したビスフェノール型エポキシアクリ
レート ・・・・・・ 30部ペンタエリスルト
ールトリアクリレート20部
メタクリル酸メチル・アクリル酸メチル・スチレン(重
量比70:10:20共重合物、分子量約10万)
・・・・・・ 45部ベンゾフェノン
・・・・・・ 4.8部ミヒラーケトン
・・・・・・ 0.2部P−メトキシフェノール ・
・・・−,0,2部メチルエチルケトン ・・・・
・・ 50部ついで、得られた溶液を厚さ25μm
のポリエチレンテレフタレートフィルム上に塗布し、室
温で20分間、70℃で10分間、100℃で5分間乾
燥し、感光性樹脂組成物の層の厚さが約70μmの感光
性エレメントを得た。Bisphenol type epoxy acrylate synthesized in (1) above: 30 parts pentaerythritol triacrylate 20 parts Methyl methacrylate/methyl acrylate/styrene (weight ratio 70:10:20 copolymer, molecular weight approx. 100,000)
・・・・・・ 45 parts benzophenone
・・・・・・ 4.8 parts Michler ketone
・・・・・・ 0.2 parts P-methoxyphenol ・
...-,0,2 parts methyl ethyl ketone ...
... 50 parts, and then the obtained solution was made into a layer with a thickness of 25 μm.
The photosensitive resin composition was coated on a polyethylene terephthalate film and dried at room temperature for 20 minutes, at 70° C. for 10 minutes, and at 100° C. for 5 minutes to obtain a photosensitive element having a layer thickness of about 70 μm.
(3)プリント回路板の作製
基板の厚さ1.6111111.銅箔の厚さ18μmの
ガラスエポキシ銅張積層板に、スルーホールおよび部品
孔を形成した。ついで、無電解めっき用の触媒処理を行
なったのち、無電解銅めっき浴(pH12,5,60℃
)に基板を1時間浸漬し2μmの銅膜を全面に施した。(3) Fabrication of printed circuit board Thickness of substrate 1.6111111. Through holes and component holes were formed in a glass epoxy copper clad laminate made of copper foil with a thickness of 18 μm. Next, after performing a catalyst treatment for electroless plating, an electroless copper plating bath (pH 12, 5, 60°C
) for 1 hour, and a 2 μm thick copper film was applied to the entire surface.
得られた基板にエツチングレジストを施し、その表面に
回路パターンを形成した。An etching resist was applied to the obtained substrate, and a circuit pattern was formed on the surface thereof.
この基板を下記の組成からなる化学酸化処理液に90℃
で2分間浸漬し、回路パターン上に酸化膜を形成した。This substrate was placed in a chemical oxidation treatment solution with the following composition at 90°C.
The circuit pattern was immersed in water for 2 minutes to form an oxide film on the circuit pattern.
次亜塩素酸ナトリウム 31 g/It水酸化ナ
トリウム 15g/、Qリン酸ナトリウム
12g/fiついで、酸化膜を形成した基板
を、5容量%濃度の硫酸に室温で2分間浸漬し、表面に
形成された黒い酸化膜を除去し、十分に水洗し80℃で
30分間乾燥を行なった。Sodium hypochlorite 31 g/It Sodium hydroxide 15 g/, Q Sodium phosphate
12g/fi Next, the substrate on which the oxide film was formed was immersed in 5% by volume sulfuric acid at room temperature for 2 minutes to remove the black oxide film formed on the surface, thoroughly washed with water, and dried at 80°C for 30 minutes. I did it.
この基板上に」−記(2)で得た感光性エレメントを真
空ラミネートし、露光、80℃で10分アニールを行な
ったのち、1,1.1−トリクロロエタンを用いてスプ
レー現像を行なった。The photosensitive element obtained in (2) was vacuum laminated on this substrate, exposed to light, annealed at 80° C. for 10 minutes, and then spray developed using 1,1,1-trichloroethane.
現像後、80℃で5分の乾燥、紫外線照射(2,5J/
cm2)、150℃で30分の加熱を行ない、基板に保
護膜を形成した。After development, dry at 80℃ for 5 minutes and irradiate with ultraviolet light (2.5J/
cm2) and heating at 150° C. for 30 minutes to form a protective film on the substrate.
つぎに、無電解銅めっき浴(pH12,0゜60℃)に
基板を16時間浸消し、スルーホールおよび部品孔に厚
さ約30μmの銅めっきを施した。めっき後、十分水洗
し、80℃で10分乾燥し、さらに、130゛Cで12
0分間加熱処理を行なった。Next, the substrate was immersed in an electroless copper plating bath (pH 12, 0° C., 60° C.) for 16 hours, and the through holes and component holes were plated with copper to a thickness of about 30 μm. After plating, wash thoroughly with water, dry at 80°C for 10 minutes, and then dry at 130°C for 12 minutes.
Heat treatment was performed for 0 minutes.
この−=一連の無電解めっき処理の間、保護膜の劣化、
ふくれ、剥離は起こらず、めっき液のレジストと回路パ
ターン間への浸入も発生しなかった。During this −= series of electroless plating treatments, the protective film deteriorates,
No blistering or peeling occurred, and no plating solution entered between the resist and the circuit pattern.
また、以上の工程を経て作製したプリント回路板のスル
ーホールには、良好なめつきが施されており、外観およ
び半田試験(260℃、10秒、5サイクル以−ヒ)に
おいても問題の発生はなかった。In addition, the through-holes of the printed circuit board manufactured through the above process have good plating, and no problems occur in appearance or solder tests (260°C, 10 seconds, 5 cycles or more). There wasn't.
(実施例2)
実施例1における酸化膜の除去に無電解銅めっき液を使
用した。すなわち、回路パターン上に酸化膜を形成した
基板を、pH12,5,40℃に調整された無電解銅め
っき液に、5分間十分に振動させながら浸漬して上記酸
化膜を除去し、十分に水洗し、80℃で30分間乾燥し
た。(Example 2) An electroless copper plating solution was used to remove the oxide film in Example 1. That is, a substrate with an oxide film formed on a circuit pattern is immersed in an electroless copper plating solution adjusted to pH 12, 5, and 40°C for 5 minutes while sufficiently vibrating to remove the oxide film and thoroughly remove the oxide film. It was washed with water and dried at 80°C for 30 minutes.
その他の工程は実施例1に準じて実施してプリント回路
板を作製した。作用効果は実施例1のそれと同様であっ
た。Other steps were carried out in accordance with Example 1 to produce a printed circuit board. The effect was similar to that of Example 1.
(実施例3)
実施例1.2におけるめっきレジストとして、フォテッ
クSR,−3000(日立化成■製)を使用し、実施例
1,2の手順でプリント回路板を作製した。(Example 3) As the plating resist in Example 1.2, Photec SR, -3000 (manufactured by Hitachi Chemical) was used to produce a printed circuit board according to the procedure of Examples 1 and 2.
めっき後、プリント回路板を詳細に検査したが、レジス
トの剥離、レジストと回路パターン間へのめっき液の浸
入は発生しなかった。この回路板の半田試験を行なフた
か問題は発生しなかった。After plating, the printed circuit board was inspected in detail, but no peeling of the resist or infiltration of the plating solution between the resist and the circuit pattern occurred. I ran a solder test on this circuit board and no problems occurred.
(比較例1)
実施例1.2における酸化膜の除去工程を省略してレジ
ストをラミネートし、実施例1と同じ要領で無電解銅め
っきを行なって基板を作製した。(Comparative Example 1) The oxide film removal step in Example 1.2 was omitted, a resist was laminated, and electroless copper plating was performed in the same manner as in Example 1 to produce a substrate.
この方法では、無電解銅めっき液がレジストと回路パタ
ーンの接合面に浸入し、回路パターンの変色が認められ
た。In this method, the electroless copper plating solution penetrated into the bonding surface between the resist and the circuit pattern, causing discoloration of the circuit pattern.
(比較例2)
実施例1.2において行なった化学酸化による回路パタ
ーン表面の粗化の代りに、機械研摩による回路パターン
表面の粗化を行なフて実施例1と同じ要領で基板を作製
した。(Comparative Example 2) Instead of roughening the circuit pattern surface by chemical oxidation performed in Example 1.2, the circuit pattern surface was roughened by mechanical polishing, and a substrate was produced in the same manner as in Example 1. did.
この方法では、微細な回路パターンの一部に、基板から
のはがれが認められた。In this method, peeling from the substrate was observed in some parts of the fine circuit pattern.
(比較例3)
実施例1,2における化学酸化による回路パターン表面
の粗化を行なう前の、無電解銅めっきを形成した基板(
第4図の基板)にレジストをラミネートし、実施例1,
2と同様に無電解銅めっきを行なって基板を作製した。(Comparative Example 3) A substrate on which electroless copper plating was formed (before roughening the circuit pattern surface by chemical oxidation in Examples 1 and 2)
A resist was laminated on the substrate (as shown in FIG. 4), and Example 1,
A substrate was prepared by performing electroless copper plating in the same manner as in 2.
この方法では、レジストと回路パターンの接合面にめっ
き液が浸入し、半田耐熱性試験のセロテープ剥離で、回
路パターン−トのレジストにはがれが発生した。In this method, the plating solution entered the bonding surface between the resist and the circuit pattern, and the resist of the circuit pattern was peeled off when the cellophane tape was peeled off in the soldering heat resistance test.
(比較例4)
実施例2における回路パターンの上に酸化膜を形成した
のち、ただちにレジストをラミネートし、実施例2と同
様に無電解銅めっきを行なって基板を作製した。(Comparative Example 4) After forming an oxide film on the circuit pattern in Example 2, a resist was immediately laminated, and electroless copper plating was performed in the same manner as in Example 2 to produce a substrate.
この方法では、無電解銅めっき液がレジストと回路パタ
ーンの接合面に浸入し、回路パターンの変色が認められ
た。In this method, the electroless copper plating solution penetrated into the bonding surface between the resist and the circuit pattern, causing discoloration of the circuit pattern.
(実施例4) (1)ビスフェノール型エポキシアクリレートの合成 実施例1と同様に合成した。(Example 4) (1) Synthesis of bisphenol-type epoxy acrylate It was synthesized in the same manner as in Example 1.
(2)感光性エレメントの作製 実施例1と同様に作製した。(2) Preparation of photosensitive element It was produced in the same manner as in Example 1.
(3)プリント回路板の作製
基板の厚さ1.6mm、銅箔の厚さ18μmのガラスエ
ポキシ銅張積層板に、スルーホールおよび部品孔を形成
した。ついで、無電解めっき用の触媒処理を行なったの
ち、無電解銅めつき浴(pH12,5,60℃)に基板
を1時間浸漬し、約2μmの銅膜を全面に施した。(3) Preparation of printed circuit board Through holes and component holes were formed in a glass epoxy copper clad laminate with a substrate thickness of 1.6 mm and a copper foil thickness of 18 μm. Next, after performing a catalyst treatment for electroless plating, the substrate was immersed in an electroless copper plating bath (pH 12, 5, 60° C.) for 1 hour to form a copper film of about 2 μm over the entire surface.
この基板の全面に、下記の組成からなるクロムめっき浴
を用いて、電流密度50A/dm2でクロムめっきを約
1μm程度行なフだ。The entire surface of this substrate was plated with chromium to a thickness of about 1 μm at a current density of 50 A/dm 2 using a chromium plating bath having the composition shown below.
無水クロム酸 250 g/l硫酸
2. 5g/Itついで、十分な水洗を行
ない、エツチングレジストを施して常法により回路パタ
ーンを形成した。Chromic anhydride 250 g/l sulfuric acid
2. 5 g/It was then thoroughly washed with water, and an etching resist was applied to form a circuit pattern by a conventional method.
この基板上に上記(2)で得た感光性エレメントを、真
空ラミネータを用いて積層した。積層後、ネガマスクを
用いて露光し、次いて80℃て10分間加熱したのち、
1,1.1−トリクロロエタンを用いてスプレー現像を
行なった(20℃、80秒間)。現像後、80℃で5分
間乾燥し、高圧水銀灯(sow/cm)を用いて2.5
J/cm2照射した。その後、150℃で30分間加熱
処理を行ない保護膜を形成した。The photosensitive element obtained in (2) above was laminated on this substrate using a vacuum laminator. After laminating, it was exposed to light using a negative mask, and then heated at 80°C for 10 minutes.
Spray development was performed using 1,1.1-trichloroethane (20° C., 80 seconds). After development, dry at 80°C for 5 minutes, and use a high pressure mercury lamp (sow/cm) to
It was irradiated with J/cm2. Thereafter, heat treatment was performed at 150° C. for 30 minutes to form a protective film.
つぎに、無電解銅めっき浴(pH12,0,60℃)に
基板を12時間浸漬し、厚さ約20μmの銅めっきをス
ルーホールおよび部品孔に施した。無電解めっき処理後
、充分水洗を行なったのち、80℃で10分間乾燥し、
さらに130℃で60分間加熱処理を行なった。Next, the substrate was immersed in an electroless copper plating bath (pH 12, 0, 60° C.) for 12 hours, and copper plating with a thickness of about 20 μm was applied to the through holes and component holes. After electroless plating treatment, after thoroughly rinsing with water, drying at 80℃ for 10 minutes,
Further, heat treatment was performed at 130° C. for 60 minutes.
この一連の無電解めっき処理の間、保護膜の劣化、ふく
れ、剥離は起こらず、充分な耐性を示した。また、以上
の工程を経て作製したプリント回路板のスルーホールに
は、良好なめっきが施されていた。半田耐熱試験として
255〜265℃の半田浴て10秒間浸漬したが、めっ
き膜の剥離は発生しなかフた。During this series of electroless plating treatments, the protective film did not deteriorate, blister, or peel off, and exhibited sufficient resistance. Furthermore, the through holes of the printed circuit board produced through the above steps were well plated. As a solder heat resistance test, it was immersed in a solder bath at 255 to 265°C for 10 seconds, but no peeling of the plating film occurred.
(実施例5)
実施例4におけるめっきレジストとして、フォテックS
R,−3000(Fl立化成■製)を使用し、実施例4
の手順でプリント回路板を作製した。(Example 5) Photec S was used as the plating resist in Example 4.
Example 4
A printed circuit board was fabricated using the following steps.
めつき後、プリント回路板を詳細に検査したが、レジス
トの剥離、レジストと回路パターン間へのめっき液の浸
入は発生しなかった。この回路板の半田試験を行なった
が問題は発生しなかった。After plating, the printed circuit board was inspected in detail, but no peeling of the resist or infiltration of the plating solution between the resist and the circuit pattern occurred. I conducted a solder test on this circuit board and no problems occurred.
く比較例5)
実施例4におけるクロムめつきを行なわずにレジストを
ラミネートし、実施例4と同じ要領でプリント回路板を
作製した。Comparative Example 5) A printed circuit board was produced in the same manner as in Example 4, except that the resist was laminated without performing the chromium plating in Example 4.
この方法では、無電解銅めっき時、めっき液がレジスト
と回路パターンの界面(接合面)に浸入し、回路パター
ンの腐食が発生した。また、半田耐熱試験のセロテープ
剥離で、回路パターン上のレジストのはがれが発生した
。In this method, during electroless copper plating, the plating solution entered the interface (joint surface) between the resist and the circuit pattern, causing corrosion of the circuit pattern. Additionally, when peeling off cellophane tape during a solder heat resistance test, the resist on the circuit pattern peeled off.
(比較例6)
実施例4における銅以外の金属層を形成する代りに、機
械研摩による回路パターン表面の粗化を行なって実施例
4と同じ要領て基板を作製した。(Comparative Example 6) Instead of forming a metal layer other than copper in Example 4, the surface of the circuit pattern was roughened by mechanical polishing, and a substrate was produced in the same manner as in Example 4.
この方法では微細な回路パターンの一部に基板からのは
がれが認められた。In this method, some of the fine circuit patterns were observed to peel off from the substrate.
以上のように、この発明によれば、無電解銅めつき時の
レジストと回路パターンの密着性を高めるようにしたの
で、小径のスルーホールや高密度のビン間配線を有する
高密度のプリント回路板を信頼性よく製造することがで
きる。As described above, according to the present invention, the adhesion between the resist and the circuit pattern during electroless copper plating is improved, so that high-density printed circuits having small-diameter through holes and high-density inter-bin wiring can be fabricated. Boards can be manufactured reliably.
第1図〜第9図は、第1発明による高密度プリント回路
板の製造工程を工程順に示す断面図、第10図〜第17
図は、第2発明による高密度プリント回路板の製造工程
を工程順に示す断面図である。
図において、1,11は銅張積層板、2.12はスルー
ホール、3.13はめっき核、4.14は第1の無電解
銅めっき層、5.15は回路パターン、6は酸化膜、7
.17はホトレジスト、8.18はレジストパターン、
9.19は第2の無電解銅めっき層、10.20は所定
の厚さの無電解銅めっき層を示す。1 to 9 are cross-sectional views showing the manufacturing process of a high-density printed circuit board according to the first invention in order of process, and FIGS. 10 to 17
The figures are cross-sectional views showing the manufacturing process of the high-density printed circuit board according to the second invention in order of process. In the figure, 1 and 11 are copper-clad laminates, 2.12 is a through hole, 3.13 is a plating core, 4.14 is the first electroless copper plating layer, 5.15 is a circuit pattern, and 6 is an oxide film. ,7
.. 17 is photoresist, 8.18 is resist pattern,
Reference numeral 9.19 indicates a second electroless copper plating layer, and reference numeral 10.20 indicates an electroless copper plating layer having a predetermined thickness.
Claims (2)
の積層板に無電解銅めっきのための活性化処理を施す工
程と、その積層板の表面に無電解銅めっきを所定の厚さ
より薄く施して第1の無電解銅めっき層を形成する工程
と、その積層板の表面にエッチングにより回路パターン
を形成する工程と、化学酸化により回路パターンの表面
に酸化膜を形成する工程と、その酸化膜を化学処理によ
って溶解除去する工程と、その積層板に無電解銅めっき
液に耐性のあるホトレジストを装着する工程と、その積
層板に写真製版技術を用いてレジストパターンを形成す
る工程と、その積層板の少なくともスルーホールの内面
の第1の無電解銅めっき層の上に第2の無電解銅めっき
層を形成し、両層で所定の厚さの無電解銅めっき層を形
成する工程とを有する高密度プリント回路板の製造方法
。(1) A process of forming through holes in a copper-clad laminate, a process of subjecting the laminate to activation treatment for electroless copper plating, and applying electroless copper plating to the surface of the laminate to a predetermined thickness. A step of applying a thin layer to form a first electroless copper plating layer, a step of forming a circuit pattern on the surface of the laminate by etching, a step of forming an oxide film on the surface of the circuit pattern by chemical oxidation, A step of dissolving and removing the oxide film by chemical treatment, a step of attaching a photoresist that is resistant to electroless copper plating solution to the laminate, a step of forming a resist pattern on the laminate using photolithography, A step of forming a second electroless copper plating layer on the first electroless copper plating layer on at least the inner surface of the through hole of the laminate, and forming an electroless copper plating layer of a predetermined thickness with both layers. A method for manufacturing a high-density printed circuit board, comprising:
の積層板に無電解銅めっきのための活性化処理を施す工
程と、その積層板の表面に無電解銅めっきを所定の厚さ
より薄く施して第1の無電解銅めっき層を形成する工程
と、その積層板の表面に樹脂層との密着性に優れた銅以
外の金属層を形成する工程と、その積層板の表面に金属
層をエッチングして回路パターンを形成する工程と、そ
の積層板に無電解銅めっき液に耐性のあるホトレジスト
を装着する工程と、その積層板に写真製版技術を用いて
レジストパターンを形成する工程と、その積層板の少な
くともスルーホールの内面の第1の無電解銅めっき層の
上に第2の無電解銅めっき層を形成し、両めっき層と金
属層とで所定の厚さの無電解銅めっき層を形成する工程
とを有する高密度プリント回路板の製造方法。(2) A process of forming through holes in a copper-clad laminate, a process of subjecting the laminate to activation treatment for electroless copper plating, and applying electroless copper plating to the surface of the laminate to a predetermined thickness. A step of forming a first electroless copper plating layer by applying a thin layer, a step of forming a metal layer other than copper that has excellent adhesion with the resin layer on the surface of the laminate, and a step of forming a metal layer on the surface of the laminate. A step of etching the layer to form a circuit pattern, a step of attaching a photoresist that is resistant to electroless copper plating solution to the laminate, and a step of forming a resist pattern on the laminate using photolithography technology. , a second electroless copper plating layer is formed on the first electroless copper plating layer on at least the inner surface of the through hole of the laminate, and both plating layers and the metal layer have a predetermined thickness of electroless copper. A method for manufacturing a high-density printed circuit board, comprising the step of forming a plating layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7267689A JPH02251197A (en) | 1989-03-24 | 1989-03-24 | Manufacture of high-density printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7267689A JPH02251197A (en) | 1989-03-24 | 1989-03-24 | Manufacture of high-density printed circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02251197A true JPH02251197A (en) | 1990-10-08 |
Family
ID=13496209
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7267689A Pending JPH02251197A (en) | 1989-03-24 | 1989-03-24 | Manufacture of high-density printed circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02251197A (en) |
-
1989
- 1989-03-24 JP JP7267689A patent/JPH02251197A/en active Pending
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