JPH0225039A - Manufacture of field-effect transistor - Google Patents

Abstract

PURPOSE:To obtain an asymmetric structure without increasing a gate resistance by a method wherein an asymmetric etching is performed through other opening between a source electrode and a drain electrode exposed through an opening to form an asymmetric recessed part. CONSTITUTION:An N<-> buffer layer 2 and an N-type active layer 3 are formed on a semiconductor substrate 1 and source and drain electrodes 4 and 5 are formed on the layer 3. The pattern of a resist film 6 is formed on the whole surface of the substrate. A wet etching is performed from a first opening part 7 to form a recessed part 9 in the almost center between the electrodes 4 and 5. At this time, a current path between the electrode 5 exposed through an opening part 8 and the substrate 1 is formed in an etching liquid, the etching rate on the side of the electrode 5 becomes larger than that on the side of the electrode 4 and the amounts of etching become asymmetric. A metal film 10 is deposited on the recessed part 9 using the film 6 as a mask. The film 6 and the film 10 on the film 6 are removed, a gate electrode 11 positioned near the side of the electrode 4 is formed and a PET having an asymmetric recessed structure is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a method for manufacturing a field effect transistor (FET) (7), and particularly to a method for manufacturing a field effect transistor having an asymmetric recess structure.

(b) Prior Art FIG. 2 is a sectional view of a conventional field effect transistor having a recessed structure.

In the figure, the substrate is a GaAs substrate, and an n-type buffer layer (2) and an n-type active layer (2) are sequentially formed on the substrate. In addition, (Foundation) is the recess department,
AI! Gate electrode consisting of etc.■
AuGe-Ni is provided on both sides of the gate electrode
-Source electrode made of Au etc., drain electrode (support)
is provided.

A Schittky junction field effect transistor (M
ESFET), the gate electrode ■ is the source electrode ■
It is known that electrical characteristics can be improved by biasing the wires toward . In other words, the mutual conductance (jm) is increased by biasing the gate electrode (■), and the source resistance (R
s) can be lowered, and the reverse breakdown voltage (VG) between the drain and gate can be increased.

can.

However, the width of the channel (bottom of the recess)
It is narrow, 1 to 1.5 μm, and it is not easy to form a gate electrode with a gate length of about 5 μm on one side on this narrow recess.

Conventionally, as shown in Figure 3 (Company), a resist film (2) with openings (2) is formed, a recess (2) is formed by chemical etching, and then a metal film is vapor-deposited from an oblique direction. As shown in Figure 3, a resist film with asymmetrical openings (supports) is formed by electron beam phosphorography, and chemical etching is performed to form a resist film with asymmetrical openings (centers) above the opening After forming the recessed portion (2), a metal film is deposited to form a gate electrode head that is shifted toward the source electrode side.

l/i The problem that the invention seeks to solve, however,
In the method shown in Figure (a), since the metal film is incident obliquely, the amount of evaporation is small and the gate resistance increases.
There is also a comb-shaped FET as shown in Figure 4.
However, there is a problem in that it is not possible to shift all the gate electrodes to the side of the source electrodes.

Further, the method shown in FIG. 3(a) has a problem in that the processing amount (throughput) cannot be increased because the writing speed of the electron beam is slow.

The present invention has been made in view of the above-mentioned circumstances, and is directed to the manufacture of a field effect transistor having an asymmetric recess structure, which has good throughput without increasing gate resistance, and can be applied to FETs having a square or comb-shaped structure. It is intended to provide a method.

B.) Means for Solving the Problems The present invention includes a step of forming a source electrode and a drain electrode on a semiconductor substrate, and forming a first opening portion corresponding to a gate electrode formation region on the substrate and a step of forming a first opening portion corresponding to a gate electrode formation region on the substrate. forming an insulating film having a second opening that exposes at least a portion of the insulating film; wet-etching the substrate using the insulating film and the drain electrode as a mask to form a recess; manufacturing a field effect transistor, comprising the steps of: forming a metal film in a direction substantially perpendicular to the substrate surface using as a mask; and removing the insulating film and the metal film on the insulating film. It's a method.

(E) Function According to the present invention, since a current path is formed between the substrate exposed by the first opening and the drain electrode, the first
When the recess is formed from the opening, the amount of side etching on the drain electrode side becomes larger than that on the source electrode side, making it possible to obtain an asymmetrical recess.

(f) Embodiment An embodiment of the present invention will be described with reference to FIGS. 1A to 1D.

An n-type buffer layer (2) and an n-type active layer (thickness 1000-3000, carrier concentration 1-5×10 cm) (33) are successively epitaxially grown on a GaAs substrate (semiconductor substrate) (1). A metal in ohmic contact (for example, AuGe-N1-Au) is selectively deposited on the active layer (3) to form a source electrode (4) and a drain electrode (5).
) to form. Subsequently, the entire surface of the substrate is coated with a spin-neat method I (Register) Jl (for example, 0EB manufactured by Tokyo Ohka Kogyo ■).
R-1000M) (insulating film) (6) is formed, exposed and developed using a predetermined mask, and holes are formed in a predetermined pattern (Fig. 1 (ml). First opening portion (7) corresponds to the gate electrode formation site (position shifted toward the source electrode (4) side), and the hole is opened to a width of about 0.5 μm, and the second
The opening (8) is opened to expose at least a portion of the drain electrode (5).

Next, wet-etch the substrate (1) through the first opening (7) with an etching solution containing a mixture of phosphoric acid, hydrogen peroxide, and water, or an etching solution containing a mixture of tartaric acid, hydrogen peroxide, and water. to form a recessed part (9) (Fig. 1B))
. When forming this recessed part (9), the speed of side etching is faster on the drain electrode (5) side, and the recessed part (9) is formed when viewed from the first opening part (7). The center position of the recessed part (9) is located at a position where the first opening part (7) is biased toward the source electrode (4), so that the center position of the recessed part (9) is approximately equal to the distance between the source electrode (4) and the drain electrode (5). Become the center.

Here, the reason why the recessed portion (9) is asymmetrical as described above will be explained.

If the second opening (8) is not formed, the chemical reaction during etching will take place only on the substrate surface exposed by the first opening (7), and the hydrogen bubbles generated on the surface will The etching rate decreases because the passage of electrons is prevented by reaction products such as . In other words, without the second opening (8), the exchange of electrons required in etching is prevented by the reaction product, resulting in a decrease in the etching rate. On the other hand, as in the present invention, the drain electrode (5) is connected to the second opening (8).
1 f in the etching solution.
As shown in bl, a current path is formed, and chemical reactions such as hydrogen bubble generation occur also on the drain electrode (5), so reactions are generated on the substrate surface exposed by the first opening (7). The formation of etchants is 3Fi>J, and the etching rate on the drain electrode (5) side is higher than that on the source electrode (4) side. Therefore, the recessed portion (9) formed
is asymmetrical with a large amount of side etching on the drain electrode (5) side.

Next, using the resist film (6) as a mask, a metal film α0, for example Al, is vacuum-deposited in the recessed portion (9) by about 1 μm in a direction substantially perpendicular to the substrate surface (FIG. 1c)).

Finally, the resist film (6) is removed together with the metal film on this resist film (6) using a breeding solvent to form a gate electrode αυ that is biased towards the source electrode (4). (Fig. 1(d)).

In the above embodiments, a Si 3N4 film, a 5i02 film, a polyimide film, etc. may be used instead of the resist film used as the insulating film, and a Ga film used as the semiconductor substrate may be used.
An InP substrate or the like may be used instead of the As substrate.

(g) Effects of the Invention As is clear from the above description, the present invention enables the production of a field effect transistor having an asymmetric recess structure without using oblique evaporation or electron beam phosphorography.
Even if an asymmetric recess structure is adopted, the gate resistance will increase,
There is no reduction in throughput. Furthermore, the method of the present invention can also be applied to FETs having a comb structure.

[Brief explanation of the drawing]

1) to (d) are process explanatory diagrams for explaining the method of molding a field effect transistor of the present invention, and FIG. 2 is a sectional view of a conventional field effect transistor having a recessed structure.
FIGS. 3a and 3b are explanatory diagrams for explaining the conventional method, and FIG. 4 is a top view of a field effect transistor having a comb structure. (1)...Semiconductor substrate, (2)...N type, A, 7
a layer, (310,. n-type operating layer, (4)... source electrode, (5)... drain electrode, (6)... insulating film, (7)... first opening Part, (8)...Second opening part, (9)...Recessed part, CIGI...Gold scrap film, Co., Ltd....Gate electrode. ~3 □1

Claims (1)

[Claims] 1. Forming a source electrode and a drain electrode on a semiconductor substrate, and a first opening corresponding to a gate electrode formation site on the substrate and a second opening exposing at least a portion of the drain electrode. forming a recessed portion by wet etching the substrate using the insulating film and the drain electrode as a mask; A method for manufacturing a field effect transistor, comprising the steps of: forming a metal film from the insulating film; and removing the insulating film and the metal film on the insulating film.