JPH0225035A - Semiconductor device - Google Patents

Abstract

PURPOSE:To contrive a reduction in a capacity without reducing a yield by a method wherein a second electrode is provided extendedly in such a way that the electrode faces a first electrode to be grounded, which is formed on the surface of a semiconductor substratum through an oxide film, through a surface protective film. CONSTITUTION:A transistor is formed by a method wherein a base diffused layer 2 and an emitter diffused layer 3 are formed in an Si wafer 1 and an oxide film 4 is formed on the surface of the wafer 1. Openings 4a and 4b are provided in the film 4 and an emitter electrode 6, which is continued to the layer 3 through the opening 4a, is formed on the film 4. A surface protective film 7, which is applied on the electrode 6 and the film 4, is formed. An opening 7a for obtaining a contact region in the electrode 6 and an opening 7b to correspond to the opening 4b in the film 4 are provided in the film 7 and the film 7 is provided in such a way that a base electrode 5, which is continued to the layer 2 through the openings 4b and 7b, faces the electrode 6 through the film 7. This transistor is used being grounded at its emitter and by using the electrode 5 as the signal electrode 6, a capacity between the water 1 and the electrode 6 and a capacity between the electrodes 5 and 6 are cancelled.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to a semiconductor device, and particularly to a semiconductor device that has been devised to reduce droplets and low waves.

(B) Prior art A conventional semiconductor device, for example, a high frequency transistor having an extended electrode configuration, has a base diffusion layer 12 of different conductivity types and an emitter diffusion layer on a wafer 11 forming a collector, as shown in FIG. A layer 13 is formed on this wafer 1.
An oxide film 14 is formed on the surface of the oxide film 1.
4 is opened, and a base electrode 16 and an emitter electrode 15 are formed covering the oxide film 14 and are electrically connected to the base diffusion layer 12 and the emitter diffusion layer 13, respectively.
6. A surface protection film 17 is formed to cover the emitter electrode 15 and the oxide film 14. In this type of transistor, a base electrode 16 and an emitter electrode 15 face the wafer 11 with an oxide film 14 in between, and MO3 capacities IcM t and CM t exist, respectively. This M
O3 capacitance deteriorates high frequency characteristics. Conventionally, a so-called Faraday shield has been employed to reduce this risk.

As shown in FIG. 5, in this transistor, when forming the base diffusion layer 12, a Faraday shield layer 18 is formed in the region where the base electrode 16 faces. The Faraday shield layer is directly short-circuited by an external electrode, and the CM
, has been virtually eliminated.

(c) A transistor having a conventional Faraday shield layer, which is described as a problem to be solved by the invention, has the effect of reducing capacitance, but the Faraday shield layer 18 forms a junction with the collector 11, and this The leakage (■cE.) between the collector and emitter increases through the bonding surface, and the yield decreases.
There was one question.

The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to provide a semiconductor device that can realize a reduction in capacity without reducing the yield.

(d) Means and operation for solving the problems The semiconductor device of the present invention comprises forming first and second diffusion layers (2, 3) of different conductivity types on a semiconductor base (1), and forming an oxide film (4) on the surface of the base; opening this oxide film to form first and second electrodes (5, 6) electrically connected to the first and second diffusion layers, respectively; In the device in which a surface protective film (7) is formed covering a portion of the first and second electrodes and the oxide film, the surface protective film (7) is applied to the second electrode (6) to be grounded. It is characterized in that the first electrode (5) is extended on the surface protection film so as to face each other through the surface.

For example, when this semiconductor device is used with a grounded emitter, the first electrode, that is, the base electrode, which is a signal electrode, is extended to face the emitter electrode through the surface protective film. Although there appears to be a capacitance between the emitter electrodes, it can be virtually ignored because the emitter electrodes are grounded. Furthermore, since no Faraday shield layer is provided, there is no fear of increased leakage between the collector and emitter, and a decrease in yield can be prevented.

(E) Examples The present invention will be explained in more detail with reference to Examples below.

1 and 2 are a sectional view and a plan view of a transistor showing an embodiment of the present invention.

In this transistor, a base diffusion layer 2 and an emitter diffusion layer 3 are formed on a silicon wafer 1, and an oxidized n-oxide (SiOz film) 4 is formed on the surface of this wafer 1. Further, openings 4a and 4b are provided in the oxide film 4,
An emitter electrode 6 is formed on the oxide film 4 and is electrically connected to the emitter diffusion layer 3 through the opening 4a. Further, a surface protection film 7 is formed to cover the emitter electrode 6 and the oxide film 4. The surface protection film 7 is provided with an intermediate lower part a for obtaining a contact region of the emitter electrode 6, and an open lower part b corresponding to the opening 4b of the oxide film 4. Furthermore, the opening 4b
, 7b to the base diffusion WIi2, the base electrode 5 is formed to extend over the surface protection film 7 so as to face the emitter electrode 6 with the surface protection film 7 interposed therebetween.

The transistor configured as described above is used in a grounded emitter configuration, and therefore, the base electrode 5 serves as a signal electrode. In this transistor, an MO5 capacitor CM' is connected between the silicon wafer 1 and the emitter electrode 6, and the emitter electrode 6
There appears to be an MO8 capacitance CM' between the base electrode 5 and the base electrode 5, but when using a common emitter, the MO38 amount C
Since M',,CM'2 are canceled, these MO
3 capacitance can be virtually ignored, resulting in improved high frequency characteristics.

Next, a method of manufacturing the transistor of the above embodiment will be explained.

First, as shown in FIG. 3(A), a silicon wafer 1 (
An oxide film (SiOz) 4 is formed on the surface of the oxide film (n type), and an opening 4a is formed in the oxide film 4 in order to form a base diffusion layer. Next, as shown in FIG. 3(B), the base diffusion layer 2 (p) is applied to the surface of the silicon wafer I through the opening 4a.
form).

Then, the surface of the base diffusion layer 20 is subjected to oxidation treatment to form an opening 4a2 for forming an emitter diffusion layer.

Next, as shown in FIG. 3(C), the opening 4. Form an emitter diffusion [3 (n-type) through a2. Then, the surface of the emitter diffusion layer 3 is oxidized to form an opening 4a for contacting the emitter electrode. Next, as shown in FIG. 4(D), an emitter electrode 6 is formed on the oxide film 4 to be conductive through the opening 4a in the emitter diffusion layer 3. This emitter electrode 6 is made by depositing a thin film of aluminum (142) on the entire upper surface of the oxidized rIIi4, applying a photoresist (not shown) on the thin film, and exposing this resist to light using a mask for the emitter electrode. It is formed by etching the wafer surface, leaving the resist only in the area corresponding to the area. Next, as shown in FIG. 3(E), the oxide film 4 and the emitter electrode 6 are covered, and the PS
A surface protection film 7 made of G or the like is formed, and an open lower part a for the emitter electrode 6 and an open lower part b for the base electrode are formed. At this time, an opening 4b is provided in the oxide film 4 to bring the base electrode into contact with the base diffusion layer 2. Next, Figure 3 (F)
As shown in FIG. 2, a base electrode 5 is formed extending over the surface protection film 7 and in contact with the base diffusion layer 2 through the openings 4b and 7b. The pattern formation method for this base electrode 5 is the same as that for the emitter electrode 6 described above.

In addition, in the above manufacturing method, the base electrode 5 which is a signal electrode
After forming the emitter electrode 6, a surface protective film 7 is formed, and then the surface protective film 7 and the oxide film 4 are formed.
The case where the base electrode 5 of the opening 4b is formed as a layer is formed in advance when forming the emitter electrode 6, and the surface protective film 7 is further formed. After the formation, the open lower b may be provided, and then the upper layer base electrode may be formed.

In addition, in the above embodiment, a transistor used for emitter grounding is taken as an example, but the present invention has a structure in which the emitter electrode is used as a signal electrode and a base electrode is sandwiched between the emitter collector as a capacitor electrode. It can also be used for grounded base types.

Furthermore, although the above embodiments have been described assuming a single transistor, the present invention can of course be applied to ICs and the like.

(f) Effects of the Invention According to the present invention, the second electrode is formed on the surface of the semiconductor base with an oxide film interposed therebetween, and faces the first electrode to be grounded through the surface protection film. 1! Since the electrode is extended on the surface protective film, the MO3 capacitance added to the signal electrode, that is, the second electrode, can be canceled and the high frequency characteristics are improved. In addition, since a Faraday shield layer is not provided as in conventional capacitance reduction measures, there is no need to worry about increased leakage between the collector and emitter, for example, and a decrease in yield can be prevented accordingly.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a transistor showing an embodiment of the present invention, FIG. 2 is a plan view of the same transistor, and FIG.
Figure (A), Figure 3 (B), Figure 3 (C), Figure 3 (D)
, FIG. 3(F), and FIG. 3(F) are cross-sectional views for explaining the manufacturing method of the above transistor, FIG. 4 is a cross-sectional view of a conventional general transistor, and FIG. FIG. 2 is a cross-sectional view of a conventional transistor in which measures are taken to reduce capacitance. 1: Wafer, 2: Base diffusion layer, 3: Emitter diffusion layer, 4: Oxide film, 5: Base electrode, 6: Emitter electrode, 7: Surface protective film.

Claims (1)

[Claims] (1) forming first and second diffusion layers of different conductivity types on a semiconductor base, forming an oxide film on the surface of the semiconductor base;
This oxide film is opened to form first and second electrodes that are electrically connected to the first and second diffusion layers, respectively, and
, in a semiconductor device in which a surface protection film is formed covering a part of the second electrode and the oxide film, a second electrode is disposed so as to face the first electrode to be grounded through the surface protection film. A semiconductor device characterized in that an electrode is provided on the surface protective film.