JP2940689B2 - Thin film transistor array of active matrix display device and method of manufacturing the same - Google Patents

Description

The present invention relates to a thin film transistor array (hereinafter, referred to as TFT) of an active matrix display device.

(B) Conventional technology In recent years, an active matrix type display device, particularly an active matrix type liquid crystal display device, has been developed, and a liquid crystal TV using this device has been put to practical use.

In such an active matrix type liquid crystal display device, one cell substrate of a liquid crystal cell is a thin film transistor array substrate corresponding to a pixel electrode, and the other cell substrate is a counter electrode substrate.

FIG. 3 shows a sectional structure of one pixel unit of a thin film transistor array of a conventional active matrix display device.

In the conventional device shown in FIG. 1, a gate electrode 2, a gate insulating film 4, an amorphous semiconductor film 5, impurity amorphous semiconductor films 6 and 6, forming source and drain contact regions, a source electrode 8, and a drain electrode 9 are formed on an insulating substrate 1. TFT with stacked configuration
And a TFT formed on the gate insulating film 4 extending from the TFT.
And a pixel electrode 7 made of a transparent conductive material bonded to the source electrode 8 of FIG. 1 and an insulating film (gate insulating film 4 and amorphous semiconductor film 5) and an impurity amorphous semiconductor film 6 under the pixel electrode 7. One pixel unit is constituted by the auxiliary capacitance electrode 3 made of a transparent conductive material.

Since such a conventional thin film transistor array is provided with a capacitance element using the pixel electrode 7 and the auxiliary capacitance electrode 3 as capacitance electrodes, the holding characteristic of the image signal during the OFF period of the TFT is improved, and the display quality is improved. A high display device can be realized.

On the other hand, a capacitor for improving the image signal retention characteristics during the off-period of the TFT is a capacitor having an adjacent gate line and an electrode extending from the pixel electrode over the adjacent gate line via an insulating film as a capacitor electrode. Exists. JP-A-1-102525 discloses a dielectric material for such a capacitor.
As disclosed in Japanese Unexamined Patent Application Publication No. 2000-163, it has been proposed to use a double layer of tantalum oxide and silicon nitride as a constituent element.

In a capacitor using a double dielectric material as disclosed in JP-A-1-102525, even if the relative dielectric constant of tantalum oxide is high (22), the value of silicon nitride is low (6.
4), the value of the effective relative permittivity was about 10, and the improvement of the permittivity could not be expected so much. However, since the pixel electrode itself was not used as the capacitor electrode as described above, the effective Since it is not necessary to make the area extremely small, it is possible to supplement the capacitance value by setting the overlapping area between the adjacent gate wiring and the electrode extending from the pixel electrode on the adjacent gate wiring via the insulating film to be sufficiently large. it can.

However, when the auxiliary capacitance electrode 3 of the capacitance element as shown in FIG. 3 is formed of the same opaque metal material as the gate electrode 2 to simplify the manufacturing process, the auxiliary capacitance electrode is not designed to be as narrow as possible. Therefore, a transmissive display device such as a liquid crystal display device cannot be realized, so that a capacitance element having a higher capacitance value than before is required.

(C) Problems to be Solved by the Invention The present invention has been made in view of the above-mentioned points, and incorporates a high-capacitance capacitive element so that even a capacitive element having a small effective area can display an image during a TFT off period. An object of the present invention is to provide a thin film transistor array of an active matrix type display device having high signal holding characteristics and a method of manufacturing the same.

(D) Means for Solving the Problems A thin film transistor array of an active matrix display device according to the present invention includes a thin film transistor including a gate electrode, a gate insulating film, a semiconductor film, a source electrode, and a drain electrode on an insulating substrate; A pixel electrode coupled to the electrode; and an auxiliary capacitance electrode stacked on the pixel electrode via a capacitance insulating film, wherein the auxiliary capacitance electrode is formed of a metal film that can be subjected to a surface oxidation treatment. Is coated with a metal oxide film by oxidation treatment, the gate insulating film covers the surface of the substrate except the upper surface of the auxiliary capacitance electrode, the pixel electrode is formed on the gate insulating film, The gist is that the capacitance insulating film between the auxiliary capacitance electrode and the pixel electrode is formed only of the metal oxide film.

The method of manufacturing a thin film transistor array according to the present invention is also directed to a method of manufacturing a thin film transistor array, comprising: forming a gate electrode made of a first metal film and a gate wiring connected thereto on an insulating substrate; A pattern forming step, a first metal surface oxidation treatment for forming a metal oxide film covering the electrode by oxidizing at least a surface of the auxiliary capacitance electrode except for a terminal portion of the gate wiring in the first metal film; An insulating film forming step of forming a gate insulating film on the entire surface of the substrate after the oxidation step; a semiconductor film pattern forming step of forming a semiconductor film of a predetermined pattern on the gate insulating film at the position of the gate electrode; An insulating film removing step of removing the gate insulating film on the gate wiring terminal portion not covered with the metal oxide film and the upper surface of the auxiliary capacitance electrode covered with the metal oxide film A second metal pattern for forming a source electrode and a drain electrode made of a second metal on the semiconductor film and simultaneously forming a gate wiring terminal made of the second metal on the gate wiring terminal exposed from the gate insulating film; Forming step, before the second metal pattern forming step,
Or, thereafter, a transparent conductive film in which a pixel electrode made of a transparent conductive film provided to be coupled to the source electrode is formed on at least the above-mentioned gate electrode and an auxiliary capacitance electrode having a metal oxide film coating exposed from the gate insulating film. The gist is that a pattern forming step is provided.

(E) Function According to the thin film transistor array of the active matrix display device of the present invention, while using the pixel electrode itself as one of the capacitor electrodes, only a metal oxide film having a high dielectric constant is used as a dielectric material thereof. Therefore, the area occupied by the auxiliary capacitance electrode, which is the other capacitance electrode, can be reduced, and a reduction in effective light transmittance due to the presence of the auxiliary capacitance electrode at the pixel electrode position can be suppressed.

Further, according to the method of manufacturing a thin film transistor array of the active matrix display device of the present invention, the dielectric material layer of the capacitive element can be formed only by oxidizing the surface of the auxiliary capacitive electrode made of a metal material formed simultaneously with the gate of the TFT. TFT that can be formed and formed on this dielectric material layer during the process
The gate insulating film can be removed at the same time in the insulating film removing step for exposing the terminal portion of the gate wiring from the gate insulating film, so that the capacitor can be obtained only by adding the oxidation treatment step.

(F) Embodiment FIG. 1 shows a plan view of a pixel unit of a thin film transistor array of an active matrix display device of the present invention.
FIG. 2A is a cross-sectional view taken along the line II-II of FIG. 1, and FIG. 2B is a cross-sectional view of a gate wiring terminal structure at the end of the array substrate.

The structure of these figures will be described below according to the manufacturing process.

Formation of Gate Electrode 2 and Storage Capacitance Electrode 3 The first metal film (tantalum) is an insulating substrate 1 made of glass.
A first metal film pattern forming step of forming a film thereon and patterning the same, and a TFT gate electrode 2 and a gate wiring 2 'connected thereto, and an auxiliary capacitor electrode 3 forming one electrode of the capacitor and connected thereto The auxiliary capacitance line 3 'is formed at the same time.

Gate electrode surface oxide film 21 and auxiliary capacitance electrode surface oxide film
Formation of 31 A gate electrode surface made of tantalum oxide having a film thickness of about 2000 mm by a first metal surface oxidation treatment step of anodizing the surface of the first metal film except for the terminal portion of the gate wiring 2 '. An oxide film 21 and an auxiliary capacitance electrode surface oxide film 31 forming a dielectric material layer of the capacitor are formed. Incidentally, the avoidance of the oxidation treatment of the terminal portion P of the gate wiring 2 'in FIG.
This becomes possible by applying a mask such as a resist in advance to this portion.

Formation of Gate Insulating Film Deposition 4 A gate insulating film 4 for TFT is formed on the entire surface of the substrate by a silicon nitride insulating film forming step by a plasma CVD method.

Formation of amorphous semiconductor film 5 An amorphous silicon film is formed by a plasma CVD method in succession to the insulating film formation step, and an N-type impurity such as phosphorus is also introduced by a plasma CVD method. The formed N-type impurity amorphous silicon film is formed. The amorphous semiconductor film for TFT 5 and the impurity amorphous semiconductor film 6 are formed on the gate insulating film 4 at the position of the gate electrode 2 of the TFT by the semiconductor pattern forming step of patterning the two amorphous silicon films laminated in this manner. (This impurity amorphous semiconductor film 6 is separated into source and drain contact regions as shown in the drawing in a later step) to form a laminated structure.

Partial removal of gate insulating film 4 By the insulating film removing step of patterning the gate insulating film 4 made of silicon nitride, the terminal portion P of the gate wiring 2 'in FIG.
The terminal portion P is exposed by removing the upper gate insulating film 4 and, at the same time, the surface oxide film 31 of the auxiliary capacitance electrode of tantalum oxide is formed.
Then, the gate insulating film 4 on the tantalum auxiliary capacitance electrode 3 covered with is removed to expose the auxiliary capacitance electrode surface oxide film 31 over the region C shown by hatching in FIG.

Formation of Pixel Electrode 7 A transparent conductive material film such as ITO is formed, and the transparent pixel electrode is formed by a transparent conductive film forming process for patterning the transparent conductive material film. The auxiliary capacitor exposed from the gate insulating film 4 and the insulating film 4 is formed. It is formed on the electrode surface oxide film 31. As a result, the first electrode existing on the auxiliary capacitance electrode surface oxide film 31 is removed.
The area of the pixel electrode 7 corresponding to the area C in the figure becomes the other capacitance electrode.

Formation of Source Electrode 8 and Drain Electrode 9 A second metal pattern (aluminum) is deposited on the entire surface, and a source electrode and a drain are formed on the impurity amorphous semiconductor film 6 for TFT by a second metal pattern forming step of patterning the second metal film (aluminum). Simultaneously with the formation of the electrode, the second electrode is formed on the gate wiring terminal portion P shown in FIG.
The gate wiring terminal 10 made of metal is formed.

Separation of impurity amorphous semiconductor films 6 and 6 The impurity amorphous semiconductor film 6 patterned together with the amorphous semiconductor film 5 in the semiconductor film pattern forming step is removed by etching using the source electrode 8 and the drain electrode 9 as masks. Separated impurity amorphous semiconductor films 6 and 6 serving as source and drain contact regions for the amorphous semiconductor film 5 under the electrodes are obtained.

In the above description of the process order, the source electrode 8 and the drain electrode 9 are formed after the pixel electrode 7 is formed. However, the process order may be reversed, and as a result, a part of the source electrode 8 and the pixel electrode 7 may be formed. It suffices if some of them can be overlapped and electrically connected. Further, in this embodiment, the impurity amorphous semiconductor films 6 and 6 are provided merely for achieving the ohmic contact, but this is not always necessary.

The capacitor in the region C shown in FIG. 1 obtained as described above has an auxiliary capacitance electrode 3 made of opaque tantalum metal in the pixel region of the pixel electrode 8. 8 is used as each electrode, and the dielectric material of the capacitive element is composed of only one layer of the auxiliary capacitive electrode surface oxide film 31 made of tantalum oxide having a high dielectric constant (relative dielectric constant: 22). Since the area can be greatly increased, the area can be designed to be very small, thereby suppressing a decrease in the effective light transmittance in the pixel area. For example, the capacitance element of the present embodiment has a relative dielectric constant of 22 as compared with the capacitance element disclosed in JP-A-1-102525 (relative dielectric constant of a two-layer structure of a tantalum oxide film and a silicon nitride film: 10). Since only the tantalum oxide film is made of a dielectric material, the thickness of the dielectric constant is halved, and the relative dielectric constant is doubled, so that the capacitance value is four times or more, and as a result, the area of the area is 1/4 or less. The capacitance element can exhibit the same image signal holding ability as the conventional element.

The TFT obtained as described above has a gate electrode 2
The gate electrode surface oxide film 21 and the gate insulating film 4 are provided with a two-layer insulating film thereon.
Is not always necessary. However, when there is a possibility that a distortion such as a crack may occur in the gate insulating film 4 made of silicon nitride, the reliability of the TFT is improved by interposing the gate electrode surface oxide film 21 made of tantalum oxide having a stable film quality. Improvement can be expected. However, the gate insulating film 4 made of silicon nitride is necessary for stabilizing the film quality of the amorphous silicon specific crystal semiconductor film 5 continuously formed thereon by the plasma CVD method. In other words, if an amorphous silicon film is directly formed on a tantalum oxide film, the amorphous structure at the junction surface of the amorphous silicon film and the tantalum oxide film will be distorted, and the electron mobility will be modulated, thereby deteriorating the TFT characteristics. Therefore, it is preferable to provide the gate insulating film 4.

Furthermore, in the above embodiment, tantalum was used as the first metal. However, in the manufacturing method of the present invention, a metal that can be subjected to surface oxidation treatment, for example, aluminum can be used without being limited to this. In this case, the gate electrode 2 and the auxiliary capacitance electrode 3 can be made of aluminum, and the gate electrode surface oxide film 21 and the auxiliary capacitance electrode surface oxide film can be made of alumina obtained by anodizing aluminum. The relative dielectric constant of alumina is about 8.6, but depending on the anodizing voltage control, 100 to 500.
Since a thin film can be formed, a capacitor having a high capacitance value can be obtained.

(G) Effects of the Invention According to the present invention, a thin film transistor array of an active matrix type display device in which a capacitance element having an extremely small occupied area can be formed in a pixel region can be realized, and a load on a manufacturing process for that purpose increases. May be less.

[Brief description of the drawings]

FIG. 1 is a plan view of a pixel unit of a thin film transistor array of an active matrix display device of the present invention, FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1, and FIG. is there. DESCRIPTION OF SYMBOLS 1 ... Insulating substrate, 2 ... Gate electrode, 3 ... Storage capacitance electrode, 4 ... Gate insulating film, 5 ... Amorphous semiconductor film, 7 ...
... Pixel electrode, 8 ... Source electrode, 9 ... Drain electrode,
10 ... gate terminal, 21 ... gate electrode surface oxide film, 31 ...
... Auxiliary capacitance electrode surface oxide film.

Claims (2)

(57) [Claims] A thin film transistor including a gate electrode, a gate insulating film, a semiconductor film, a source electrode and a drain electrode, a pixel electrode coupled to the source electrode, and a capacitor insulating film interposed between the pixel electrode and the pixel electrode. A storage capacitor electrode to be laminated, wherein the storage capacitor electrode is formed of a metal film that can be subjected to a surface oxidation process, and the metal surface is covered with a metal oxide film formed by an oxidation process; Covers the surface of the substrate except for the upper surface of the auxiliary capacitance electrode, a part of the pixel electrode is formed on the gate insulating film, and the capacitance insulating film between the auxiliary capacitance electrode and the pixel electrode Formed of only the metal oxide film described above. 2. A first metal film pattern forming step of simultaneously forming a gate electrode made of a first metal film and a gate wiring connected thereto, and an auxiliary capacitance electrode and an auxiliary capacitance wiring connected thereto on an insulating substrate. A first metal surface oxidation step of oxidizing at least the surface of the auxiliary capacitance electrode to form a metal oxide film covering the electrode, excluding the terminal portion of the gate wiring in the metal film; An insulating film forming step of forming a gate insulating film on the entire surface of the substrate; a semiconductor film pattern forming step of forming a semiconductor film having a predetermined pattern on the gate insulating film at the position of the gate electrode; No gate wiring terminal,
An insulating film removing step of removing the gate insulating film on the upper surface of the auxiliary capacitance electrode covered with the metal oxide film; forming a source electrode and a drain electrode made of a second metal on the semiconductor film; A second metal pattern forming step of forming a gate wiring terminal made of the second metal on the gate wiring terminal exposed from the film, before or after the second metal pattern forming step, to be coupled to a source electrode; A transparent conductive film pattern forming step of forming a pixel electrode made of a transparent conductive film to be provided on at least the gate electrode and an auxiliary capacitor electrode having a metal oxide film coating exposed from the gate insulating film. Of manufacturing a thin film transistor array.