JPH02237054A - Compound type circuit device - Google Patents

Compound type circuit device

Info

Publication number
JPH02237054A
JPH02237054A JP1231399A JP23139989A JPH02237054A JP H02237054 A JPH02237054 A JP H02237054A JP 1231399 A JP1231399 A JP 1231399A JP 23139989 A JP23139989 A JP 23139989A JP H02237054 A JPH02237054 A JP H02237054A
Authority
JP
Japan
Prior art keywords
glass
substrate
ceramic substrate
oxide
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1231399A
Other languages
Japanese (ja)
Other versions
JP2952303B2 (en
Inventor
Kazuo Sunahara
一夫 砂原
Kazunari Watanabe
一成 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AGC Inc
Original Assignee
Asahi Glass Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Glass Co Ltd filed Critical Asahi Glass Co Ltd
Priority to JP1231399A priority Critical patent/JP2952303B2/en
Priority to US07/436,738 priority patent/US5057376A/en
Publication of JPH02237054A publication Critical patent/JPH02237054A/en
Priority to US07/717,275 priority patent/US5304518A/en
Application granted granted Critical
Publication of JP2952303B2 publication Critical patent/JP2952303B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15Ceramic or glass substrates
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    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C10/00Devitrified glass ceramics, i.e. glass ceramics having a crystalline phase dispersed in a glassy phase and constituting at least 50% by weight of the total composition
    • C03C10/0054Devitrified glass ceramics, i.e. glass ceramics having a crystalline phase dispersed in a glassy phase and constituting at least 50% by weight of the total composition containing PbO, SnO2, B2O3
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    • C04B37/00Joining burned ceramic articles with other burned ceramic articles or other articles by heating
    • C04B37/04Joining burned ceramic articles with other burned ceramic articles or other articles by heating with articles made from glass
    • C04B37/047Joining burned ceramic articles with other burned ceramic articles or other articles by heating with articles made from glass by means of an interlayer consisting of an organic adhesive, e.g. phenol resin or pitch
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract

PURPOSE:To obtain a highly reliable compound type circuit device, in which a crack and the like are little generated, by a method wherein a glass ceramics substrate having a thermal expansion coefficient almost identical with that of an aluminum nitride substrate and the aluminum nitride substrate are jointed with each other. CONSTITUTION:As a AIN substrate 1, one having a thermal conductivity of 100w/mK or more is desirable for the heat dissipation of an IC bare chip 11 which is mounted on the substrate 1. As glass ceramics substrates 2 and 3, one having, for example, a thermal expansion coefficient of 43 to 63X10<-7> deg.C<-1>, a dielectric constant less than 9.0 and the characteristics of Au, Ag, Ag-Pd, Cu and Au-Pt conductors to be used is desirable as there is a need to form a circuit pattern. Moreover, if the substrates 2 and 3 is one having a thermal expansion coefficient almost identical with that of the substrate 1, the materials for the substrates 2 and 3 can be used without being specially limited. Thereby, the title device is superior in heat dissipation property, has a high reliability and moreover, a stress is hardly generated in a junction part in the device and a defect, such as a peeling and the like, is not generated in the junction part.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は複合型回路装置に関するものである。[Detailed description of the invention] [Industrial application field] The present invention relates to a composite circuit device.

[従来の技術] 従来複合型回路装置としては窒化アルミニウム( AI
N )基板とアルミナ( At■0,)基板の間に接着
のための金属層と緩衝のための金属層を設けたものが特
開昭63−18687号公報によって報告されているが
、本質的に熱膨脹係数の異なるAIN基板とA1*Os
基板を、接合していろため、加速信頼性試験、例えば、
+125℃〜−50℃、一周期30分l000サイクル
を実施した場合、接合部に、剥離.クラック等の欠陥が
発生し、気密性が低下するという欠点を有していた。
[Conventional technology] Conventionally, aluminum nitride (AI
A method in which a metal layer for adhesion and a metal layer for buffering are provided between the N) substrate and the alumina (At■0,) substrate has been reported in Japanese Patent Application Laid-open No. 18687/1983, but the essential point is AIN substrate with different coefficient of thermal expansion and A1*Os
For bonding substrates, accelerated reliability testing, e.g.
When 1000 cycles were performed at +125°C to -50°C for 30 minutes, there was no peeling at the joint. This has the disadvantage that defects such as cracks occur and the airtightness deteriorates.

[発明の解決しようとする課題] 本発明の目的は、従来技術が有していた前述の欠点を解
消しようとするものであり、従来知られていなかった複
合型回路装置を新規に提供することを目的とするもので
ある。
[Problems to be Solved by the Invention] The purpose of the present invention is to eliminate the above-mentioned drawbacks of the prior art, and to provide a novel composite circuit device that has not been known in the past. The purpose is to

[課題を解決するための手段1 本発明は、前述の問題を解決すべくなされたものであり
、熱膨脹が窒化アルミニウム基板とほぼ同じガラスセラ
ミックス基板と窒化アルミニウム基板とが接合されてい
る構造を有することを特徴とする複合型回路装置等を提
供するものである。
[Means for Solving the Problems 1] The present invention has been made to solve the above-mentioned problems, and has a structure in which a glass ceramic substrate and an aluminum nitride substrate are bonded to each other, the thermal expansion of which is almost the same as that of the aluminum nitride substrate. The present invention provides a composite circuit device etc. characterized by the following.

以下本発明を詳細に説明する。本発明は、AIN基板に
熱膨脹率がほぼ同一のガラスセラミックス基板を接合さ
せて、クラック等の発生することが少ない信頼性の高い
複合型回路装置をつくることを目的とする。尚ガラスセ
ラミックス基板とはガラスとセラミッスクフィラーから
なるものをいう。第1図に本発明の複合型回路装置の代
表的一例の断面図を示す。第1図において1はAIN基
板、2.3はガラスセラミックス基板、4は金( Au
 )層、5はAIN基板1とガラスセラミックス基板2
の接合部、6はガラスセラミックス基板2の開口部、7
はガラスセラミックス基板2.3の側面、8はリードフ
レーム、9は上蓋とガラスセラミックス基板3の接合部
,10はガラスセラミックス基板3の開口部, 11は
ICのべアーチップ、12はワイヤー14はガラスセラ
ミックス製上蓋、である。
The present invention will be explained in detail below. An object of the present invention is to create a highly reliable composite circuit device in which cracks and the like are less likely to occur by bonding a glass ceramic substrate having substantially the same coefficient of thermal expansion to an AIN substrate. Note that the glass-ceramic substrate is made of glass and ceramic filler. FIG. 1 shows a sectional view of a typical example of the composite circuit device of the present invention. In Figure 1, 1 is an AIN substrate, 2.3 is a glass ceramic substrate, and 4 is gold (Au).
) layer, 5 is the AIN substrate 1 and the glass ceramic substrate 2
, 6 is the opening of the glass ceramic substrate 2, and 7
is the side surface of the glass-ceramic substrate 2.3, 8 is the lead frame, 9 is the joint between the top cover and the glass-ceramic substrate 3, 10 is the opening of the glass-ceramic substrate 3, 11 is the bare IC chip, 12 is the wire 14 is the glass The top lid is made of ceramics.

AIN基板lとしては、このAIN基板1上に搭載する
ICのべア−チップl1の熱放散のために、熱伝導率が
100w / m K以上のものが望ましい。かかるA
IN基板1としては例えば市販の旭硝子■製AGN−1
.AGN−2 (商標)等が使用できる. ガラスセラミックス基板2.3としては、回路パターン
を形成する必要があるため例えば、次の特性をもつもの
が望ましい. 熱膨脹係数 43〜63x 10−”C−’誘電率  
 9.0未満 使用導体  Au(金) . Ag(銀),Ag−Pd
(銀一パラジウム),Cu(銅). Au−Pt(金一
白金) ?にガラスセラミックス2.3はAIN基板1と熱膨脹
係数がほぼ同じものなら特に材質は限定されず使用でき
る。一例をあげると前記した旭硝子■製のAIN基板A
GN−1.AGN−2は熱膨脹係数がほぼ45X10−
”C−’なのでこれを使用する場合これらとほぼ同じ熱
膨脹率のガラスセラミックスとして以下の組成のものが
使用できる。%は特に記載しない限り重量%を意味する
The AIN substrate 1 preferably has a thermal conductivity of 100 w/mK or more in order to dissipate heat from the bare IC chip 11 mounted on the AIN substrate 1. Such A
As the IN board 1, for example, commercially available AGN-1 manufactured by Asahi Glass Co., Ltd.
.. AGN-2 (trademark) etc. can be used. Since it is necessary to form a circuit pattern on the glass-ceramic substrate 2.3, it is desirable that the glass-ceramic substrate 2.3 has the following characteristics, for example. Thermal expansion coefficient 43~63x 10-"C-' dielectric constant
Conductor used less than 9.0 Au (gold). Ag (silver), Ag-Pd
(silver-palladium), Cu (copper). Au-Pt (gold, platinum)? The glass ceramics 2.3 can be used without any particular material limitations as long as they have approximately the same coefficient of thermal expansion as the AIN substrate 1. To give an example, the above-mentioned AIN board A made by Asahi Glass ■
GN-1. AGN-2 has a coefficient of thermal expansion of approximately 45X10-
Since it is "C-", when this is used, the following compositions can be used as glass ceramics having almost the same coefficient of thermal expansion as these. Unless otherwise specified, % means % by weight.

SiO■ Alias MgO BaO CaO SrO B203 PbO ZnO TIOx+ZrO* LitO+ Na*O+ K*0 38〜48% 1〜 8% 0〜10% 18〜28% 1〜 8% 0〜15% 0.5〜15% O〜20% IQ〜20% 0〜 7% 0〜 5% ?ガラスフリット30〜70%と耐火物フイラー28〜
70%とCeOa等の酸化剤からなり、該耐火物フィラ
ーは アルミナ     20〜60% ジルコン      0〜40% コージェライト   0〜30% フオルステライト  0〜30% からなる。
SiO■ Alias MgO BaO CaO SrO B203 PbO ZnO TIOx+ZrO* LitO+ Na*O+ K*0 38-48% 1-8% 0-10% 18-28% 1-8% 0-15% 0.5-15% O ~20% IQ~20% 0~7% 0~5%? Glass frit 30~70% and refractory filler 28~
The refractory filler consists of 20-60% alumina, 0-40% zircon, 0-30% cordierite, and 0-30% forsterite.

また他の一例としては ガラスフリット  25〜65% Al!0.粉末    0〜60% 2MgO・SiO■粉末  5〜60%からなるガラス
セラミックス基板用組成物から製造され、上記ガラスフ
リットの組成はSiOi        40〜70%
Al.034〜15% Ba0315〜35% Ba0        0.5 〜15%からなるガラ
スセラミックス基板等が使用できる。
Another example is glass frit 25-65% Al! 0. It is manufactured from a glass-ceramics substrate composition consisting of powder 0-60% and 2MgO SiO powder 5-60%, and the composition of the glass frit is SiOi 40-70%.
Al. A glass ceramic substrate or the like consisting of 0.034% to 15% Ba0315% to 35% Ba00.5% to 15% can be used.

尚必要な場合は、有機バインダーの除去のためのCen
t等の酸化剤を上記組成に添加するものとする. 以上述べたガラスセラミックス基板は抗折強度2000
kg/cm”前後であるが、更により抗折強度の優れた
他のガラスセラミックス基板について例示する. アルミナ( AIJs )     50〜91%Si
Oz            5〜30%Pb0   
          3〜20%82os      
      O〜15%アルカリ土類金属酸化物 0.
5〜15%( MgO+CaO+SrO+BaO )T
i+Zr+Hf  の酸化物    0〜6%このガラ
スセラミックス基板の熱膨張係数は約42〜63X 1
0−’( ”C−’)であり、上記組成について順次説
明してい《. このガラスセラミックス基板は、アルミナを最も多く含
んでおり、アルミナの含有量はこのガラスセラミックス
基板の強度及び配線用等の導体との反応性に関係する。
If necessary, use Cen to remove organic binder.
An oxidizing agent such as t is added to the above composition. The glass ceramic substrate described above has a bending strength of 2000
kg/cm", but other glass-ceramic substrates with even better bending strength will be exemplified. Alumina (AIJs) 50-91% Si
Oz 5-30%Pb0
3~20%82os
O~15% alkaline earth metal oxide 0.
5-15% (MgO+CaO+SrO+BaO)T
i+Zr+Hf oxide 0-6% The coefficient of thermal expansion of this glass ceramic substrate is approximately 42-63X 1
0-'("C-')", and the above composition will be explained in order. related to reactivity with conductors.

アルミナが、50%未満の場合、このガラスセラミック
ス基板と表面導体との反応性が高まり、その結果、導体
の半田濡れ性を阻害するので好ましくなく、91%を越
えると誘電率が9.0を越えて高くなるので好ましくな
い。また、アルミナの含有量が多い方がこのガラスセラ
ミックス基板の抗折強度は太き《なる傾向にある。
If the alumina content is less than 50%, the reactivity between the glass-ceramic substrate and the surface conductor increases, which is undesirable because it impairs the solder wettability of the conductor, and if it exceeds 91%, the dielectric constant decreases to 9.0. This is not desirable as it will become more expensive. Furthermore, the greater the alumina content, the greater the bending strength of the glass ceramic substrate.

以上の点を鑑みるとアルミナの必要な範囲は50〜91
%である。また望ましい範囲は55〜80%であり、特
に望ましい範囲は60〜70%である。
Considering the above points, the necessary range of alumina is 50 to 91
%. Further, a desirable range is 55 to 80%, and a particularly desirable range is 60 to 70%.

SiOaは5%以下ではこのガラスセラミックス基板が
焼結しにくくなり、30%以上であると抗折強度が低下
するので、5〜30%が必要である。望ましい範囲は1
0〜20%であり、特に望ましい範囲は15〜19%で
ある。
If SiOa is less than 5%, it becomes difficult to sinter the glass ceramic substrate, and if it is more than 30%, the bending strength decreases, so 5 to 30% is required. The desirable range is 1
The range is 0 to 20%, and a particularly desirable range is 15 to 19%.

PbOは3%未満のときは、このガラスセラミックス基
板が焼結不良となるので好ましくな《、20%以上であ
るとこのガラスセラミックス基板の誘電率が大きくなる
ので好ましくな《、必要な範囲は3〜20%である。望
ましい範囲は10〜18%であり、特に望ましい範囲は
14〜17%である。
If PbO is less than 3%, the glass ceramic substrate will have poor sintering, which is undesirable. If it is 20% or more, the dielectric constant of the glass ceramic substrate will become large, which is undesirable. The required range is 3. ~20%. A desirable range is 10-18%, and a particularly desirable range is 14-17%.

B20,はフラックス成分であり、15%より多いと耐
水性が低下するので好ましくなく、必要な範囲は0〜1
5%である。望ましい範囲は0,5〜5%であり、特に
望ましい範囲は1〜3%である。
B20 is a flux component, and if it exceeds 15%, the water resistance decreases, so it is not preferable, and the necessary range is 0 to 1.
It is 5%. A desirable range is 0.5-5%, particularly a desirable range is 1-3%.

アルカリ土類金属酸化物が0.5%より少ないと焼結不
良になり好まし《ない。15%より多いとこのガラスセ
ラミックス基板の誘電率が太き《なるため好ましくない
。望ましい範囲は 1〜5%であり、特に望ましい範囲
は1.5〜3%である。
If the alkaline earth metal oxide content is less than 0.5%, sintering will be poor, which is not preferable. If it exceeds 15%, the dielectric constant of the glass ceramic substrate becomes large, which is not preferable. A desirable range is 1 to 5%, and a particularly desirable range is 1.5 to 3%.

Ti+Zr+Hfの酸化物は、添加することにより熱膨
張率が少な《なるので好ましいが、6%を越えると誘電
率が悪《なり好ましくなく、望ましい範囲は3%以下で
ある。特に望ましい範囲は1%以下である。尚Ti+Z
r+Hfの酸化物はこの3つのうち、1つだけでもよ《
、他の酸化物を?まなくともよいものとする。
The addition of Ti+Zr+Hf oxides is preferable because the coefficient of thermal expansion decreases, but if it exceeds 6%, the dielectric constant deteriorates, which is not preferable, and the desirable range is 3% or less. A particularly desirable range is 1% or less. Sho Ti+Z
Only one of these three oxides of r+Hf is sufficient.
, other oxides? It is not necessary to do so.

以上により、このガラスセラミックス基板の組成の望ま
しい範囲は アルミナ( A1.03 )     55〜80%S
L0.            10〜20%Pb0 
           10〜18%B.0.    
       0. 5〜5%アルカリ土類金属酸化物
  1〜5% Ti+Zr+Hf          O 〜3%であ
り、特に望ましい範囲は アルミナ( Al■Ox )     60〜70%S
L0215〜19% Pb0            14〜17%BzOs
             1〜3%アルカリ土類金属
酸化物 1.5〜3%+Zr+HfO〜1% である。
From the above, the desirable range of the composition of this glass-ceramic substrate is alumina (A1.03) 55-80%S
L0. 10-20%Pb0
10-18%B. 0.
0. 5-5% alkaline earth metal oxide 1-5% Ti+Zr+HfO-3%, particularly desirable range is alumina (AlOx) 60-70%S
L0215~19% Pb0 14~17%BzOs
1-3% alkaline earth metal oxide 1.5-3%+Zr+HfO-1%.

なお、このガラスセラミックス基板組成物の一部は、結
晶質.非品質又はガラス質のいずれか1つの相又は、こ
れらの中の2つ以上の相が共存している場合でも本発明
の効果に変わりはない。
Note that a part of this glass-ceramic substrate composition is crystalline. Even if one non-quality or glassy phase or two or more of these phases coexist, the effects of the present invention remain unchanged.

以上例示したこのガラスセラミックス基板組成物につい
ては、その無機成分の総量に対して、ガラス溶解時に清
澄剤,溶融促進剤として硝酸塩.亜ヒ酸,酸化アンチモ
ン,硫酸塩,フッ化物,塩化物等を0〜5%添加しても
よい。
Regarding this glass-ceramic substrate composition exemplified above, nitrate is added as a refining agent and a melt accelerator during glass melting, relative to the total amount of inorganic components. Arsenous acid, antimony oxide, sulfate, fluoride, chloride, etc. may be added in an amount of 0 to 5%.

また、着色剤(例えば耐熱性無機顔料,金属酸化物)を
0〜5%添加してもよい。
Further, 0 to 5% of a coloring agent (for example, a heat-resistant inorganic pigment, a metal oxide) may be added.

さらには、導体材料として、Cu ,W ,Mo−Mn
,Ni等の空気中で酸化される金属を用いる場合には、
窒素等の不活性雰囲気又は窒素一水素雰囲気中で、焼成
する必要が有り,その場合、該ガラスセラミックス基板
中の脱バインダーを促進するため、該ガラスセラミック
ス基板組成物中に、酸化剤として、Cr20s,VJs
 .CeOz ,CoO ,SnOzを該ガラスセラミ
ックス基板組成物の無機成分の総量に対し、単独又は混
合で0−10%添加するのが好ましい。
Furthermore, as conductor materials, Cu, W, Mo-Mn
, When using metals that are oxidized in air such as Ni,
It is necessary to perform firing in an inert atmosphere such as nitrogen or a nitrogen-hydrogen atmosphere, and in that case, in order to promote debinding in the glass-ceramic substrate, Cr20s is added as an oxidizing agent to the glass-ceramic substrate composition. ,VJs
.. It is preferable to add CeOz, CoO, and SnOz in an amount of 0 to 10%, either singly or as a mixture, based on the total amount of inorganic components of the glass-ceramic substrate composition.

しかしながら、添加量が10%を越えると、該?ラスセ
ラミックス基板の絶縁抵抗値が低下するので好ましくな
く、0.05%未満の場合には、脱バインダーが促進し
に《くなる。
However, if the amount added exceeds 10%, will it become applicable? This is not preferable because it lowers the insulation resistance value of the glass ceramic substrate, and if it is less than 0.05%, binder removal will be difficult to promote.

上記本発明にかかる酸化剤の添加の特に望ましい範囲は
0.5〜5%であり、特に望ましい範囲は1〜3%であ
る。更に上記5種の酸化剤のうち、Cr*Os,CoO
が望ましく、CrxOsが特に望ましい。このように上
記酸化剤を添加して焼成されたセラミックス基板は、無
機成分が酸化物換算で実質的にアルミナ50〜91%,
 SL0■5〜30%,Pb0 3〜20%, BgO
s O〜15%,アルカリ土類金属酸化物0、5〜15
%,Ti+Zr+Hfの酸化物O〜6%と、上記無機成
分の総量に対して実質的に酸化クロムをCraOt換算
で、酸化バナジウムをV2O5換算で、酸化セリウムを
CeO.換算で、酸化コバルトをCoO換算で、酸化錫
をSnOz換算で、酸化クロム+酸化バナジウム+酸化
セリウム+酸化コバルト+酸化錫O〜10%から構成さ
れたものとなる。
A particularly desirable range of addition of the oxidizing agent according to the present invention is 0.5 to 5%, and a particularly desirable range is 1 to 3%. Furthermore, among the above five oxidizing agents, Cr*Os, CoO
is preferred, and CrxOs is particularly preferred. The ceramic substrate fired with the above-mentioned oxidizing agent has an inorganic component of substantially 50 to 91% alumina in terms of oxides.
SL0■5~30%, Pb0 3~20%, BgO
s O ~ 15%, alkaline earth metal oxides 0, 5 ~ 15
%, oxides of Ti+Zr+Hf O~6% and the total amount of the above inorganic components, substantially including chromium oxide in terms of CraOt, vanadium oxide in terms of V2O5, and cerium oxide in terms of CeO. In terms of conversion, cobalt oxide is converted to CoO, and tin oxide is converted to SnOz, which is composed of chromium oxide + vanadium oxide + cerium oxide + cobalt oxide + tin oxide O ~ 10%.

上記これらのガラスセラミックス基板は、例えば、次の
ようにして製造される。
These glass ceramic substrates described above are manufactured, for example, as follows.

これらのガラスセラミックス基板組成物に有機バインダ
ー.可塑剤.溶剤を添加し混練してスラリーを作成する
。この有機バインダーとしては、ブチラール樹脂,アク
リル樹脂、可塑剤としてはフタル酸ジブチル,フタル酸
ジオクチル.フタル酸ブチルーベンジル、溶剤としては
、トルエン,アルコール等いずれも常用されているもの
が使用できる。
An organic binder is added to these glass-ceramic substrate compositions. Plasticizer. Add a solvent and knead to create a slurry. Examples of the organic binder include butyral resin and acrylic resin, and examples of the plasticizer include dibutyl phthalate and dioctyl phthalate. As the butylbenzyl phthalate and the solvent, commonly used ones such as toluene and alcohol can be used.

次いでこのスラリーをシートに成形し、乾燥することに
より未焼結のシート、いわゆるグリーンシ一トが作成さ
れる。次いで、このグリーンシ一トにビアホール用等の
穴を開け、片面にCu ,Ag ,Ag−Pd ,Au
 ,Au−Pt .Ni ,W , Mo−Mn,Mo
等のペーストを所定の回路に厚膜印刷する。この時、ビ
アホールにはCu .Ag .Ag−Pd ,Au, 
Au−Pt, Ni, W, No−Mn, Mo等の
ペーストが満たされる。次に、これらの印刷グリーンシ
一トを所定の枚数重ね合わせ、熱圧着により積層化し、
焼成して、多層ガラスセラミックス基板となる。
Next, this slurry is formed into a sheet and dried to create an unsintered sheet, a so-called green sheet. Next, holes for via holes etc. are made in this green sheet, and one side is coated with Cu, Ag, Ag-Pd, Au.
, Au-Pt. Ni, W, Mo-Mn, Mo
A paste such as the above is printed in a thick film onto a predetermined circuit. At this time, Cu. Ag. Ag-Pd, Au,
Filled with pastes such as Au-Pt, Ni, W, No-Mn, Mo, etc. Next, a predetermined number of these printed green sheets are stacked together and laminated by thermocompression bonding.
After firing, it becomes a multilayer glass-ceramic substrate.

尚焼成条件としては、Ag−Pd ,Au ,Au−P
t導体を用いる場合には、空気中で600〜1050℃
で焼成を行ない、Cu ,Ni ,W ,Mo−Mnを
用いる場合には、窒素等の不活性雰囲気又は窒素一水素
雰囲気中,600〜1400℃の温度で、焼成を行なう
The firing conditions include Ag-Pd, Au, Au-P
When using a t-conductor, the temperature is 600 to 1050℃ in air.
When using Cu, Ni, W, or Mo-Mn, the firing is performed at a temperature of 600 to 1400° C. in an inert atmosphere such as nitrogen or a nitrogen-hydrogen atmosphere.

以上の如く製造された多層ガラスセラミックス基板は回
路が絶縁基板を介して多層に積層されたものとなる。
The multilayer glass ceramic substrate manufactured as described above has circuits laminated in multiple layers with an insulating substrate interposed therebetween.

以上の製造についての説明は多層ガラスセラミックス基
板について行なったが、上記のような積層化を行なわな
ければ単層セラミックス基板の製造も、勿論可能であり
、このようにして得られた単層、多層ガラスセラミック
ス基板を上記複合型回路装置に使用する。
The above manufacturing explanation has been given for multilayer glass-ceramic substrates, but it is of course possible to manufacture single-layer ceramic substrates without the above-mentioned lamination. A glass ceramic substrate is used in the above composite circuit device.

上記したAIN基板1と上記例示の数種のガラスセラミ
ックス基板2とを複合化した場合、AIN基板lの熱膨
張係数をβ、ガラスセラミックス基板2の500℃以下
の熱膨張係数なaとすると、熱膨張係数差1α−β1≦
20X 10−’℃−1となり、AIN基板とAIto
,基板との熱膨張率差27〜32x 10−y℃1に比
較して非常に小さくなり望ましい。1α−β1≦10x
 1(1−y℃−1が更に信頼性の点でより望ましい。
When the above-mentioned AIN substrate 1 and the several types of glass-ceramic substrates 2 mentioned above are combined, if the thermal expansion coefficient of the AIN substrate l is β, and the thermal expansion coefficient of the glass-ceramic substrate 2 at 500° C. or less is a, then Thermal expansion coefficient difference 1α−β1≦
20X 10-'℃-1, AIN board and AIto
, the difference in thermal expansion coefficient with the substrate is 27 to 32 x 10 -y C, which is very small compared to 1, which is desirable. 1α−β1≦10x
1 (1-y°C-1 is more desirable in terms of reliability).

上記範囲の中で特に望ましい範囲は3 X 10−’℃
−1≦α−β≦6 X to−?℃− 1である。
Among the above ranges, a particularly desirable range is 3 x 10-'°C.
−1≦α−β≦6 X to−? ℃-1.

第4図にガラスセラミックス基板、AIN基板の熱膨張
率一温度特性を示す。第4図においてTgはガラスがガ
ラス化し始めるガラス転移点であり、 700〜100
0℃の範囲内であって、約100℃の幅を有する.また
T1はガラス軟化点である。第4図に示すようにガラス
は温度がT.を越えると熱膨張係数が、約3倍に増大す
る。ガラスがこのような複雑な特性を有するため、ガラ
スを含有したガラスセラミックス基板の熱膨張係数はT
g間あるいは、Tg前後で変動する。
FIG. 4 shows the thermal expansion coefficient versus temperature characteristics of the glass ceramic substrate and the AIN substrate. In Figure 4, Tg is the glass transition point at which glass begins to vitrify, and is 700 to 100.
It is within the range of 0°C and has a width of about 100°C. Further, T1 is the glass softening point. As shown in FIG. 4, the glass has a temperature of T. When the value exceeds 100%, the coefficient of thermal expansion increases by about 3 times. Because glass has such complex properties, the coefficient of thermal expansion of a glass-ceramic substrate containing glass is T.
It fluctuates between g or around Tg.

従って、上記α一βの特に望ましい範囲はこのような理
由によって特定される。第1図に示したAIN基板lと
ガラスセラミックス基板2を接合する場合、銀ローを使
用するにして,もガラス層を接合部5に使用するにして
も800〜l000℃程度の温度にしなければならず、
上記α−βの特に望ましい範囲は接合部5の内部応力を
小さくするのに有効である。
Therefore, the particularly desirable range of α and β is specified for this reason. When bonding the AIN substrate 1 and the glass-ceramic substrate 2 shown in Figure 1, whether you use silver solder or a glass layer for the joint 5, the temperature must be kept at about 800 to 1000°C. Not,
The particularly desirable range of α-β is effective in reducing the internal stress of the joint 5.

上記複合化により接合部5に、熱膨脹の差を緩和するた
めの特殊な金属層を形成する必要がなく、通常の接合方
法例えば、半田,銀ロー等による金属接合や、低融点ガ
ラスを用いたガラス接合接着剤等で充分な信頼性を得る
ことが出来る。接着剤による接合の場合は通常エボキシ
系、ポリイミド系等の接着剤が使用できる。
Due to the above-mentioned composite, there is no need to form a special metal layer in the joint part 5 to alleviate the difference in thermal expansion, and it is not necessary to form a special metal layer on the joint part 5 to alleviate the difference in thermal expansion. Sufficient reliability can be obtained using a glass bonding adhesive or the like. In the case of bonding with an adhesive, an epoxy adhesive, a polyimide adhesive, or the like can usually be used.

α一β1が、20X 10−’℃−1を越える場合には
、熱膨脹係数差によって発生する応力を緩和する必要が
あるために特別な構造を必要とするため好まし《ない。
If α-β1 exceeds 20×10° C.-1, it is not preferable because a special structure is required to relieve the stress caused by the difference in coefficient of thermal expansion.

本発明の複合型回路装置は,第1図に示すような開口部
6,10を有するガラスセラミックス基板2.3を用い
ることによりICチップの封止が容易になると共に生産
性の悪いAIN基板1の使用量が少な《なるという利点
を有する。
The composite circuit device of the present invention uses a glass-ceramic substrate 2.3 having openings 6 and 10 as shown in FIG. It has the advantage of requiring less amount of

開口部6,IOは、工筺所に限定されず、?I数個所有
する構造であっても良い。
The opening 6, IO is not limited to the factory. It may be a structure in which several Is are owned.

さらには、該ガラスセラミックス基板2.3の誘電率は
信号伝達速度の遅延を防止するため9.0未満であるこ
とが好ましい。
Furthermore, the dielectric constant of the glass ceramic substrate 2.3 is preferably less than 9.0 in order to prevent delay in signal transmission speed.

リードフレーム8は、コバール(簡標),42−アロイ
(商標)等が材質として通常使用される。
The lead frame 8 is usually made of Kovar (simplified standard), 42-alloy (trademark), or the like.

以上説明した第1図に示す複合型回路装置は以下のよう
に製作される。
The composite circuit device shown in FIG. 1 described above is manufactured as follows.

第2図は、第1図に示す複合型回路装置の製作手順を示
す各部品の断面図である。第2図において13はシール
用ガラス.15はリードフレーム8の上に形成された金
メッキ部である。
FIG. 2 is a sectional view of each component showing the manufacturing procedure of the composite circuit device shown in FIG. 1. In Figure 2, 13 is a sealing glass. 15 is a gold plated portion formed on the lead frame 8.

開口部6を有するガラスセラミックス基板2とAIN基
板1を準備し、ガラスセラミック基板2上の接合部5に
接合用の銀(Ag).銀一パラジウム (Pd),銅(
Cu)等の金属ペーストを印刷等により形成し、焼成す
る。次にAIN基板l上にベアーチップ11搭載用の金
層4用のAuべ−ストを印刷等により形成し、更に接合
用の上記の金属ペーストを印刷等により形成する。そし
て1000℃以下の温度で焼成し、上記した数種のガラ
スセラミックス基板2とAIN基板lの接合部5の少な
《とも一方に銀ロー等を印刷又は塗布等の方法により形
成し、加熱して、ガラスセラミックス基板2とAIN基
板lを接合する。尚この銀ローの替りに半田付けを行な
って接合してもよい。
A glass-ceramic substrate 2 having an opening 6 and an AIN substrate 1 are prepared, and a bonding portion 5 on the glass-ceramic substrate 2 is coated with silver (Ag) for bonding. Silver-palladium (Pd), copper (
A metal paste such as Cu) is formed by printing or the like and fired. Next, an Au base for the gold layer 4 for mounting the bare chip 11 is formed on the AIN substrate l by printing or the like, and the above metal paste for bonding is further formed by printing or the like. Then, it is fired at a temperature of 1000°C or less, and a silver solder or the like is formed by printing or coating on at least one of the joint parts 5 of the several types of glass-ceramic substrates 2 and the AIN substrate 1 described above, and heated. , the glass ceramic substrate 2 and the AIN substrate l are bonded. Note that soldering may be used instead of this silver soldering.

銀ロー,半田を使用した場合はガラスセラミックス基板
2上の導体とAIN基板l上の導体を電気的に接続でき
る利点がある。 このようにして接合されたAIN基板
1とガラスセラミックス基板2及び開口部10を有する
ガラスセラミックス基板3を製作し、該ガラスセラミッ
クス基板3の下面とガラスセラミックス基板2の上面の
少なくとも一方にシール用ガラスペーストを印刷等の手
段により形成し、リードフレーム8をガラスセラミック
ス基板2.3の間に挟んで加熱する。このようにしてガ
ラスセラミックス基板2.3をそれらの間に金メッキ部
l5を有したリードフレーム8を挟んで接合する。次に
リ一ドフレーム8を折り曲げ第1図に示すようにする。
When using silver solder or solder, there is an advantage that the conductor on the glass ceramic substrate 2 and the conductor on the AIN substrate l can be electrically connected. A glass-ceramic substrate 3 having an AIN substrate 1 and a glass-ceramic substrate 2 and an opening 10 bonded in this way is manufactured, and at least one of the lower surface of the glass-ceramic substrate 3 and the upper surface of the glass-ceramic substrate 2 is covered with a sealing glass. A paste is formed by means such as printing, and the lead frame 8 is sandwiched between the glass ceramic substrates 2.3 and heated. In this way, the glass-ceramic substrates 2.3 are bonded with the lead frame 8 having the gold-plated portion 15 sandwiched between them. Next, the lead frame 8 is bent as shown in FIG.

次に第1図に示すごと《開口部6の中にべアーチップ1
1を入れ、金H4上に搭載させて接合させ、シリコンと
金の共晶を生じさせて接合させ、金等のワイヤー12で
ボンディングを行なう。最後にシール用ガラスペースト
を上蓋l4とガラスセラミックス基板3の接合部9の少
なくとも一方に塗布、印刷等の方法で形成し、加熱して
接合する。
Next, as shown in FIG.
1, mounted on the gold H4 and bonded, a eutectic of silicon and gold is generated and bonded, and bonding is performed with a wire 12 of gold or the like. Finally, a sealing glass paste is applied to at least one of the joint portions 9 of the upper lid l4 and the glass ceramic substrate 3 by a method such as coating or printing, and the paste is heated and joined.

また、ガラスセラミックス基板2と AIN基板lとの
別の接合方法について説明する。ガラスフリットに有機
ビヒクルを加えて混練し、べ一スト状としたものが接合
部5になるように塗布し、ガラスセラミックス基板2と
AIN基板lとを圧着して焼成し、固化させればよい。
Also, another method of bonding the glass ceramic substrate 2 and the AIN substrate 1 will be explained. An organic vehicle is added to the glass frit and kneaded to form a paste, which is then applied to form the joint portion 5, and the glass ceramic substrate 2 and the AIN substrate 1 are pressed together and fired and solidified. .

ペーストを塗布する部分としては、ガラスセラミックス
基板2又はAIN基板1のどちらがであればよい・が、
ガラスセラミックス基板2と AIN基板1の両方に塗
布してもよい. かかる接合部5のガラス層としては、このガラス層の熱
膨脹係数であるγが、Iβ一γ≦30X 1G−’℃−
1であることが必要とされる。
The part to which the paste is applied can be either the glass-ceramic substrate 2 or the AIN substrate 1.
It may be applied to both the glass ceramic substrate 2 and the AIN substrate 1. As for the glass layer of the joint portion 5, the coefficient of thermal expansion γ of this glass layer is Iβ−γ≦30X 1G−′℃−
1 is required.

β一γ1が30X to−’℃1を越えると、該ガラス
層と、ガラスセラミックス基板2又はAIN基板lとの
熱膨脹係数差が太き《、接合部5の充分な信頼性が得ら
れない。望ましくは、1β一γ1≦20X 10−’℃
−1であり、更に望ましくは1β−γ1≦5 X 10
−’℃−1である。
If β-γ1 exceeds 30X to -'C1, the difference in coefficient of thermal expansion between the glass layer and the glass-ceramic substrate 2 or the AIN substrate 1 becomes large, and sufficient reliability of the joint 5 cannot be obtained. Preferably, 1β-γ1≦20X 10−′℃
-1, more preferably 1β-γ1≦5×10
-'℃-1.

さらに、かかるガラス層としては、ガラスフリットの他
にAlton, MgO,ムライト,フォルステライト
,ステアタイト,コージエライト,石英, AIN等の
セラミック粉末をフィラーとして添加したものであって
も上記の熱膨脹係数の条件を満足すれば使用できる。ま
た、ガラスフリットの組成については、特に限定されず
、BzOx−SiOt系, BaOs−Altos−S
iOa系, PbO−BaOz−Sift系, CaO
−B*Os−SiOx−AlaOs系, BaO−Bz
Oz−Sing−Alias系, ZnO−BzOi−
Sto2系等が挙げられる. さらに、有機ビヒクルとしては特に限定されず、エチル
セルロースやアクリル樹脂等の有機バインダーにアセト
ンやα−テルビネオール等の溶剤を加えたものを用いる
ことができる。
Further, even if such a glass layer contains ceramic powder such as Alton, MgO, mullite, forsterite, steatite, cordierite, quartz, AIN, etc. as a filler in addition to glass frit, the above thermal expansion coefficient conditions are met. It can be used if it satisfies the following. Further, the composition of the glass frit is not particularly limited, and may include BzOx-SiOt system, BaOs-Altos-S
iOa system, PbO-BaOz-Sift system, CaO
-B*Os-SiOx-AlaOs system, BaO-Bz
Oz-Sing-Alias system, ZnO-BzOi-
Examples include the Sto2 series. Further, the organic vehicle is not particularly limited, and may be a mixture of an organic binder such as ethyl cellulose or acrylic resin and a solvent such as acetone or α-terpineol.

また、別のタイプの複合型回路装置について断面図を第
3図に示し、説明する。
Further, a cross-sectional view of another type of composite circuit device is shown in FIG. 3 and will be described.

開口部を有する2枚のガラスセラミックス基板のグリー
ンシ一トにCuペースト.Agペースト,Ag−Pdペ
ースト、Auペースト等を所定の回路に印刷等により形
成した後、積層して加圧し圧着する.更にコバール製等
の外部端子ビンl6を接合するため、上記2枚のグリー
ンシ一トの側面7に上記Cuペースト等をサイド印刷等
により形成し、焼成した後、外部端子ビンl6を銀ロー
、半田等を使用し加熱して接合する。ワイヤー12は上
記したCuペースト等からできたガラスセラミックス基
板上の導体上に形成された金メッキ部17等上に接続す
る。他のAIN基板1とガラスセラミックス基板の接合
等については第1図に示した複合型回路装置と同じであ
る。
Cu paste was applied to the green sheets of two glass-ceramic substrates having openings. After forming Ag paste, Ag-Pd paste, Au paste, etc. into a predetermined circuit by printing or the like, they are laminated and pressed together. Furthermore, in order to join the external terminal bin l6 made of Kovar or the like, the above-mentioned Cu paste or the like is formed on the side surface 7 of the two green sheets by side printing or the like, and after firing, the external terminal bin l6 is bonded with silver solder, etc. Join by heating using solder or the like. The wire 12 is connected to a gold plated portion 17 formed on a conductor on a glass ceramic substrate made of the above-mentioned Cu paste or the like. The other connections between the AIN substrate 1 and the glass ceramic substrate are the same as in the composite circuit device shown in FIG.

このようにして製作した複合型回路装置は、?記外部端
子ビン16がガラスセラミック基板2.3の間に扶持さ
れていない構造となる。尚本発明の複合型回路装置は第
1図,第3図に示した構造に限定されず、ガラスセラミ
ックス基板2と AIN基板1とが接合されている構造
を有するものはすべて含まれるものとする。
What is the composite circuit device manufactured in this way? The external terminal pin 16 is not supported between the glass ceramic substrates 2.3. The composite circuit device of the present invention is not limited to the structure shown in FIGS. 1 and 3, but includes all devices having a structure in which a glass ceramic substrate 2 and an AIN substrate 1 are bonded. .

[実施例] (実施例1) A1aOs粉末50%, 2MgO・SiO■粉末5%
,ガラスフリット45%に可塑剤,溶剤を添加して混線
、成形して厚さ1.2mmのグリーンシ一トを作製した
[Example] (Example 1) A1aOs powder 50%, 2MgO・SiO■ powder 5%
A green sheet with a thickness of 1.2 mm was prepared by adding a plasticizer and a solvent to 45% glass frit, cross-wire and molding.

上記ガラスフリット組成は、 SiOi 45%, Aitos 10%, B.0.
 35%.Ba0 10% からなっていた。
The above glass frit composition is: SiOi 45%, Aitos 10%, B. 0.
35%. It consisted of 10% Ba0.

このグリーンシ一トを外寸30 mm角で中心部に20
 mm角の開口部を有する形状と、中心部に25 mm
角の開口部を有する形状に100枚ずつ打ち抜き、10
50℃,4時,間空気中で焼成し、第2図に示した様な
開口部6.10を有するガラスセラミックス基板を2種
得た. このガラスセラミックス基板の熱膨脹係数αは45X 
10−’℃−1であった。
This green sheet has an outer size of 30 mm square with a diameter of 20 mm in the center.
Shape with mm square opening and 25 mm in the center
Punch out 100 pieces each into a shape with corner openings, and
Two types of glass ceramic substrates having openings 6.10 as shown in FIG. 2 were obtained by firing in air at 50°C for 4 hours. The thermal expansion coefficient α of this glass ceramic substrate is 45X
It was 10-'C-1.

これとは別に、市販AIN基板(25x 25x 1.
Omm) (旭硝子■製AGN−2、熱伝導率200w
/mK、熱膨脹係数45X 10−’℃−1)に金ペー
ストと銀ペーストを印刷により形成し、900℃3時間
、空気中で焼成し、金層4と接合部5に銀層を形成した
。さらには、ガラスセラミックス基板にも同様の方法で
接合部5の部分に銀層を形成した。
Apart from this, commercially available AIN board (25x 25x 1.
Omm) (AGN-2 manufactured by Asahi Glass, thermal conductivity 200w
/mK, thermal expansion coefficient 45×10-'°C-1), gold paste and silver paste were formed by printing and fired at 900°C for 3 hours in air to form a silver layer on the gold layer 4 and the joint part 5. Furthermore, a silver layer was also formed on the glass ceramic substrate at the joint portion 5 using the same method.

これらのAIN基板とガラスセラミックス基板を市販の
銀ロー( Ag 72%, Cu Z8%)にて900
℃、10分間加熱することにより接合した.次に、該A
IN基板と接合されたガラスセラミックス基板の上面と
開口部を有するガラスセラミックス基板(第2図)の下
面にシール用ガラスペーストを印刷し、コバール製リー
ドフレームを間に挟んで、680℃で10分間加熱する
ことにより、ガラスセラミックス基板を接合した。
These AIN substrates and glass ceramic substrates were processed using commercially available silver solder (Ag 72%, Cu Z8%) at 900°C.
They were bonded by heating at ℃ for 10 minutes. Next, the A
A glass paste for sealing was printed on the upper surface of the glass ceramic substrate bonded to the IN substrate and the lower surface of the glass ceramic substrate having an opening (Fig. 2), and a Kovar lead frame was sandwiched between them, and the paste was heated at 680°C for 10 minutes. The glass ceramic substrates were bonded by heating.

次にコバール製リードフレームを折り曲げ、第1図に示
す複合型回路装置を得た。なお、用いたコバール製リー
ドフレーム先端は、金メッキが、あらかじめされている
ものであった。
Next, the Kovar lead frame was bent to obtain the composite circuit device shown in FIG. Note that the tip of the Kovar lead frame used was gold-plated in advance.

次に、第1図に示す如く、開口部内部にベアーチップを
430℃でグイボンドし、その後、金ワイヤーでボンデ
ィングを行なった。
Next, as shown in FIG. 1, a bare chip was bonded inside the opening at 430° C., and then bonding was performed with a gold wire.

そして、上蓋をシール用ガラスペーストを用いて、38
0℃で10分間加熱することにより接合し、第1図に示
したような複合型回路装置を得た. この複合型回路装置を構成するガラスセラミックス基板
の熱膨脹係数αとAIN基板の熱膨脹係数βの差は, 1α一βI = 45x 10−’− 45x 10−
’= 0℃−1で一致していた。
Then, use sealing glass paste to seal the top lid.
They were bonded by heating at 0°C for 10 minutes to obtain a composite circuit device as shown in Figure 1. The difference between the coefficient of thermal expansion α of the glass-ceramic substrate constituting this composite circuit device and the coefficient of thermal expansion β of the AIN substrate is 1α - βI = 45x 10-'- 45x 10-
' = 0°C-1.

この複合型回路装置100個を、+250℃〜−50℃
、ヒートサイクル試験、一周期30分l000サイクル
を行なったが、接合部の剥離,クラッ?等の欠陥の発生
は全くなく、気密性,信頼性共に満足するものであった
100 of these composite circuit devices were heated at +250°C to -50°C.
A heat cycle test was conducted for 1000 cycles for 30 minutes, but there was no peeling or cracking at the joints. There were no defects such as these, and both airtightness and reliability were satisfactory.

(実施例2) At2oz粉末10%, 2MgO・SiO■粉末50
%,ガラスフリット40%に可塑剤,溶剤を添加して、
混練し、成形して、厚さ 1.2mmのグリーンシ一ト
を作製した。上記ガラスフリット組成は、SiO■45
%, Al.0. 10%,8*0− 35%.Ban
 10% からなっていた。
(Example 2) At2oz powder 10%, 2MgO・SiO■ powder 50%
%, add plasticizer and solvent to 40% glass frit,
The mixture was kneaded and molded to produce a green sheet with a thickness of 1.2 mm. The above glass frit composition is SiO■45
%, Al. 0. 10%, 8*0-35%. Ban
It consisted of 10%.

こめグリーンシ一トと、旭硝子■製AIN基板AGN−
2を用いて、実施例lと同様にして第1図に示した如き
複合型回路装置を作製した。
Kome green sheet and Asahi Glass's AIN board AGN-
A composite circuit device as shown in FIG. 1 was fabricated using Example 2 in the same manner as in Example 1.

ガラスセラミックス基板の熱膨脹係数は測定の結果、6
2X 10−’℃−1であった。従って、ガラスセラミ
ックス基板と AIN基板との熱膨脹差1α−β1は 1α−βl = 62x 10−’ − 45x 10
−’= 17x 10−’℃−1であった。
The thermal expansion coefficient of the glass-ceramic substrate is 6 as a result of measurement.
2X 10-'C-1. Therefore, the thermal expansion difference 1α-β1 between the glass ceramic substrate and the AIN substrate is 1α-β1 = 62x 10-' - 45x 10
-' = 17x 10-'°C-1.

この複合型回路装置100個を+125℃〜−50℃の
ヒートサイクル試験一周期30分l000サイクルを実
施した結果、接合部の剥離,クラツク等の欠陥の発生は
全くなく、気密性,信頼性共に満足するものであった。
As a result of conducting a heat cycle test of 100 pieces of this composite circuit device at +125°C to -50°C for one period of 30 minutes, there were no defects such as peeling of joints or cracks, and both airtightness and reliability were confirmed. It was satisfying.

さらに、上記より温度差のある試験+250℃〜−50
℃のヒートサイクル試験を一周期30分l000サイク
ルを実施した結果、1000個中1個に微小なクラック
が見い出されたが、実用上問題は無いものであった。
Furthermore, tests with temperature differences from the above +250℃ to -50℃
As a result of conducting a heat cycle test at 1000 degrees Celsius for 30 minutes, one minute crack was found in one out of 1000 pieces, but there was no problem in practical use.

(実施例3) At−Os粉末38%.ガラスフリット57%, Ce
Oa粉末5%に可塑剤.溶剤を添加して混練し、成形し
て厚さ 1.2mmのグリーンシ一トを作製した。
(Example 3) At-Os powder 38%. Glass frit 57%, Ce
Plasticizer in 5% Oa powder. A solvent was added, kneaded, and molded to produce a green sheet with a thickness of 1.2 mm.

上記ガラスフリットの組成は SiOa 40%, A1aOs 7%, CaO 8
%, BaO 15%, Pb0 10%,BJs 1
0%, Zn0 10%のものを使用した. 上記グリーンシ一トを使用して、実施例lと同様の方法
で同一の形状の複合型回路装置を製作した。ただし接合
部5はAIN基板.ガラスセラミックス基板とも銅層を
形成した後、銀ロー( Ag 50%. Cu 25%
, Zn 25%)を用いて850℃で10分間加熱す
ることにより接合した。
The composition of the glass frit is 40% SiOa, 7% A1aOs, 8% CaO.
%, BaO 15%, Pb0 10%, BJs 1
0% and 10% Zn0 were used. Using the above green sheet, a composite circuit device having the same shape was manufactured in the same manner as in Example 1. However, the joint part 5 is an AIN board. After forming a copper layer on the glass ceramic substrate, silver wax (Ag 50%. Cu 25%)
, Zn 25%) and was bonded by heating at 850° C. for 10 minutes.

この複合型回路装置を構成するガラスセラミックス基板
の熱膨脹係数αとAIN基板の熱膨脹係数βの差は、 α一βI = 54X to”− 45X to”= 
 9X10−’℃−1 ?あった. この複合型回路装置100個を+250℃〜−50℃の
ヒートサイクル試験一周期30分l000サイクルを行
なったが、上記接合部の剥離,クラック等の欠陥は全く
発生せず、気密性,信頼性共に満足するものであった。
The difference between the coefficient of thermal expansion α of the glass-ceramic substrate and the coefficient of thermal expansion β of the AIN substrate constituting this composite circuit device is α - βI = 54X to" - 45X to" =
9X10-'℃-1? there were. A heat cycle test of 100 pieces of this composite circuit device at +250°C to -50°C was performed for 1000 cycles for 30 minutes, but no defects such as peeling or cracking of the joints occurred, and the airtightness and reliability were improved. It was something we were both satisfied with.

(実施例4) Altos粉末10%, 2MgO・Sin■粉末50
%.ガラスフリット40%に溶剤,分散剤,有機バイン
ダー,可塑剤を添加して混線,成形して厚さ1.2 n
mのグリーンシ一トを作製した。用いたガラスフリット
の組成は、 SL0. 45%. AlaOa 10%. B*Os
 35%.Ba0 10% から成っていた.このグリーンシートな外寸30 mm
角で、中心部に20 mm角の開口部を有する形状と、
中心部に251Ilm角の開口部を有する形状に打ち抜
き、各々積層,圧着した後、空気中にて1050℃,4
時間焼成して、第2図に示した様な、開口部6,10を
有する多層のガラスセラミックス基板を得た。このガラ
スセラミックス基板の熱膨脹係数は62X 10−’℃
一であった。
(Example 4) Altos powder 10%, 2MgO・Sin■ powder 50%
%. A solvent, a dispersant, an organic binder, and a plasticizer were added to 40% glass frit, mixed, and molded to a thickness of 1.2 nm.
A green sheet of m was prepared. The composition of the glass frit used was SL0. 45%. AlaOa 10%. B*Os
35%. It consisted of 10% Ba0. This green sheet has an external dimension of 30 mm.
A corner shape with a 20 mm square opening in the center;
After punching into a shape with a 251 lm square opening in the center, laminating and crimping each, the
After firing for a period of time, a multilayer glass ceramic substrate having openings 6 and 10 as shown in FIG. 2 was obtained. The thermal expansion coefficient of this glass ceramic substrate is 62X 10-'℃
It was one.

これとは別に市販AIN基板(旭硝子■製AGN−2,
外寸: 25X 25X l.otmm,熱伝導率20
0w / m K ,熱膨脹係数45X 10−’℃−
1》に金層を形成した. 次いで、ガラスフリットに有機ビヒクルを加えて、自動
乳鉢で混練し、さらに三本ロールを通してガラスペース
トを作製した。ここで、ガラスフリットは、上記ガラス
セラミックス基板を作製するときに用いたものと全《同
じものであった。また有機ビヒクルの組成は、エチルセ
ルロース=5%,α−テルビネオール=95%から成っ
ていた。そして、このガラスペーストをAIN基板の接
合部上にスクリーン印刷し、上記開口部を有するガラス
セラミックス基板と圧着し、空気中850℃にて10分
間焼成して、AIN基板にこのガラスセラミックス基板
を接合した。
In addition to this, a commercially available AIN board (AGN-2 manufactured by Asahi Glass,
External dimensions: 25X 25X l. otmm, thermal conductivity 20
0w/mK, thermal expansion coefficient 45X 10-'℃-
A gold layer was formed on 1》. Next, an organic vehicle was added to the glass frit, kneaded in an automatic mortar, and then passed through three rolls to produce a glass paste. Here, the glass frit was completely the same as that used when producing the above-mentioned glass-ceramic substrate. The composition of the organic vehicle was 5% ethylcellulose and 95% α-terpineol. Then, this glass paste was screen printed on the joint part of the AIN board, and was pressure-bonded to the glass ceramic board having the above-mentioned opening, and then baked in air at 850°C for 10 minutes to join the glass ceramic board to the AIN board. did.

なお、この接合部のガラス層の熱膨脹係数は、43X 
10−’℃−8であった。
The coefficient of thermal expansion of the glass layer at this joint is 43X.
The temperature was 10-'C-8.

次に、上記AIN基板と接合されたガラスセラミックス
基板の上面と上側となる上記ガラスセラミックス基板の
下面に、シール用ガラスペーストを印刷し、コバール製
リードフレームを間にはさんで、680℃にて10分間
加熱することにより、このコバール製リードフレームを
間にはさんで、開口部を有するガラスセラミックス基板
を接合した。次いでこのコバール製リードフレームを折
り曲げ、第1図に示す複合型回路装置を得た。なお、用
いたコバール製リードフレームの先端には、あらかじめ
金メッキが施されていた。
Next, sealing glass paste was printed on the upper surface of the glass ceramic substrate bonded to the AIN substrate and the lower surface of the glass ceramic substrate that was to become the upper side, and a Kovar lead frame was sandwiched between them. By heating for 10 minutes, a glass ceramic substrate having an opening was bonded with this Kovar lead frame in between. Next, this Kovar lead frame was bent to obtain a composite circuit device as shown in FIG. Note that the tip of the Kovar lead frame used was gold-plated in advance.

次に、第1図に示す如<、AIN基板上にベア−チップ
を、430℃でグイボンドし、その後、金ワイヤーでボ
ンディングを行なった。
Next, as shown in FIG. 1, the bare chip was bonded onto the AIN substrate at 430 DEG C., and then bonded with gold wire.

そして、前記上蓋を、シール用ガラスペーストを用いて
、380℃で10分間加熱することにより接合し,第1
図に示した如き複合型回路装置を得た。
Then, the upper lid is joined by heating at 380° C. for 10 minutes using a sealing glass paste, and the first
A composite circuit device as shown in the figure was obtained.

この複合型回路装置においては、 1α一βl = l 62X 10−’− 45X 1
0−’= 17X 10−’℃−1 1β−γI = + 45X 10−’− 43X 1
0−’ 1= 2X10−’℃−1 であった。
In this composite circuit device, 1α-βl = l 62X 10-'- 45X 1
0-'= 17X 10-'℃-1 1β-γI = + 45X 10-'- 43X 1
0-'1=2X10-'°C-1.

この複合型回路装置1000個について、+250℃〜
−50℃のヒートサイクル試験を一周期30分l000
サイクル行なったが、接合部の剥離.クラック等の欠陥
の発生は全《なく、気密性,信頼性ともに充分であった
For 1000 pieces of this composite circuit device, +250℃~
-50℃ heat cycle test for 30 minutes 1000
I ran the cycle, but the joints peeled off. There were no defects such as cracks, and both airtightness and reliability were sufficient.

(実施例5) Altos粉末38%,ガラスフリット57%, Ce
nt粉末5%に溶剤,分散剤,有機バインダー,可塑剤
を添加して混練し、成形して厚さ 1.2 mmのグリ
ーンシ一トを作製した。用いたガラスフリットの組成は
%で SiO* 40%, AlaOi 8%,Ca04%,
 BaOl8%, Pb0 10%lB20310−%
, ZnO 10%からなっていた。
(Example 5) Altos powder 38%, glass frit 57%, Ce
A solvent, a dispersant, an organic binder, and a plasticizer were added to 5% of the nt powder, and the mixture was kneaded and molded to produce a green sheet with a thickness of 1.2 mm. The composition of the glass frit used was 40% SiO*, 8% AlaOi, 4% Ca,
BaOl8%, Pb0 10%lB20310-%
, 10% ZnO.

このグリーンシ一トを外寸30 mm角で、中心部に2
0 mm角の開口部を有する形状と中心部に25 mm
角の開口部を有する形状に打ち抜き、Cu粉末と有機ビ
ヒクルからなる銅ペーストを所定の回路に印刷した後、
重ねて加圧し、圧着した。
This green sheet has an outer size of 30 mm square, with 2 squares in the center.
Shape with 0 mm square opening and 25 mm in the center
After punching a shape with corner openings and printing a copper paste consisting of Cu powder and an organic vehicle into a predetermined circuit,
They were overlapped and pressed together to be crimped.

さらに、外部端子との電気的接続をとるため、銅ペース
トを用いてサイド印刷を行ない、窒素雰囲気炉中、90
0℃で6時間焼成し、コバール製外部端子ビンを銀ロー
( Ag 72%, Cu28%)を用い、900℃で
10分間加熱することにより接合した。
Furthermore, in order to make an electrical connection with an external terminal, side printing was performed using copper paste, and the plate was placed in a nitrogen atmosphere furnace for 90 minutes.
After firing at 0°C for 6 hours, a Kovar external terminal bottle was joined using silver solder (72% Ag, 28% Cu) by heating at 900°C for 10 minutes.

これとは別に、旭硝子■製 AIN基板(AGN−2)
に金層を形成した。
Apart from this, AIN board (AGN-2) manufactured by Asahi Glass ■
A gold layer was formed on the surface.

次いで、ガラスフリットに有機ビヒクルを加えて、自動
乳鉢で混練し、さらに三本ロールを通してガラスペース
トを作製した。使用したガラスフリットの組成は%で Sins 40%, Al.0. 15%, Ca0 
10%, Ba015%, PbO to%. B*O
s  10%から成っていた。また、有機ビヒクルはア
クリル樹脂をプチルカルビトールアセテートで溶解した
ものを用いた。
Next, an organic vehicle was added to the glass frit, kneaded in an automatic mortar, and then passed through three rolls to produce a glass paste. The composition of the glass frit used was Sins 40%, Al. 0. 15%, Ca0
10%, Ba015%, PbO to%. B*O
It consisted of s 10%. The organic vehicle used was an acrylic resin dissolved in butyl carbitol acetate.

そしてこのガラスペーストをAIN基板接合部上にスク
リーン印刷し、開口部を有するガラスセラミックス基板
を圧着し、窒素雰囲気中800℃で30分間加熱して、
ガラス層を形成し、AIN基板にガラスセラミックス基
板を接合した。このガラス層の熱膨脹係数は51X 1
0−”C−’であった。
Then, this glass paste was screen printed on the AIN substrate joint, a glass ceramics substrate with an opening was bonded, and heated at 800°C for 30 minutes in a nitrogen atmosphere.
A glass layer was formed, and a glass ceramic substrate was bonded to the AIN substrate. The coefficient of thermal expansion of this glass layer is 51×1
It was 0-"C-'.

次に、上記AIN基板上にベアーチップを,430℃で
グイボンドし、その後、金ワイヤーでボンディングを行
なった。そして、上蓋をシール用ガラスペーストを用い
て380℃で10分間加熱することにより接合し、第3
図に示した如き複合型回路装置を得た。
Next, the bare chip was bonded onto the AIN substrate at 430° C., and then bonded with gold wire. Then, the upper lid is joined by heating it at 380°C for 10 minutes using a sealing glass paste, and the third
A composite circuit device as shown in the figure was obtained.

この複合型回路装置においては α−β= 49X 10−’ − 45x 10−’=
 4X10−’℃゛1 β−γl = + 45X 10−’− 51X 10
−’ 1= 6X10 ”C−’ であった。
In this composite circuit device, α-β= 49X 10-' - 45x 10-'=
4X10-'℃゛1 β-γl = + 45X 10-'- 51X 10
-' 1=6X10 "C-'.

この複合型回路装置1000個について、+250℃〜
−50℃のヒートサイクル試験を一周期30分2000
サイクル行なったが、接合部の剥離.クラック等の欠陥
の発生は全くなく、気密性,信頼性ともに充分であった
For 1000 pieces of this composite circuit device, +250℃~
-50℃ heat cycle test for 30 minutes 2000 cycles
I ran the cycle, but the joints peeled off. There were no defects such as cracks, and both airtightness and reliability were sufficient.

さらに、この複合型回路装置1000個について、+3
50℃〜− 195. 8℃(液体窒素)のヒートサイ
クル試験を一周期30分2000サイクル行なったが、
接合部の剥離クラック等の欠陥の発生は全くな《、気密
性、信頼性ともに十分であった.(実施例6) 本発明の複合型回路装置について使用する上記例示した
ガラスセラミックス基板を作製するにあたり、酸化物に
換算して表1に示した組成の粉末状のものとして用意し
、更に上記酸化剤を添加し、次いで、これらに有機バイ
ンダーとしてアクリル樹脂、可塑剤としてフタル酸ジブ
チル、溶剤としてトルエンを添加し、混練して粘度10
,000〜30, 000cpsのスラリーを作成した
。次いで、このスラリーを約0.2mm厚のシートにし
た後、70℃で約2時間乾燥した。次いでこのシートを
4層に積層して、900℃.6時間焼成し、多層ガラス
セラミックス基板を製造した。
Furthermore, for 1000 composite circuit devices, +3
50℃~-195. A heat cycle test at 8℃ (liquid nitrogen) was conducted for 2000 cycles of 30 minutes each.
There were no defects such as peeling cracks in the joints, and both airtightness and reliability were sufficient. (Example 6) In producing the above-exemplified glass-ceramic substrate used for the composite circuit device of the present invention, a powder having the composition shown in Table 1 in terms of oxide was prepared, and the above-mentioned oxide Next, acrylic resin as an organic binder, dibutyl phthalate as a plasticizer, and toluene as a solvent were added and kneaded to obtain a viscosity of 10.
,000 to 30,000 cps of slurry was prepared. Next, this slurry was formed into a sheet with a thickness of about 0.2 mm, and then dried at 70° C. for about 2 hours. Next, this sheet was laminated into four layers and heated at 900°C. After firing for 6 hours, a multilayer glass ceramic substrate was manufactured.

この多層ガラスセラミックス基板について、気孔率,誘
電率,抗折強度を測定した。
The porosity, dielectric constant, and bending strength of this multilayer glass ceramic substrate were measured.

さらに、この多層ガラスセラミックス基板にスクリーン
印刷法で導体ペーストを印刷し、600〜900℃で焼
成し、半田濡れ性を評価し、結果を表1に示した。尚表
1において焼結性が悪いと気孔性が増大して抗折強度が
低下する.実施例1に使用したガラスセラミックス基板
の替りに表一lの中の実施例に示す組成からなる上記多
層ガラスセラミックス基板を使用して形状・接合等の他
のすべての条件が実施例lと同様にして複合型回路装置
を作製した.製作した数量は、表−1の実施例の試料番
号1につき100個、計3600個作製した. この複合型回路装置各100個づつを、+250℃〜−
50℃、ヒートサイクル試験、一周期30分1000サ
イクル行なったが、接合部の剥離.クラック等の欠陥の
発生は全《、気密性、信頼性共に満足するものであった
Further, a conductive paste was printed on this multilayer glass ceramic substrate by screen printing, and baked at 600 to 900°C to evaluate solder wettability. The results are shown in Table 1. Furthermore, in Table 1, if the sinterability is poor, the porosity increases and the bending strength decreases. In place of the glass-ceramic substrate used in Example 1, the multilayer glass-ceramic substrate having the composition shown in the example in Table 1 was used, and all other conditions such as shape and bonding were the same as in Example 1. A composite circuit device was fabricated using the following methods. The number of manufactured samples was 100 for each sample number 1 in the example shown in Table 1, for a total of 3,600. 100 of each of these composite circuit devices were heated to +250°C to -
A heat cycle test was conducted at 50°C for 1,000 cycles of 30 minutes each, but the bonded portion peeled off. There was no occurrence of defects such as cracks, and the airtightness and reliability were satisfactory.

更に表−1の試料番号5,8,14、18のガラスセラ
ミックス基板を使用した上記複合型回路装置400個(
試料番号1につき100個)について、+350℃〜−
195. 8℃(液体窒素)のヒートサイクル試験を一
周期30分2000サイクルを行なった。結果は以下の
とおりである. (比較例l) 2MgO・Sift粉末55%,ガラスフリット45%
に可塑剤.溶剤を添加して、混練し、成形して厚さ 1
.2 mmのグリーンシ一トを作製した。
Furthermore, 400 of the above composite circuit devices (
100 pieces per sample number 1), +350℃~-
195. A heat cycle test at 8° C. (liquid nitrogen) was conducted for 2000 cycles each lasting 30 minutes. The results are as follows. (Comparative Example 1) 2MgO・Sift powder 55%, glass frit 45%
Plasticizer. Add a solvent, knead, and mold to a thickness of 1
.. A 2 mm green sheet was prepared.

上記ガラスフリット組成は Stow 45%, Al.03 10%, Bass
 35%,BaO 10% からなっていた。
The above glass frit composition is Stow 45%, Al. 03 10%, Bass
35% and 10% BaO.

このグリーンシ一トと旭硝子■製AIN基板AGN−2
を用いて、実施例lと同様にして実施例lと同様の複合
型回路装置を製作した。
This green sheet and Asahi Glass's AIN board AGN-2
A composite circuit device similar to that in Example 1 was manufactured in the same manner as in Example 1 using the following.

該ガラスセラミック基板の熱膨脹係数を測定した結果、
68X to−’℃−1であった。従ってこのガラスセ
ラミックス基板とAIN基板の熱膨脹差α−β1は α−β l  =  l 68X 10−’− 45X
 10−’= 23X 10−”C−’ であった。
As a result of measuring the thermal expansion coefficient of the glass ceramic substrate,
It was 68X to -'C-1. Therefore, the thermal expansion difference α-β1 between this glass ceramic substrate and the AIN substrate is α-β l = l 68X 10-'- 45X
10-'=23X 10-"C-'.

この複合回路装置1000個を+125℃,−50℃の
ヒートサイクル試験一周期30分l000サイクルを実
施した結果、接合部の剥離が1000個中236個.接
合部のクラックが1000個中19個発生した。さらに
上記より温度差のある試験、+250℃〜−50℃のヒ
ートサイクル試験、一周期30分l000サイクルを実
施した結果、接合部の剥離が1000個中820個.接
合部のクラックが1000個中180個発生した。
1,000 of these composite circuit devices were subjected to a heat cycle test at +125°C and -50°C for 1,000 cycles for 30 minutes, and as a result, 236 of the 1,000 bonded parts peeled off. Cracks occurred in 19 out of 1000 joints. Furthermore, as a result of conducting a test with a temperature difference from the above, a heat cycle test from +250°C to -50°C, and 1000 cycles for 30 minutes, 820 out of 1000 joints peeled. Cracks occurred in 180 out of 1000 joints.

(比較例2) 実施例4と同様にして、第2図に示したような開口部を
有するガラスセラミックス基板を得た.このガラスセラ
ミックス基板の熱膨脹係数は62X 10−’℃−1で
あった。
(Comparative Example 2) A glass ceramic substrate having an opening as shown in FIG. 2 was obtained in the same manner as in Example 4. The coefficient of thermal expansion of this glass ceramic substrate was 62×10-'°C-1.

次いで、このガラスセラミック基板の接合部上に銀層を
形成した。
Next, a silver layer was formed on the joint portion of this glass ceramic substrate.

これとは別に、旭硝子■製AIN基板(AGN−2)に
ベアーチップ搭載用金層及び銀層を形成した。次いで、
これらの銀層を有するガラスセラミックス基板とAIN
基板とを銀ロー(Ag72%, Cu 2g%)を用い
て、900℃で10分間加熱することにより接合した。
Separately, a gold layer and a silver layer for mounting a bare chip were formed on an AIN substrate (AGN-2) manufactured by Asahi Glass. Then,
Glass-ceramic substrates with these silver layers and AIN
The substrate was bonded to the substrate using silver wax (Ag 72%, Cu 2g%) by heating at 900° C. for 10 minutes.

この銀ローの熱膨脹係数は19ox lo−”C +l
であった。以下、実施例4と同様にして、第1図に示す
複合型回路装置を得た。この複合型回路装置においては
、1α一βl = + 62X10゜’− 45X 1
0−’ 1” 17X IQ−”℃−1 1β一γI = + 45X to”− 190 X 
toづ1=  145  X  10−’℃一暑であっ
た. この複合型回路装置1000個について、+125’C
,−50℃のヒートサイクル試験を一周期30分100
0サイクル行なったが、接合部の剥離;クラック等の欠
陥の発生は全くなかった.しかしながら、より厳しい条
件である+250℃,−50℃゜のヒートサイクル試験
を一周期30分l000サイクル行なったところ、10
00個中1個に微小なクラックが見い出され,さらに、
2000サイクルまで継続したところ、1000個中1
1個に剥離が、また、13個に微小なクラックが認めら
れた.(比較例3) 実施例1に使用したガラスセラミックス基板の替りに表
−2の比較例に示す組成からなる上記多層ガラスセラミ
ックス基板を使用して形状・接合等の他のすべての条件
が実施例lと同様にして複合型回路装置を作製した。製
作した数量は、表−2の比較例の試料番号l4について
100個作製した。
The coefficient of thermal expansion of this silver rod is 19ox lo-”C +l
Met. Thereafter, in the same manner as in Example 4, a composite circuit device shown in FIG. 1 was obtained. In this composite circuit device, 1α - βl = + 62X10゜'- 45X 1
0-'1" 17X IQ-"℃-1 1β-γI = + 45X to"- 190 X
It was very hot at 145 x 10-'°C. For 1000 of these composite circuit devices, +125'C
, -50℃ heat cycle test for 30 minutes 100
Although 0 cycles were performed, no defects such as peeling or cracking of the joints occurred. However, when we conducted a heat cycle test under more severe conditions of +250℃ and -50℃ for 1000 cycles of 30 minutes, we found that 10
A minute crack was found in 1 out of 00 pieces, and furthermore,
When continued for 2000 cycles, 1 out of 1000
Peeling was observed in 1 piece, and minute cracks were observed in 13 pieces. (Comparative Example 3) In place of the glass ceramic substrate used in Example 1, the above multilayer glass ceramic substrate having the composition shown in the comparative example in Table 2 was used, and all other conditions such as shape and bonding were the same as in Example 1. A composite circuit device was fabricated in the same manner as in Example 1. The number of manufactured samples was 100 for sample number l4 of the comparative example in Table 2.

この複合回路装置各100個を+125℃,−50℃の
ヒートサイクル試験一周期30分l000サイクルを実
施した結果、接合部の剥離が100個中22個、接合部
のクラックが100個中2個発生した. [使用導体ペースト] Ag−Pdペースト:田中マッセイ製 TE−4846
Au  ペースト二田中マッセイ製 TR−130CC
u  ペースト: Du Pant社製   9l53
Au−Ptペースト: ESL社製   5800BN
i  ペースト:ESL社製 COND 5557W 
ペースト:■アサヒ化学研究所製 WA−1200−AG2 Mo−Mnペースト:■アサヒ化学研究所製WA−12
00−AGI [特性評価法] 気孔率  アルキメデス法により測定した.誘電率  
安藤電気製交流ブリッジにより 100κHzの特性を
測定し評価した.温度 25±1℃、湿度45±1% 抗折強度 東洋ボールドウィン製強度試験機により測定
した.焼結基板な幅10sm、長さ50mmに切断し2
0III1の2点支持半田濡れ性’ Ag−Pdペース
ト: Sn 63%, Pb 35%,Ag2%半田,240
±5℃、5秒間ディップ後、半 田の濡れた面積割合を評価した. Cu,Ni,Au−Pt導体: Sn 64%, Pb 36%,半田,250±5℃、
5秒間ディップ後、半田の濡 れた面積割合を評価した。
A heat cycle test of 100 pieces of each of these composite circuit devices at +125°C and -50°C was performed for 1,000 cycles for 30 minutes. As a result, 22 out of 100 pieces had peeling at the joint, and 2 out of 100 had cracks at the joint. Occurred. [Conductor paste used] Ag-Pd paste: TE-4846 manufactured by Tanaka Massey
Au paste Nitanaka Massey TR-130CC
u Paste: Du Pant 9l53
Au-Pt paste: ESL 5800BN
i Paste: COND 5557W manufactured by ESL
Paste: ■ WA-1200-AG2 manufactured by Asahi Chemical Laboratory Mo-Mn paste: ■ WA-12 manufactured by Asahi Chemical Laboratory
00-AGI [Characteristic evaluation method] Porosity Measured by Archimedes method. dielectric constant
The characteristics at 100κHz were measured and evaluated using an AC bridge manufactured by Ando Electric. Temperature: 25±1°C, Humidity: 45±1% Bending strength: Measured using a strength testing machine manufactured by Toyo Baldwin. Cut the sintered board into 10 sm width and 50 mm length 2
Two-point support solder wettability of 0III1'Ag-Pd paste: Sn 63%, Pb 35%, Ag2% solder, 240
After dipping at ±5°C for 5 seconds, the wetted area ratio of the solder was evaluated. Cu, Ni, Au-Pt conductor: Sn 64%, Pb 36%, solder, 250±5℃,
After dipping for 5 seconds, the wetted area ratio of the solder was evaluated.

Au導体: In 50%, Pb 50%,半田.260±5℃、
5秒間ディップ後、半田の濡 れた面積割合を評価した。
Au conductor: In 50%, Pb 50%, solder. 260±5℃,
After dipping for 5 seconds, the wetted area ratio of the solder was evaluated.

W, Mo−M導体:表面に下地メッキとしてflit
メッキをほどこし、更にNLメッキ表面にAuメッキを
1〜2μmほどこした後、Sn 64%, Pb 36
%半田.250±5℃、5秒間ディップ後、半田の濡れ
た面積割合を評価した. [発明の効果] 本発明の複合型回路装置はへアーチップをAIN基板上
に搭載しているため放熱性に優れ、信頼性゜が高い. 更に、AIN基板とガラスセラミックス基板の熱膨張の
差が小さいため、接合部に熱膨脹の差を緩和するための
特殊な金属層を形成する必要がない.しかも接合部に応
力が発生しにくく、接合部の剥離等の欠陥が発生しない
という優れた効果も認められる.
W, Mo-M conductor: flit as base plating on the surface
After plating and further applying Au plating to a thickness of 1 to 2 μm on the NL plating surface, Sn 64%, Pb 36
%solder. After dipping at 250±5°C for 5 seconds, the wetted area ratio of the solder was evaluated. [Effects of the Invention] Since the composite circuit device of the present invention has a hair chip mounted on the AIN board, it has excellent heat dissipation and high reliability. Furthermore, since the difference in thermal expansion between the AIN substrate and the glass-ceramic substrate is small, there is no need to form a special metal layer at the joint to alleviate the difference in thermal expansion. Moreover, it has the advantage that stress is less likely to occur in the joint, and defects such as peeling of the joint do not occur.

【図面の簡単な説明】[Brief explanation of drawings]

第1図二本発明の複合型回路装置の代表的一例の断面図
. 第2図:第1図に示す複合型回路装置の製作手順を示す
各部品の断面図。 第3図二本発明の別のタイプの複合型回路装置の断面図
. 第4図:ガラスセラミックス基板とAIN基板の熱膨張
率一温度の特性図 1:AIN基板 2.3:ガラスセラミックス基板 5:接合部 弟 図 弟 Z 回
Figure 1: Cross-sectional view of a typical example of the composite circuit device of the present invention. FIG. 2: A cross-sectional view of each component showing the manufacturing procedure of the composite circuit device shown in FIG. 1. FIG. 3 is a sectional view of another type of composite circuit device of the present invention. Figure 4: Characteristics of thermal expansion coefficient vs. temperature of glass ceramics substrate and AIN substrate Figure 1: AIN substrate 2.3: Glass ceramics substrate 5: Joint part diagram Z times

Claims (8)

【特許請求の範囲】[Claims] (1)熱膨脹が窒化アルミニウム基板とほぼ同じガラス
セラミックス基板と窒化アルミニウム基板とが接合され
ている構造を有することを特徴とする複合型回路装置。
(1) A composite circuit device characterized in that it has a structure in which a glass ceramic substrate and an aluminum nitride substrate are bonded together, the thermal expansion being approximately the same as that of the aluminum nitride substrate.
(2)上記ガラスセラミックス基板と窒化アルミニウム
基板の熱膨張係数の差が20×10^−^7℃^−^1
以下であることを特徴とする第1項記載の複合型回路装
置。
(2) The difference in thermal expansion coefficient between the glass ceramic substrate and the aluminum nitride substrate is 20×10^-^7℃^-^1
2. The composite circuit device according to claim 1, characterized in that:
(3)上記ガラスセラミックス基板と窒化アルミニウム
基板の接合部に銀ローを使用したことを特徴とする第1
項又は第2項記載の複合型回路装置。
(3) A first method characterized in that silver solder is used in the joint between the glass ceramic substrate and the aluminum nitride substrate.
3. The composite circuit device according to item 1 or 2.
(4)上記ガラスセラミックス基板と窒化アルミニウム
基板とがガラス層を介して接合をされていることを特徴
とする第1項又は第2項記載の複合型回路装置。
(4) The composite circuit device according to item 1 or 2, wherein the glass ceramic substrate and the aluminum nitride substrate are bonded via a glass layer.
(5)上記ガラスセラミックス基板と窒化アルミニウム
基板とが接合されている接合部と該窒化アルミニウム基
板の熱膨張率の差が、30×10^−^7℃^−^3以
下であることを特徴とする第1項又は第2項又は第3項
又は第4項記載の複合型回路装置。
(5) The difference in thermal expansion coefficient between the joint where the glass ceramic substrate and the aluminum nitride substrate are joined and the aluminum nitride substrate is 30×10^-^7°C^-^3 or less. The composite circuit device according to claim 1, claim 2, claim 3, or claim 4, wherein
(6)無機成分が重量%表示、酸化物換算で実質的にア
ルミナ50〜91、SiO_275〜30、PbO3〜
20、B_2O_30〜15、アルカリ土類金属酸化物
0.5〜15、Ti+Zr+Hfの酸化物0〜6からな
り、更に上記無機成分の総量に対し、実質的にCr_2
O_3+V_2O_5+CeO_2+CoO+SnO_
2を0〜10添加してなる第1項又は第2項又は第3項
又は第4項又は第5項記載の複合型回路装置用ガラスセ
ラミックス基板組成物。
(6) Inorganic components are expressed as weight%, and in terms of oxides, they are substantially alumina 50-91, SiO_275-30, PbO3-
20, B_2O_30-15, alkaline earth metal oxide 0.5-15, Ti+Zr+Hf oxide 0-6, and furthermore, based on the total amount of the above inorganic components, substantially Cr_2
O_3+V_2O_5+CeO_2+CoO+SnO_
The glass-ceramic substrate composition for a composite circuit device according to item 1, item 2, item 3, item 4, or item 5, wherein 0 to 10 of 2 is added.
(7)無機成分が重量%表示、実質的にアルミナ50〜
91、SiO_25〜30、PbO3〜20、B_2O
_30〜15、アルカリ土類金属酸化物0.5〜15、
Ti+Zr+Hfの酸化物0〜6と、上記無機成分の総
量に対して実質的に酸化クロムをCr_2O_3換算で
、酸化バナジウムをV_2O_5換算で、酸化セリウム
をCeO_2換算で、酸化コバルトをCoO換算で、酸
化錫をSnO_2換算で、酸化クロム+酸化バナジウム
+酸化セリウム+酸化コバルト+酸化錫0〜10からな
る第1項又は第2項又は第3項又は第4項又は第5項記
載の複合型回路装置用ガラスセラミックス基板。
(7) Inorganic components are expressed in weight%, substantially alumina 50~
91, SiO_25~30, PbO3~20, B_2O
_30-15, alkaline earth metal oxide 0.5-15,
Ti + Zr + Hf oxides 0 to 6, and the total amount of the above inorganic components, substantially including chromium oxide in terms of Cr_2O_3, vanadium oxide in terms of V_2O_5, cerium oxide in terms of CeO_2, cobalt oxide in terms of CoO, and tin oxide. For a composite circuit device according to item 1 or 2 or 3 or 4 or 5 consisting of chromium oxide + vanadium oxide + cerium oxide + cobalt oxide + tin oxide 0 to 10 in terms of SnO_2. Glass ceramic substrate.
(8)無機成分が重量%表示、実質的にアルミナ50〜
91、SiO5〜30、PbO3〜20、B_2O_3
0〜15、アルカリ土類金属酸化物0.5〜15、Ti
+Zr+Hfの酸化物0〜6と、上記無機成分の総量に
対して実質的に酸化クロムをCr_2O_3換算で、酸
化バナジウムをV_2O_5換算で、酸化セリウムをC
eO_2換算で、酸化コバルトをCoO換算で、酸化錫
をSnO_2換算で、酸化クロム+酸化バナジウム+酸
化セリウム+酸化コバルト+酸化錫0〜10からなるガ
ラスセラミックス基板と窒化アルミニウム基板とが接合
されている構造を有することを特徴とする第1項又は第
2項又は第3項又は第4項又は第5項記載の複合型回路
装置。
(8) Inorganic components expressed as weight%, substantially alumina 50~
91, SiO5~30, PbO3~20, B_2O_3
0-15, alkaline earth metal oxide 0.5-15, Ti
+Zr+Hf oxides 0 to 6, and chromium oxide in terms of Cr_2O_3, vanadium oxide in terms of V_2O_5, and cerium oxide in terms of C to the total amount of the above inorganic components.
A glass ceramic substrate consisting of chromium oxide + vanadium oxide + cerium oxide + cobalt oxide + tin oxide 0 to 10 is bonded to an aluminum nitride substrate, with cobalt oxide in terms of CoO and tin oxide in terms of SnO_2. The composite circuit device according to item 1, item 2, item 3, item 4, or item 5, characterized in that it has a structure.
JP1231399A 1988-11-15 1989-09-08 Composite circuit device Expired - Fee Related JP2952303B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP1231399A JP2952303B2 (en) 1988-11-15 1989-09-08 Composite circuit device
US07/436,738 US5057376A (en) 1988-11-15 1989-11-15 Hybrid package, glass ceramic substrate for the hybrid package, and composition for the glass ceramic substrate
US07/717,275 US5304518A (en) 1988-11-15 1991-06-18 Hybrid package, glass ceramic substrate for the hybrid package, and composition for the glass ceramic substrate

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP63-286664 1988-11-15
JP28666488 1988-11-15
JP1231399A JP2952303B2 (en) 1988-11-15 1989-09-08 Composite circuit device

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JPH02237054A true JPH02237054A (en) 1990-09-19
JP2952303B2 JP2952303B2 (en) 1999-09-27

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US (2) US5057376A (en)
JP (1) JP2952303B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2001044143A1 (en) * 1999-12-16 2004-01-08 株式会社トクヤマ Bonded body of crystallized glass and sintered aluminum nitride and method for producing the same
US7090423B2 (en) 2002-02-21 2006-08-15 Sumitomo Electric Industries, Ltd. Connecting structures
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Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6207288B1 (en) 1991-02-05 2001-03-27 Cts Corporation Copper ink for aluminum nitride
US5821455A (en) * 1993-04-26 1998-10-13 Sumitomo Metal (Smi) Electronics Devices, Inc. Lid with variable solder layer for sealing semiconductor package, package having the lid and method for producing the lid
JPH07109573A (en) 1993-10-12 1995-04-25 Semiconductor Energy Lab Co Ltd Glass substrate and heat treatment
US5637261A (en) * 1994-11-07 1997-06-10 The Curators Of The University Of Missouri Aluminum nitride-compatible thick-film binder glass and thick-film paste composition
US5675181A (en) * 1995-01-19 1997-10-07 Fuji Electric Co., Ltd. Zirconia-added alumina substrate with direct bonding of copper
JP3176815B2 (en) * 1995-01-19 2001-06-18 富士電機株式会社 Substrate for semiconductor device
US5763059A (en) * 1995-03-31 1998-06-09 Kyocera Corporation Circuit board
DE19727913A1 (en) * 1997-07-01 1999-01-07 Daimler Benz Ag Ceramic housing and process for its manufacture
DE19749987B4 (en) * 1997-07-11 2008-09-25 Curamik Electronics Gmbh Housing for semiconductor devices, in particular for power semiconductor components
CN1186294C (en) * 1998-10-16 2005-01-26 株式会社村田制作所 Crystal glass composite article, crystal glass, insulating composite article, insulating paste and thick film circuit board
US6348427B1 (en) * 1999-02-01 2002-02-19 Kyocera Corporation High-thermal-expansion glass ceramic sintered product
US6350954B1 (en) * 2000-01-24 2002-02-26 Motorola Inc. Electronic device package, and method
JP4328462B2 (en) * 2000-12-14 2009-09-09 千住金属工業株式会社 Solder coat lid
DE10150239A1 (en) * 2001-10-11 2003-04-30 Schott Glas Lead-free glass tubing for making encapsulated electronic component comprises silicon dioxide, boron trioxide, aluminum trioxide, lithium oxide, sodium oxide, potassium oxide, calcium oxide, barium oxide, zinc oxide, and titanium dioxide
US20050116245A1 (en) * 2003-04-16 2005-06-02 Aitken Bruce G. Hermetically sealed glass package and method of fabrication
US7344901B2 (en) * 2003-04-16 2008-03-18 Corning Incorporated Hermetically sealed package and method of fabricating of a hermetically sealed package
US20040238099A1 (en) * 2003-05-29 2004-12-02 Milano Vincent J. Economical method of manufacturing features in a ceramic circuit board
KR20050082357A (en) * 2004-02-18 2005-08-23 엘지전자 주식회사 Synthetic method for upper plate dielectric of plasma display panel device
US7387838B2 (en) * 2004-05-27 2008-06-17 Delaware Capital Formation, Inc. Low loss glass-ceramic materials, method of making same and electronic packages including same
US7186461B2 (en) * 2004-05-27 2007-03-06 Delaware Capital Formation, Inc. Glass-ceramic materials and electronic packages including same
WO2014157679A1 (en) * 2013-03-29 2014-10-02 日本山村硝子株式会社 Insulation layer formation material, insulation layer formation paste
US20230360990A1 (en) * 2022-05-06 2023-11-09 Microchip Technology Incorporated Low-profile sealed surface-mount package

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55133597A (en) * 1979-04-06 1980-10-17 Hitachi Ltd Multilayer circuit board
JPS5922399B2 (en) * 1981-10-14 1984-05-26 日本電気株式会社 multilayer ceramic substrate
JPS5922399A (en) * 1982-07-29 1984-02-04 ソニー株式会社 Printed board containing device
JPS608229A (en) * 1983-06-27 1985-01-17 Agency Of Ind Science & Technol 7-substituted norbornadiene-cyclodextrin clathrate compound and its preparation
EP0153737B1 (en) * 1984-02-27 1993-07-28 Kabushiki Kaisha Toshiba Circuit substrate having high thermal conductivity
US4729010A (en) * 1985-08-05 1988-03-01 Hitachi, Ltd. Integrated circuit package with low-thermal expansion lead pieces
JPS62290158A (en) * 1986-06-09 1987-12-17 Ngk Spark Plug Co Ltd Junction structure of ceramic of loading section of semiconductor element
JPS62291158A (en) * 1986-06-11 1987-12-17 Toshiba Corp Ic package
JPH0680873B2 (en) * 1986-07-11 1994-10-12 株式会社東芝 Circuit board
JPS6318648A (en) * 1986-07-11 1988-01-26 Toshiba Corp Circuit board using aluminum nitride
US4775596A (en) * 1987-02-18 1988-10-04 Corning Glass Works Composite substrate for integrated circuits
US4861646A (en) * 1987-08-13 1989-08-29 Ceramics Process Systems Corp. Co-fired metal-ceramic package
US4961998A (en) * 1988-09-23 1990-10-09 National Starch And Chemical Investment Holding Corporation Dielectric composition having controlled thermal expansion

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2001044143A1 (en) * 1999-12-16 2004-01-08 株式会社トクヤマ Bonded body of crystallized glass and sintered aluminum nitride and method for producing the same
US7090423B2 (en) 2002-02-21 2006-08-15 Sumitomo Electric Industries, Ltd. Connecting structures
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Also Published As

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US5304518A (en) 1994-04-19
US5057376A (en) 1991-10-15

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