JPH02236684A - Device and method for processing picture data - Google Patents

Abstract

PURPOSE:To easily and promptly transfer an arbitrary area by executing a trinominal logical operation of transfer source data, transfer destination data and pattern data when an area is transferred. CONSTITUTION:A transfer source data register 322, a transfer destination data register 323, and a pattern data register 324 are the registers to temporarily hold transfer source data S, transfer designation data D and pattern data P respectively, and an arithmetic result register 325 is the register to temporarily hold the arithmetic result of a PLA 321. Further the trinominal logical arithmetic means 321 executes the trinominal logical operations of the data in the transfer source data register 322, the transfer destination data register 323, and the pattern data register 324 according to a logical arithmetic code Cn. Thus the trinominal logical operation is attained, the trinominal logical operation is executed by the logical arithmetic code, nd the area can be arbitrarily transferred at high speed.

Description

[Detailed Description of the Invention] [Summary] This invention relates to an image data processing device and method in an image processing device that creates graphic data and displays it on a CRT, which enables transfer of any complex area and speeds up complex calculations. For the purpose of execution, data is fetched from the memory that is the transfer destination where the data to be logically operated is stored, and this data is combined with the data fetched from the memory which is the transfer source where the data to be logically operated is stored. In an image data processing device that performs logical operations and writes data to the transfer destination again, a storage means (pattern data register) that can set an arbitrary pattern is provided, and the data in the transfer source data, transfer destination data, and data in the pattern register is provided. No. 3
It is configured to perform term logical operations according to logical operation codes, imports data from the transfer destination memory where the logical operation target data is stored, and transfers this data and the transfer source where the logical operation target data is stored. In an image data processing device that performs a logical operation with data imported from a memory and writes it to the transfer destination again, when transferring an arbitrary area of the transfer destination, pattern data (P) representing this area is Prepare the transfer source data, transfer destination data,
and pattern data to perform ternary logical operations according to the logical operation code. [Field of Application of the Invention] The present invention relates to an image data processing device and method in an image processing device that creates graphic data and displays it on a CRT. [Prior Art] In an image processing device that creates graphic data and displays it on a CRT, when transferring a certain area within a graphic, a logical operation (binary logical operation) is usually performed on the transfer source data and the transfer destination data. and use this as the destination data again. In the case of a simple transfer in which the transfer area is rectangular and a binary logical operation is performed, this operation can be realized by one logical operation process, that is, two memory accesses of the transfer destination + α.

[Problem to be solved by the invention]

The graphical data handled by Nishizo processing is becoming more and more complex year by year. For example, there are cases where an area of arbitrary shape is transferred. In this case, conventional image processing devices only have the function of binary logical operations. Therefore, when transferring an arbitrary area, it was necessary to divide the area into several parts with simple shapes and transfer them one by one.
Also, even when transferring a simple shape, when performing a logical operation on three terms A, B, and C, for example, if the transfer destination is A, a logical operation such as An (BuC) is performed. When performing processing such as writing the result, you must first find AnB, then find A and C, and then perform an OR operation on both results. Therefore, three logical operations must be performed. In order to perform one logical operation, it is necessary to read the data at the transfer destination, perform the logical operation, and return it to the transfer destination.
If the memory cycle is 200ns, it takes 200x2+αns to perform one logical operation, which is divided into 3
(200 X2+α)X
This will require 3 ns time. In any case,
The problem is that the processing becomes extremely complex and time-consuming, making it difficult to keep up with the speeding up of image processing technology in recent years. Therefore, an object of the present invention is to provide an image data processing device and method that can transfer any complex area and perform complex calculations at high speed. [Means for Solving the Problem] The means for solving the problem described above embodies a ternary logical operation means, and when transferring an arbitrary area within a figure, transfer source data according to a logical operation code. , transfer destination data, and pattern data at high speed.

[For production]

According to the above-mentioned means, ternary logical operations are possible, the ternary logical operations are performed according to the logical operation code, and arbitrary area transfer can be performed at high speed. [Embodiment] FIG. 1 is a block circuit diagram showing an image data processing device according to the present invention. In FIG. 1, 1 is a main memory that stores transfer source data S, and 2 is a command/parameter memory that holds commands and parameters for the image processing processor 3 to perform processing. The image processor 3 takes in drawing commands (line drawing, clipping, etc.) and parameters (line drawing start point, end point, etc.) from the memory 2. 4 is a pattern memory that holds patterns (mask patterns);
This memory 4 may be installed inside the image processing processor 3. 5 is a graphic memory for holding information such as figures to be displayed on the CRT 6;
Accessed by the image processing processor 3. The main memory 1, command/parameter memory 2, and image processing processor 3 are commonly connected by a host address bus ABI and a host data bus DBI, and
The image processor 3, pattern memory 4, and graphic memory 5 are commonly connected by a graphic address bus AB2 and a graphic data bus DB2. FIG. 2 is a block circuit diagram showing details of the image processing processor of FIG. 1. In FIG. 2, 31 is an interface circuit that outputs a host address and data external to the image processing processor 3 to an internal address and data path, and 32 is a drawing unit for executing drawing commands (line drawing, clipping, etc.). Contains a ternary logic operation circuit. Further, 33 is an interface circuit between the graphic memory 5 and the image processing processor 3. FIG. 3 is a detailed block circuit diagram of the 3203-term logic operation circuit portion of the drawing unit shown in FIG. If the ternary logical operation function is designed using random logic, the circuit becomes more complex and the degree of integration decreases, resulting in longer delay times and higher manufacturing costs. Therefore, in Figure 3, P is used for logical operations.
The degree of integration is increased by using LA (programmable logic array). That is, 321 is a PLA for logical operations. In addition, the transfer source data register 32
2. The transfer destination data register 323 and the pattern data register 324 are registers for temporarily holding the transfer source data S, the transfer destination data D, and the pattern data P, respectively, and the operation result register 325 stores the operation results of the PLA 321. This is a register to temporarily hold the .

As shown in FIG. 4, the PLA 321 performs eight operations (=2') on 3-bit data P, S, and D, and these operations are performed using eight logical operation codes C. ~C,
Selected by . In other words, the logical formula for PLA321 is: Output O = (C0 ・Down ・Ding ・−II)−) + (C1
・Ding・Ding・D) + (Ct −Ding・S−″′rf) +(C,・Ding・S−D) +(C4 ・P・−S1・−Iff) +(C,・P・1S1・D) +(Cn・P−S−U) +(Cn・P−S−D) However, P is external pattern data, S is transfer source data,
D is the transfer destination data, C. is represented by a logical operation code. For example, 'S-1"."D-
Consider the case where transfer is performed only when the condition ``0'' is satisfied. By setting P so that only the part representing the inside of the area is ``0'' and setting the logical operation code to ``C2 = 1'', this can be done. [Effects of the Invention] As explained above, according to the present invention, it is possible to easily and quickly transfer area transfer areas.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram showing the image data processing Akaho←Jishite i device according to the present invention, FIG. 2 is a block circuit diagram showing details of the image processing processor shown in FIG. 1, and FIG. Figure 2 is a block circuit diagram showing details of the drawing unit, and Figure 4 is a logic circuit diagram of the PLA shown in Figure 3. l: Image processing processor, 321: Logical operation PLA,

Claims (1)

[Scope of Claims] 1. Take in data from the memory (5) which is the transfer destination in which the data to be subjected to logical operations is stored, and read the data from the memory (5) which is the transfer source in which the data and the data to be subjected to logical operations are stored.
1) In an image data processing device that performs a logical operation with the data taken in from the transfer destination and writes the data to the transfer destination again, the image data processing device includes a transfer source data register (322) that stores data from the transfer source, and a transfer source data register (322) that stores data from the transfer destination. A transfer destination data register (323) that stores data, and a pattern register (324) that can set any pattern.
), and a ternary logic operation means (321) that performs a ternary logic operation on data in the transfer source data register, the transfer destination data register, and the pattern register according to a logic operation code (C_n). An image data processing device characterized by: 2. Fetch the transfer destination data from the memory (5) which is the transfer destination where the data to be subjected to the logical operation is stored, and read it from the memory (1) which is the transfer source which stores the data and the data to be subjected to the logical operation. In an image data processing device that performs a logical operation with the transferred source data and writes to the transfer destination again, when transferring an arbitrary area of the transfer destination data, pattern data (P) representing the area is prepared. Then, the ternary logical operation of the transfer source data, the transfer destination data, and the pattern data is converted into a logical operation code (C_n).
An image data processing method characterized in that the image data processing method is performed according to the following.