JPH02196494A - Manufacture of printed wiring board for surface mounting - Google Patents
Manufacture of printed wiring board for surface mountingInfo
- Publication number
- JPH02196494A JPH02196494A JP1564889A JP1564889A JPH02196494A JP H02196494 A JPH02196494 A JP H02196494A JP 1564889 A JP1564889 A JP 1564889A JP 1564889 A JP1564889 A JP 1564889A JP H02196494 A JPH02196494 A JP H02196494A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- electro
- film
- exposed
- exposure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 239000000463 material Substances 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 14
- 238000004070 electrodeposition Methods 0.000 abstract description 13
- 229910052802 copper Inorganic materials 0.000 abstract description 10
- 239000010949 copper Substances 0.000 abstract description 10
- 239000011889 copper foil Substances 0.000 abstract description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 3
- 239000004593 Epoxy Substances 0.000 abstract description 2
- 239000011521 glass Substances 0.000 abstract description 2
- 238000007650 screen-printing Methods 0.000 abstract description 2
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000007747 plating Methods 0.000 description 6
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- 239000004115 Sodium Silicate Substances 0.000 description 1
- 125000000129 anionic group Chemical group 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- YPHMISFOHDHNIV-FSZOTQKASA-N cycloheximide Chemical compound C1[C@@H](C)C[C@H](C)C(=O)[C@@H]1[C@H](O)CC1CC(=O)NC(=O)C1 YPHMISFOHDHNIV-FSZOTQKASA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 239000013067 intermediate product Substances 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 235000011121 sodium hydroxide Nutrition 0.000 description 1
- 235000019795 sodium metasilicate Nutrition 0.000 description 1
- NTHWMYGWWRZVTN-UHFFFAOYSA-N sodium silicate Chemical compound [Na+].[Na+].[O-][Si]([O-])=O NTHWMYGWWRZVTN-UHFFFAOYSA-N 0.000 description 1
- 229910052911 sodium silicate Inorganic materials 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野〕
この発明は表面実装用プリント配線板の製造方法に関し
、さらに詳しく言えば、電着法(フォトED法)による
表面実装用スルーホールプリント配線板の製造方法に関
するものである。[Detailed Description of the Invention] (Industrial Application Field) This invention relates to a method for manufacturing a printed wiring board for surface mounting, and more specifically, a through-hole printed wiring board for surface mounting using an electrodeposition method (photo-ED method). The present invention relates to a manufacturing method.
フォトED法によると、まず、スルーホールの孔壁を含
めた全面に例えば銅メツキ層が形成された基板に電着法
にてポジタイプの感光性電着膜が形成される。ついで、
この電着膜に所定の回路パターンを有するポジタイプの
フィルムを介して紫外線(U V)が露光される。しか
るのち、露光された部分の電着膜が現像により除去され
るとともに、さらにその表面に露出された銅メツキ層お
よびその下地の銅箔がエツチングにより除去される。そ
して、残された電着膜が除去される。According to the photo-ED method, first, a positive type photosensitive electrodeposited film is formed by electrodeposition on a substrate on which, for example, a copper plating layer is formed on the entire surface including the walls of the through holes. Then,
This electrodeposited film is exposed to ultraviolet light (UV) through a positive type film having a predetermined circuit pattern. Thereafter, the exposed portion of the electrodeposited film is removed by development, and the copper plating layer exposed on the surface and the underlying copper foil are further removed by etching. Then, the remaining electrodeposited film is removed.
感光性電着膜は、ドライフィルムに比べて基板に対する
密着性がよいため、より高密度の配線パターンが形成さ
れるのであるが、他方において、次のような欠点がある
。A photosensitive electrodeposited film has better adhesion to a substrate than a dry film, so a higher density wiring pattern can be formed, but on the other hand, it has the following drawbacks.
すなわち、UV露光の際、フィルムのずれによりスルー
ホール内まで露光された場合、現像時に同スルーホール
内の電着膜が除去され、これが原囚でスルーホール断線
となることがある。That is, during UV exposure, if the inside of the through hole is exposed due to film shift, the electrodeposited film inside the through hole is removed during development, which may cause the through hole to break.
上記課題を解決するため、この発明においては、スルー
ホールを有し、かつ、同スルーホールの孔壁を含めた全
面に銅メツキ層などの導電性皮膜を備えた表面実装用基
板の上記スルーホール内に導電性インク材を充填したの
ち、上記基板に電着法にてポジタイプの感光性電着膜を
形成し、回電着膜に所定の回路パターンを有するポジタ
イプのフィルムを介して露光するとともに、露光された
部分の電着膜を除去してエツチングレジストパターンを
形成し、露光部分に露出された導電性皮膜をエツチング
にて除去したのち、上記電着膜を除去するようにしてい
る。In order to solve the above problems, the present invention provides a surface mounting substrate having a through hole and a conductive film such as a copper plating layer on the entire surface including the hole wall of the through hole. After filling the interior with a conductive ink material, a positive-type photosensitive electrodeposited film is formed on the substrate by electrodeposition, and the twice-electrodeposited film is exposed to light through a positive-type film having a predetermined circuit pattern. After removing the electrodeposited film in the exposed portion to form an etching resist pattern, and removing the conductive film exposed in the exposed portion by etching, the electrodeposited film is removed.
上記のように、電着膜の形成に先立って、スルーホール
内に導電性インク材を充填することにより、UV露光の
際、仮りにフィルムがずれたとしても、従来のようにス
ルーホール内の電着膜が露光されることはない、したが
って、スルーホール断線が防止されるとともに、ランド
レススルーホールをも簡単に製造することができる。As mentioned above, by filling the conductive ink material in the through holes prior to forming the electrodeposited film, even if the film shifts during UV exposure, the through holes will remain intact as before. The electrodeposited film is not exposed to light, so through-hole disconnection is prevented, and landless through-holes can be easily manufactured.
以下、この発明の実施例を添付図面を参照しながら詳細
に説明する。Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
まず、第1図に示されているように、銅箔厚18J11
、板厚1.0Hのガラスエポキシ両面銅張積層板1に孔
径0.4a+mのスルーホール2を穿設し、その孔壁を
含む積層板1の全面に銅メツキを施して厚さ25J!1
の銅メツキ層3を形成した。First, as shown in Figure 1, the copper foil thickness is 18J11.
A through hole 2 with a hole diameter of 0.4a+m was bored in a glass epoxy double-sided copper-clad laminate 1 with a thickness of 1.0H, and the entire surface of the laminate 1, including the hole wall, was copper plated to a thickness of 25J! 1
A copper plating layer 3 was formed.
つぎに、スルーホール2内に穴埋め用インク材として導
電性ペースト4(銀もしくはカーボンなどを微粒子状に
し、熱硬化性樹脂をバインダーポリマーとして分散させ
たもの1例えばタムラ化研■カーボロイドCLX−20
4)をスクリーン印刷にて充填し、180℃、15分間
で熱硬化させたのち、表面残在分をパフ(5600)研
磨にて除去した(第2図参照)。Next, a conductive paste 4 (silver or carbon made into fine particles and a thermosetting resin dispersed as a binder polymer 1) is used as a filling ink material in the through hole 2. For example, Tamura Kaken Carboroid CLX-20
4) was filled by screen printing and thermally cured at 180° C. for 15 minutes, and the remaining surface portion was removed by polishing with a puff (5600) (see Fig. 2).
そして、第3図に示されているように、カルボン酸樹脂
を有機アミンで中和し水分散させたアニオン型電着液(
H本ペイント■フォトED)’−1000)に浸漬させ
て電着塗装(50mA/dm”、25℃、2分)を行な
いポジタイプの電着膜5を形成したのち、流水にて電着
していない電着液を除去し、水切り後熱風乾燥機にて1
00℃、5分間で回電着膜4を硬化させた。As shown in Figure 3, an anionic electrodeposition solution (
After applying electrodeposition coating (50 mA/dm'', 25°C, 2 minutes) by dipping it in H-hon paint ■ Photo ED)'-1000) to form a positive type electrodeposition film 5, it was electrodeposited under running water. After removing the remaining electrodeposition liquid and draining the water, dry it in a hot air dryer.
The twice-electrodeposited film 4 was cured at 00° C. for 5 minutes.
続いて、第4図に示されているように、ポジタイプのパ
ターンフィルム6a、6bを電着層5上に真空密着させ
、UV露光機(オーク@HMW−680)にて積算光量
350+ij/aJの無光を行なったのち、1%メタケ
イ酸ソーダ30℃に1分間浸漬させ、露光部分を溶解除
去した(第5図参照)。Subsequently, as shown in FIG. 4, positive type pattern films 6a and 6b are vacuum-adhered onto the electrodeposited layer 5, and exposed to an integrated light amount of 350+ij/aJ using a UV exposure machine (Oak@HMW-680). After being exposed to no light, it was immersed in 1% sodium metasilicate at 30° C. for 1 minute to dissolve and remove the exposed portion (see FIG. 5).
しかるのち、比重40度、50℃の塩化第二鉄水溶液に
5分間浸漬させ、不要な銅メツキ層3およびド地の銅箔
を溶解除去しく第6図参照)、さらに3%苛性ソーダ5
0℃に2分間浸漬し、電着膜5を剥離除去して、第7図
に示されているようなスルーホールプリント配線板を製
造した。After that, it was immersed in a ferric chloride aqueous solution with a specific gravity of 40 degrees Celsius and 50 degrees Celsius for 5 minutes to dissolve and remove the unnecessary copper plating layer 3 and the copper foil on the ground (see Figure 6), and then immersed in 3% caustic soda 5.
The electrodeposited film 5 was peeled off by immersion at 0° C. for 2 minutes to produce a through-hole printed wiring board as shown in FIG.
このように、電着膜5を形成するに先立って、スルーホ
ール2を導電性インクにて・穴埋めすることにより、無
光の際、第4図に示されているように、例えば上方のフ
ィルム6aがずれた場合でも、従来のようにスルーホー
ル2内の電着膜が露光されないため、スルーホール断線
が防止される。したがって、スルーホール基板を高歩留
まりで製造することができるとともに、ランドレススル
ーホール基板の製造も可能となった。In this way, by filling the through holes 2 with conductive ink before forming the electrodeposited film 5, when there is no light, for example, as shown in FIG. Even if 6a is misaligned, the electrodeposited film within the through hole 2 is not exposed to light as in the conventional case, and thus through hole disconnection is prevented. Therefore, not only through-hole substrates can be manufactured with high yield, but also landless through-hole substrates can be manufactured.
第1図ないし第6図はこの発明の製造方法を説明するた
めの各工程における中間製品の断面図、第7図はこの発
明によって得られたプリント配線板の断面図である。
図中、1は両面銅張積層板、2はスルーホール、3は銅
メツキ層、4はインク(導電性ペースト)、5は電着膜
、6a、6bはフィルムである。
特許出願人 エルナー株式会社
代理人 弁理士 大 原 拓 也篤
図
蔦
図
第
図
→
一43’。
第
図
す
第
図
フ
第
図1 to 6 are cross-sectional views of intermediate products in each step for explaining the manufacturing method of the present invention, and FIG. 7 is a cross-sectional view of a printed wiring board obtained by the present invention. In the figure, 1 is a double-sided copper-clad laminate, 2 is a through hole, 3 is a copper plating layer, 4 is ink (conductive paste), 5 is an electrodeposited film, and 6a and 6b are films. Patent applicant: ELNA Co., Ltd. Agent, Patent attorney: Takuya Ohara Atsushi Ivy Diagram → 143'. fig. fig. fig. fig.
Claims (1)
壁を含めた全面に導電性皮膜を備えた表面実装用基板の
上記スルーホール内に導電性インク材を充填したのち、
上記基板にポジタイプの感光性電着膜を形成し、回電着
膜に所定の回路パターンを有するポジタイプのフィルム
を介して露光するとともに、露光された部分の電着膜を
除去してエッチングレジストパターンを形成し、露光部
分に露出された導電性皮膜をエッチングにて除去したの
ち、上記電着膜を除去することを特徴とする表面実装用
プリント配線板の製造方法。(1) After filling a conductive ink material into the through hole of a surface mounting board having a through hole and having a conductive film on the entire surface including the hole wall of the through hole,
A positive type photosensitive electrodeposited film is formed on the above substrate, and the second electrodeposited film is exposed to light through a positive type film having a predetermined circuit pattern, and the exposed part of the electrodeposited film is removed to create an etching resist pattern. 1. A method for manufacturing a printed wiring board for surface mounting, which comprises forming a conductive film exposed in exposed areas by etching, and then removing the electrodeposited film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1564889A JPH02196494A (en) | 1989-01-25 | 1989-01-25 | Manufacture of printed wiring board for surface mounting |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1564889A JPH02196494A (en) | 1989-01-25 | 1989-01-25 | Manufacture of printed wiring board for surface mounting |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02196494A true JPH02196494A (en) | 1990-08-03 |
Family
ID=11894540
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1564889A Pending JPH02196494A (en) | 1989-01-25 | 1989-01-25 | Manufacture of printed wiring board for surface mounting |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02196494A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0492496A (en) * | 1990-08-08 | 1992-03-25 | Hitachi Ltd | Manufacture of printed board and mounting method for electronic component |
JPH05243728A (en) * | 1991-12-27 | 1993-09-21 | Tokuyama Soda Co Ltd | Manufacture of circuit board |
US6376049B1 (en) | 1997-10-14 | 2002-04-23 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
CN106982512A (en) * | 2017-05-22 | 2017-07-25 | 博敏电子股份有限公司 | A kind of bad reworking method of circuit board finished product welding resistance consent |
-
1989
- 1989-01-25 JP JP1564889A patent/JPH02196494A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0492496A (en) * | 1990-08-08 | 1992-03-25 | Hitachi Ltd | Manufacture of printed board and mounting method for electronic component |
JPH05243728A (en) * | 1991-12-27 | 1993-09-21 | Tokuyama Soda Co Ltd | Manufacture of circuit board |
US6376049B1 (en) | 1997-10-14 | 2002-04-23 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
US6376052B1 (en) | 1997-10-14 | 2002-04-23 | Ibiden Co., Ltd. | Multilayer printed wiring board and its production process, resin composition for filling through-hole |
EP2015624A2 (en) | 1997-10-14 | 2009-01-14 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
USRE40947E1 (en) | 1997-10-14 | 2009-10-27 | Ibiden Co., Ltd. | Multilayer printed wiring board and its manufacturing method, and resin composition for filling through-hole |
CN106982512A (en) * | 2017-05-22 | 2017-07-25 | 博敏电子股份有限公司 | A kind of bad reworking method of circuit board finished product welding resistance consent |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4529477A (en) | Process for the manufacture of printed circuit boards | |
US6638690B1 (en) | Method for producing multi-layer circuits | |
CA1196731A (en) | Process and device for the manufacture of printed circuit boards | |
CN113133224A (en) | FPCB plate via hole selective plating process | |
JPH02196494A (en) | Manufacture of printed wiring board for surface mounting | |
JP4089198B2 (en) | Manufacturing method of substrate for semiconductor device | |
JPS58202589A (en) | Method of producing printed circuit board | |
JPH036880A (en) | Printed wiring board and manufacture thereof | |
CA2177708C (en) | Method of making a printed circuit board | |
JPH08186373A (en) | Manufacture of printed wiring board | |
JPH02196493A (en) | Manufacture of printed wiring board | |
JPH06177516A (en) | Manufacture of printed wiring board | |
JP2004218033A (en) | Etching product and etching method | |
JPH02174291A (en) | Manufacture of printed wiring board | |
JPS61139089A (en) | Manufacture of printed wiring board | |
JP2000156556A (en) | Method for forming resist layer on substrate having through hole part and production of printed wiring board | |
JP2723744B2 (en) | Manufacturing method of printed wiring board | |
JP2518249B2 (en) | Manufacturing method of through-hole substrate | |
JPH06318774A (en) | Manufacturing method of printed-wiring board | |
JPH04303990A (en) | Manufacture of printed wiring board | |
JPH04365392A (en) | Manufacture of printed wiring board | |
JPS6332991A (en) | Manufacture of printed wiring board | |
JPS6052087A (en) | Method of producing printed board | |
JPH0936519A (en) | Manufacture of printed wiring board | |
JPH08279673A (en) | Circuit board |