JPS6332991A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPS6332991A
JPS6332991A JP17508886A JP17508886A JPS6332991A JP S6332991 A JPS6332991 A JP S6332991A JP 17508886 A JP17508886 A JP 17508886A JP 17508886 A JP17508886 A JP 17508886A JP S6332991 A JPS6332991 A JP S6332991A
Authority
JP
Japan
Prior art keywords
substrate
resin paste
printed wiring
wiring board
conductive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17508886A
Other languages
Japanese (ja)
Inventor
修 平井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP17508886A priority Critical patent/JPS6332991A/en
Publication of JPS6332991A publication Critical patent/JPS6332991A/en
Pending legal-status Critical Current

Links

Landscapes

  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は印刷配線板の製造方法、特にスルーホールを有
するスルーホール印刷配線板の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a printed wiring board, and particularly to a method for manufacturing a through-hole printed wiring board having through holes.

[従来の技術] スルーホールを有する印刷配線板の従来の製造方法は次
のとおりでおる。すなわち、まず第2図(a)の如く、
基板1の表面おびスルーホール用孔3の内壁面にめっき
を施し、導電層2を形成する。
[Prior Art] A conventional method for manufacturing a printed wiring board having through holes is as follows. That is, first, as shown in Figure 2 (a),
The surface of the substrate 1 and the inner wall surface of the through-hole hole 3 are plated to form a conductive layer 2.

次に、基板1の孔3内にロールコータ−(図示省略)を
用いて樹脂ペースト4を充填した後、上下1対のスキー
ジ−(図示省略)を通して基板1の表面の樹脂ペースト
をかき取る(第2図(b))。
Next, after filling the holes 3 of the substrate 1 with the resin paste 4 using a roll coater (not shown), the resin paste on the surface of the substrate 1 is scraped off through a pair of upper and lower squeegees (not shown). Figure 2(b)).

次いで樹脂ペースト4を硬化させた後、基板1の表面の
樹脂ペースト4をパフ研摩機、ベルト研摩機等を用いて
研摩除去する(第2図(C))。次に第2図(d)の如
く、基板1の表面にエツチングレジスト層5を形成した
後、エツチングレジスト層5をエツチングマスクとして
導電層2の露出部分をエツチング除去する(第2図(e
))。次いで樹脂ペースト4およびエツチングレジスト
層5を剥離除去して所望の回路パターンを得るものであ
る。
Next, after hardening the resin paste 4, the resin paste 4 on the surface of the substrate 1 is removed by polishing using a puff polisher, a belt polisher, etc. (FIG. 2(C)). Next, as shown in FIG. 2(d), after forming an etching resist layer 5 on the surface of the substrate 1, the exposed portion of the conductive layer 2 is removed by etching using the etching resist layer 5 as an etching mask (see FIG. 2(e)).
)). Next, the resin paste 4 and the etching resist layer 5 are peeled off to obtain a desired circuit pattern.

(第2図(f))。(Figure 2(f)).

[発明が解決しようとする問題点] かかる従来方法によるスルーホール印刷配線板の製造方
法には、次のような欠点がおった。
[Problems to be Solved by the Invention] The conventional method for producing through-hole printed wiring boards has the following drawbacks.

(イ)樹脂ペースト4を硬化させた後、基板1の表面の
樹脂ペースト4をパフ研摩機あるいはベルト研摩機で研
摩除去する際に、パフおるいはベルトが局部的に摩耗し
ている場合には、基板1の表面の樹脂ペースト4が除去
されずに残ってしまうため、回路パターンにショートが
発生したり、銅残りが発生したりすることが多かった。
(a) After curing the resin paste 4, when removing the resin paste 4 on the surface of the substrate 1 by using a puff polisher or belt polisher, if the puff or belt is locally worn. Since the resin paste 4 on the surface of the substrate 1 is not removed and remains, short circuits often occur in the circuit pattern and copper remains.

これを防ぐため、パフあるいはベルト研摩部を2〜3連
で設けたり、パフあるいはベルトの番手を粗くして研摩
量を大きくする方法が行6われでいるが、この方法では
導電層2の研摩量も大きくなるため、孔3のコーナ一部
の導電層2のめっき厚が薄くなり、信頼性上問題であっ
た。
In order to prevent this, methods have been used to increase the amount of polishing by providing two or three puff or belt polishing sections or by making the puff or belt rougher. Since the amount also increases, the plating thickness of the conductive layer 2 at a part of the corner of the hole 3 becomes thinner, which poses a problem in terms of reliability.

(ロ)また別の方法として基板1の表面に付着する樹脂
ペースト4を極力少なくするために基板1の表面の樹脂
ペースト4をかき取るスキージ−を2〜3段設ける方法
も行なわれている。しかしながらスキージ−を2段、3
段と多くするに従がい、孔3内の樹脂ペースト4もかき
取られてしまうため、エツチングレジスト層5を形成す
る際に、孔3のコーナ一部分のエツチングレジスト層5
が薄くなったり、おるいは付着しなかったりする欠点が
あった。このため、孔3のコーナ一部分がエツチングで
くわれてしまい、歩留りの点からも、信頼性の点からも
問題であった。
(b) Another method is to provide two or three stages of squeegees for scraping off the resin paste 4 on the surface of the substrate 1 in order to minimize the amount of resin paste 4 adhering to the surface of the substrate 1. However, the squeegee can be used in two or three stages.
As the number of holes 3 increases, the resin paste 4 inside the holes 3 is also scraped off.
The disadvantages were that the coating became thin and the coating did not adhere. As a result, a portion of the corner of the hole 3 is etched away, which is a problem in terms of both yield and reliability.

本発明の目的はこのような従来の欠点を解消した印刷配
線基板の製造方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a printed wiring board that eliminates such conventional drawbacks.

[発明の従来技術に対する相違点] 上述した従来の印刷配線板の製造方法に対し、本発明は
基板の孔内に樹脂ペースト4を充填した後、基板1の表
面に付着する樹脂ペースト4を化学的に溶解除去すると
いう独創的な内容を有する。
[Differences between the invention and the prior art] In contrast to the above-described conventional printed wiring board manufacturing method, the present invention fills the holes in the substrate with the resin paste 4 and then chemically removes the resin paste 4 that adheres to the surface of the substrate 1. It has an original content of being dissolved and removed.

[問題点を解決するための手段] 本発明は孔の内壁および表面に導電層が形成されている
印刷配線基板の孔内に樹脂ペーストを充填した後、樹脂
ペーストを硬化させる工程と、基板表面の樹脂ペースト
を化学的に溶解除去する工程と、基板表面にエツチング
レジスト層を形成する工程と、エツチングレジスト層を
エツチングマスクとして導電層の露出部分を選択的にエ
ツチング除去する工程と、樹脂ペーストおよびエツチン
グレジスト層を除去する工程とを含むことを特徴とする
印刷配線板の製造方法である。
[Means for Solving the Problems] The present invention includes a step of filling a resin paste into a hole of a printed wiring board in which a conductive layer is formed on the inner wall and surface of the hole, and then hardening the resin paste, and a step of hardening the resin paste, and a step of chemically dissolving and removing the resin paste; a step of forming an etching resist layer on the substrate surface; a step of selectively etching away the exposed portion of the conductive layer using the etching resist layer as an etching mask; The method of manufacturing a printed wiring board is characterized in that it includes a step of removing an etching resist layer.

[実施例] 以下、本発明の実施例を第1図(a)〜IJ)を参照し
て説明する。
[Example] Hereinafter, an example of the present invention will be described with reference to FIGS. 1(a) to IJ).

(実施例1) まず、第1図(a)の如く、基板1の表面および孔3内
に銅めっきを施し、導電層2を形成する。
(Example 1) First, as shown in FIG. 1(a), the surface of the substrate 1 and the inside of the hole 3 are plated with copper to form the conductive layer 2.

次に第1図(b)の如く、アルカリ剥離型の樹脂ペース
ト4を、ロールコータ−(図示省略)を用いて孔3内に
充填し、上下1対のスキージ−で基板1の表面の樹脂ペ
ースト4をかき取った後、樹脂ペースト4を硬化させる
。樹脂ペースト4としては熱硬化型を用いても、紫外線
硬化型を用いてもよいが、紫外線硬化型を用いる場合に
は、孔3内の樹脂ペースト4を充分硬化させる必要があ
り、紫外線エネルギー量として1〜2J/cm2程度を
照射する。次いで、基板1を0.5〜2重量%の炭酸ナ
トリウム水溶液中に浸漬し、基板1の表面の樹脂ペース
ト4を溶解させながら、回転ブラシで除去し、その後、
塞板1の表面の炭酸ナトリウム水溶液を取り除くため、
充分に水洗処理を行なう(第1図(C))。あるいは別
の方法として、0.5〜2重量%の炭酸ナトリウム水溶
液に浸漬し、基板1の表面の樹脂ペーストを溶解した後
、基板1の両面に水をスプレーしながら溶解した樹脂ペ
ースト4を回転ブラシで除去する方法を用いてもよい。
Next, as shown in FIG. 1(b), an alkaline removable resin paste 4 is filled into the holes 3 using a roll coater (not shown), and a pair of upper and lower squeegees are used to coat the resin on the surface of the substrate 1. After scraping off the paste 4, the resin paste 4 is cured. As the resin paste 4, a thermosetting type or an ultraviolet curing type may be used, but when using an ultraviolet curing type, it is necessary to sufficiently harden the resin paste 4 in the hole 3, and the amount of ultraviolet energy irradiation of about 1 to 2 J/cm2. Next, the substrate 1 is immersed in a 0.5 to 2% by weight sodium carbonate aqueous solution, and the resin paste 4 on the surface of the substrate 1 is removed with a rotating brush while being dissolved.
In order to remove the sodium carbonate aqueous solution on the surface of the blocking plate 1,
Thoroughly wash with water (Fig. 1 (C)). Alternatively, as another method, after dissolving the resin paste on the surface of the substrate 1 by immersing it in a 0.5 to 2% by weight aqueous sodium carbonate solution, the dissolved resin paste 4 is rotated while spraying water on both sides of the substrate 1. A method of removing with a brush may also be used.

またアルカリとしては、炭酸ナトリウム以外のものを用
いてもよいが、基板1の表面にアルカリが残らないよう
充分な水洗処理あるいは中和水洗処理を行なう必要がめ
る。次に、基板1の表面をパフ研摩機あるいはベルト研
摩機で研摩した復、必要に応じて酸処理おるいはパーミ
ス研摩処理等を施して整面する(第1図(d))。次い
でスクリーン印刷法または液状レジスト、ドライフィル
ムフォトレジストを用いたフォト印刷法でエツチングレ
ジスト層5を塞板1の表面に形成する(第1図(e))
。ざらに第1図U)の如く、基板1の導電層の露出部分
をエツチング除去した後、エツチングレジスト層5およ
び樹脂ペースト4を剥離除去して所望の回路パターンを
得る(第1図(g))。
Further, as the alkali, something other than sodium carbonate may be used, but it is necessary to perform sufficient water washing or neutralizing water washing so that no alkali remains on the surface of the substrate 1. Next, the surface of the substrate 1 is polished using a puff polisher or a belt polisher, and if necessary, acid treatment or permice polishing treatment is performed to smooth the surface (FIG. 1(d)). Next, an etching resist layer 5 is formed on the surface of the closing plate 1 by a screen printing method or a photoprinting method using a liquid resist or a dry film photoresist (FIG. 1(e)).
. After removing the exposed portion of the conductive layer of the substrate 1 by etching, as roughly shown in FIG. 1(U), the etching resist layer 5 and the resin paste 4 are peeled off to obtain a desired circuit pattern (FIG. 1(g)). ).

(実施例2) まず第1図(a)の如く、基板1の表面および孔3内に
銅めっきを施し、導電層2を形成する。次に第1図(b
)の如く酸剥離型の樹脂ペースト4を、ロールコータ−
(図示省略〉を用いて孔3内に充填し、上下1対のスキ
ージ−で基板1の表面の樹脂ペースト4をかき取った後
、樹脂ペースト4を硬化させる。樹脂ペースト4として
は、実施例1と同様熱硬化型、紫外線硬化型どちらも使
用できる。次いで基板1を0.5〜2重量%の塩酸水溶
液中に浸漬し、基板1の表面の樹脂ペースト4を溶解さ
せながら回転ブラシで除去し、その俊、基板1の表面の
塩酸を取り除くため、充分に水洗処理を行なう(第1図
(C))。おるいは、0.5〜1重量%の塩酸水溶液中
に浸漬し、基板1の表面の樹脂ペーストを溶解した後、
基板1の両面に水をスプレーしながら溶解した樹脂ペー
スト4を回転ブラシで除去する方法を用いてもよい。ま
た酸としては塩酸以外のものを用いてもよいが、基板1
の表面に酸が残らないよう充分な水洗処理あるいは中和
水洗処理を行なう必要がある。次に基板1の表面をパフ
研摩機おるいはベルト研摩機で研摩した後必要に応じて
酸処理あるいはパーミス研摩処理等を施して整面する(
第1図(d))。次いで実施例1と同様に基板1の表面
にエツチングレジスト層5を形成しく第1図(e))、
基板1の導電層2の露出部分をエツチング除去しく第1
図(f))、エツチングレジスト層5および樹脂ペース
ト4を剥離除去して所望の回路パターンを得る(第1図
(g))。
(Example 2) First, as shown in FIG. 1(a), the surface of the substrate 1 and the inside of the hole 3 are plated with copper to form the conductive layer 2. Next, Figure 1 (b
) with a roll coater.
(not shown) is used to fill the holes 3, and after scraping off the resin paste 4 on the surface of the substrate 1 with a pair of upper and lower squeegees, the resin paste 4 is cured. Both the thermosetting type and the ultraviolet curing type can be used as in 1. Next, the substrate 1 is immersed in a 0.5 to 2% by weight hydrochloric acid aqueous solution, and the resin paste 4 on the surface of the substrate 1 is removed with a rotating brush while being dissolved. Then, in order to remove the hydrochloric acid on the surface of the substrate 1, thoroughly wash it with water (Fig. 1 (C)). After dissolving the resin paste on the surface of 1,
A method may be used in which the dissolved resin paste 4 is removed using a rotating brush while spraying water on both sides of the substrate 1. Furthermore, as the acid, other than hydrochloric acid may be used, but the substrate 1
It is necessary to perform sufficient water washing or neutralizing water washing so that no acid remains on the surface. Next, the surface of the substrate 1 is polished with a puff polisher or belt polisher, and then acid treatment or permice polishing treatment is performed as necessary to smooth the surface (
Figure 1(d)). Next, as in Example 1, an etching resist layer 5 is formed on the surface of the substrate 1 (FIG. 1(e)).
First, the exposed portion of the conductive layer 2 of the substrate 1 is removed by etching.
(FIG. 1(f)), the etching resist layer 5 and resin paste 4 are peeled off to obtain a desired circuit pattern (FIG. 1(g)).

[発明の効果] 以上の説明から明らかなように本発明によれば、基板の
表面の樹脂ペーストが確実に除去できるため、高歩留り
で低コストの印刷配線板が製造でき、さらに孔のコーナ
一部の保護が確実に行なえるため、高い信頼性を有する
印刷配線板が製造できる効果を有するものである。
[Effects of the Invention] As is clear from the above description, according to the present invention, the resin paste on the surface of the substrate can be reliably removed, so printed wiring boards can be manufactured at high yield and at low cost. Since the parts can be reliably protected, a highly reliable printed wiring board can be manufactured.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(a)は、本発明による印刷配線板の製
造方法の実施例を工程順に説明する断面図、第2図(a
)〜(f)は、従来例の印刷配線板の製造方法を工程順
に説明する断面図である。 1・・・印刷配線基板   2・・・導電層3・・・孔
        4・・・樹脂ペースト5・・・エツチ
ングレジスト層
FIGS. 1(a) to (a) are cross-sectional views explaining an embodiment of the method for manufacturing a printed wiring board according to the present invention in the order of steps, and FIG.
) to (f) are cross-sectional views illustrating a conventional method for manufacturing a printed wiring board in the order of steps. 1... Printed wiring board 2... Conductive layer 3... Hole 4... Resin paste 5... Etching resist layer

Claims (1)

【特許請求の範囲】[Claims] (1)孔の内壁および表面に導電層が形成されている印
刷配線基板の前記孔内に樹脂ペーストを充填した後、前
記樹脂ペーストを硬化させる工程と、前記基板表面の樹
脂ペーストを化学的に溶解除去する工程と、前記基板表
面にエッチングレジスト層を形成する工程と、エッチン
グレジスト層をエッチングマスクとして前記導電層の露
出部分を選択的にエッチング除去する工程と、前記樹脂
ペーストおよびエッチングレジスト層を剥離除去する工
程とを含むことを特徴とする印刷配線板の製造方法。
(1) Filling the holes of a printed wiring board with a conductive layer formed on the inner wall and surface of the hole, and then curing the resin paste, and chemically curing the resin paste on the surface of the substrate. a step of dissolving and removing the conductive layer; a step of forming an etching resist layer on the surface of the substrate; a step of selectively etching away the exposed portion of the conductive layer using the etching resist layer as an etching mask; and a step of removing the resin paste and the etching resist layer. A method for manufacturing a printed wiring board, comprising the step of peeling and removing.
JP17508886A 1986-07-25 1986-07-25 Manufacture of printed wiring board Pending JPS6332991A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17508886A JPS6332991A (en) 1986-07-25 1986-07-25 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17508886A JPS6332991A (en) 1986-07-25 1986-07-25 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JPS6332991A true JPS6332991A (en) 1988-02-12

Family

ID=15990036

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17508886A Pending JPS6332991A (en) 1986-07-25 1986-07-25 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPS6332991A (en)

Similar Documents

Publication Publication Date Title
US7169313B2 (en) Plating method for circuitized substrates
JP4089198B2 (en) Manufacturing method of substrate for semiconductor device
JPS6332991A (en) Manufacture of printed wiring board
JP3395222B2 (en) Manufacturing method of printed wiring board
JPH08186373A (en) Manufacture of printed wiring board
JPH0964538A (en) Production of printed wiring board
JP2713037B2 (en) Printed wiring board and manufacturing method thereof
JP2004218033A (en) Etching product and etching method
JP2723744B2 (en) Manufacturing method of printed wiring board
JPS61139089A (en) Manufacture of printed wiring board
JPH02196494A (en) Manufacture of printed wiring board for surface mounting
JPS6088494A (en) Method of producing circuit board
JP2518249B2 (en) Manufacturing method of through-hole substrate
JP2699757B2 (en) Manufacturing method of printed wiring board
JP3191686B2 (en) Manufacturing method of printed wiring board
JPH03268384A (en) Manufacture of wiring board provided with through hole
JP2000208904A (en) Manufacture of resist coat and cleaning liquid
JPS63131595A (en) Manufacture of printed wiring board
JPH07288372A (en) Manufacture of hybrid integrated circuit
JP2003037354A (en) Method of manufacturing printed wiring board
JPH02144988A (en) Manufacture of wiring board with through hole
JP2004179377A (en) Method of manufacturing printed wiring board
JPH0738497B2 (en) Method for manufacturing printed wiring board
JPH029195A (en) Manufacture of printed wiring board with throughhole
JPH10173315A (en) Printed-wiring board and manufacturing method thereof