JPH02181916A - Method of heat-treating semiconductor substrate - Google Patents

Abstract

PURPOSE:To obtain, with good reproducibility, a high-concentration and steep profile of a carrier concentration by a method wherein a speed to heat a semiconductor substrate by means of a short-time annealing method using an infrared lamp is made lower than a specific value. CONSTITUTION:When a semiconductor substrate is heat-treated by means of a short-time annealing method using an infrared lamp, a speed to heat the semiconductor substrate is made lower than 20 deg.C/sec. When the heating speed is made low, an annealing time becomes longer; accordingly, heat supplied to the substrate is increased; an activation rate is increased; a high-concentration profile can be obtained; a performance of a GaAs LSI can be made higher.

Description

[Detailed description of the invention] <Industrial application field> The present invention relates to a heat treatment method for a semiconductor substrate.

<Prior Art> Compound semiconductors, especially GaAs, have superior physical properties compared to Si, and therefore, research is currently being actively carried out to incorporate them into LSIs.

GaAs LSI uses as a basic device a MESFET made by ion-implanting Si into a semi-insulating GaAs substrate. In order to form a conductive layer using ion implantation technology, it is necessary to heat-treat the GaAs substrate at a high temperature of 800° C. or higher to electrically activate the implanted impurities. This heat treatment process requires the highest temperature among the GaAs LSI manufacturing processes, and it is important to establish an optimized heat treatment technology in order to achieve high performance and high yield of GaAs LSI0.

A heat treatment method currently widely used in manufacturing GaAs LSIs is a method using a resistance heating type electric furnace. This technology was originally developed as a Si process, and has excellent process stability and uniformity. However, in this method, the shortest controllable heat treatment time is limited to several minutes to several tens of minutes due to the large heat capacity of the apparatus. Unnecessarily long heat treatment time promotes vertical and lateral thermal diffusion of implanted impurities and interaction between the refractory gate metal and GaAs. GaAs LSI
.

This becomes an obstacle in achieving higher performance and larger scale.

In order to solve these problems, a rapid thermal annealing method using an infrared lamp has been developed.
neal (hereinafter referred to as RTA) is attracting attention.

In RTA, a lamp heat source for heating the substrate is used under a highly accurate temperature control system, making it possible to control the annealing time in seconds. Therefore, compared to heat treatment in an electric furnace, thermal diffusion is suppressed and a steep impurity distribution can be obtained. It has such excellent characteristics that it can lead to higher performance of GaAs LSI.

However, since RTA is characterized by a rapid temperature increase/decrease process of the substrate temperature, a thermal equilibrium relationship is not established between the GaAS substrate and the atmospheric gas, and temperature non-uniformity is likely to occur within the substrate surface. Temperature non-uniformity within the substrate surface not only causes variations in the activation rate of implanted impurities, but also causes slip lines and substrate warping.

Generally, when heat-treating a GaAS substrate by RTA, as shown in FIG. 1, the GaAs substrate 11 is sandwiched between susceptors 12 and 13 such as S2 substrates having a larger diameter than the GaAs substrate 11 and heated. At this time, the causes of temperature non-uniformity within the GaAs substrate 11 are: (1) heat radiation from the end of the GaAs substrate 11; (2) differences in heat capacity per unit area within the surface of the susceptor 3 for supporting GaAs. (2) is a phenomenon in which the temperature of the peripheral portion of the substrate becomes lower than that of the central portion due to heat radiation from the end of the GaAs board 11. On the other hand, ■ is a phenomenon in which the temperature difference between the central part of the susceptor 12.13 covered with the GaAs substrate 11 and the peripheral part that is not covered due to the difference in heat capacity changes the temperature difference in the peripheral part of the GaAs substrate 11. be. These causes can be controlled to some extent by arranging a donut-shaped guard ring 14 as shown in FIG. 3 around the GaAs substrate 11 between the susceptors 12 and 13.

<Problem to be solved by the invention> However, this guard ring method is not a solution based on a quantitative understanding of heat transfer, but a solution based on the above qualitative understanding, and therefore, reproducibility is poor. Poor. In other words, various conditions that must be quantitatively clarified, such as the optimal guard ring material and shape, positional relationship with the GaAs substrate, and correspondence with annealing conditions, cannot be determined with good reproducibility.
This problem is hindering the practical application of RTA.

Means for Solving the Problems> The present invention has been made to solve the above-mentioned problems, and is aimed at reducing the heating rate of a semiconductor substrate when heat-treating the semiconductor substrate using a short-time annealing method using an infrared lamp. The present invention provides a method for heat-treating a semiconductor substrate at a temperature lower than 20° C. per second.

<Function> The advantage of RTA is that the heat treatment is performed in a short time by increasing and decreasing the temperature, but there are also problems such as the occurrence of slip lines. However, this problem arises because conventional RTA is too conscious of high-speed heat treatment, so the heating rate is set too fast (8
This is thought to be caused by the failure of a thermal equilibrium relationship between the GaAs substrate, the susceptor, and the atmospheric gas.

Therefore, if the heating rate is lowered to a degree that does not impair the advantages of RTA, 7 anneals can be performed in a state closer to thermal equilibrium, without causing problems such as the generation of slip lines.
It can perform annealing superior to electric furnace annealing.

<Example> Hereinafter, the present invention will be explained in detail with reference to the drawings. S1+ was applied to a semi-insulating GaAs substrate at 50keV4X10.
cm After ion implantation, Ueno 1 was divided into three parts and annealed.

FIG. 1 shows the positional relationship between the GaAs substrate 11 and the susceptors 12 and 13 when performing RTA. A with low vapor pressure
This was provided to prevent the s from falling out. The susceptor 12 may be omitted depending on the structure of the annealing apparatus. Further, the susceptor 13 may be omitted when the surface of the GaAs substrate 11 is protected with silicon nitride or the like.

Furthermore, the guard link 14 used in the prior art shown in FIG. 3 is not used.

Sample 1: The surface was protected with a silicon nitride film by conventional electric furnace annealing (p-CV), and annealed at 850°C in an N2 atmosphere.
Annealing was performed at ℃ for 15 minutes. ) Sample 2: Conventional RTA (heating rate: 80/s (°C)
Temperature = 800°C Time: 2 seconds) Sample 3: RTA of the present invention (heating rate: 10/s Temperature:
(SOO°C time = 10 seconds) Figure 2 shows the carrier concentration profiles of samples 1 and 2°3 determined by CV measurement. Compared to the profile of sample 1, samples 2 and 3 have shallower and steeper profiles, and in RTA, Ga
It can be seen that As LSI can improve performance.

In addition, the RTA of the present invention (sample 3) has a higher concentration profile than the conventional RTA (sample 2), and Ga
As LSI can achieve even higher performance.

The reason for this is that the annealing time becomes longer due to the lower heating rate, which increases the amount of heat supplied to the GaAs substrate and increases the activation rate.

Furthermore, since the guard link 14 was not used in Samples 1 to 3, a slip line occurred in Sample 2 (conventional PTA) with a fast heating rate, but in Sample 3 (RTA of the present invention) with a low heating rate. No slip lines occurred at all. In the present invention, slip lines are suppressed by optimizing annealing conditions (heating rate, temperature, time, etc.) that can be controlled with high precision by a program, so reproducibility is significantly improved compared to the guard ring method.

Further, in this example, the heating rate was set to IOK/s, but as a result of experiments, it was found that the same effect can be obtained up to 20 IOK/s. That is, the upper limit of the heating rate is considered to be about 20/s. Regarding the lower limit, if the heating rate is too low, R
Since the advantage of TA disappears, /s is considered to be optimal for IOK/s to 20.

So far, the description has been limited to GaAs substrates, but in the RTA of the present invention, other compound semiconductor substrates and Si
It is clear that it can be applied to substrates as well.0 <Effects of the Invention> As detailed above, by performing RTA at a heating rate of 20°C per second, a higher concentration can be achieved compared to RTA using a conventional guard ring. A steep carrier concentration profile can be obtained with good reproducibility.

[Brief Description of the Drawings] Fig. 1 is a schematic diagram showing the positional relationship between the susceptor and the semiconductor substrate when performing RTA of the present invention, Fig. 2 is a carrier concentration profile diagram showing the difference from the conventional technology, and Fig. 3 O is a schematic diagram showing the positional relationship between a susceptor and a semiconductor substrate when performing RTA in the conventional technology.

Claims (1)

[Claims] 1. A method for heat treatment of a semiconductor substrate, characterized in that when the semiconductor substrate is heat treated using a short-time annealing method using an infrared lamp, the rate of heating the semiconductor substrate is lower than 20° C. per second.