JP2758770B2 - Jig for heat treatment of semiconductor substrate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a jig for heat treating a semiconductor substrate used for heat treating a semiconductor substrate.

[0002]

2. Description of the Related Art Compound semiconductors, especially GaAs, have excellent physical properties as compared with Si. For this reason, research on LSI (Large Scale Integrated Circuit) is currently being actively conducted. GaAs-LSIs are usually fabricated on a semi-insulating GaAs substrate
Is used as a basic device.

As described above, in order to form a conductive layer on a GaAs substrate using an ion implantation technique, the GaAs substrate after the above-described ion implantation is subjected to a heat treatment at a high temperature of 800 ° C. or more, so that the implanted impurities are electrically charged. Must be activated. Since this heat treatment step requires the highest temperature among the GaAs-LSI manufacturing steps, it is important to establish an optimized heat treatment technique in order to improve the performance and yield of the GaAs-LSI.

A heat treatment method widely used at present in GaAs-LSI manufacturing is a method using a resistance heating type electric furnace. This technique is originally cultivated in a process using a Si substrate, and a process using this technology is excellent in stability / uniformity. However,
In the above heat treatment method, the heat capacity of the device is large,
The controllable minimum heat treatment time is limited to several minutes to several tens of minutes. Such an unnecessarily long heat treatment time causes thermal diffusion of implanted impurities in the vertical / horizontal direction, promotes an interaction between the refractory gate metal and GaAs, and the like.
-Obstacles in achieving higher performance and larger scale of LSI.

Therefore, in order to solve the above-mentioned problem, short-time annealing using an infrared lamp (hereinafter referred to as RT
A) has been proposed and attracted attention. This R
In the TA method, since the lamp heat source for heating the substrate is used under a high-precision temperature control system, it is possible to control the annealing period in seconds. Therefore, there is an excellent feature that thermal diffusion is suppressed as compared with the heat treatment using an electric furnace, and a steep impurity distribution is obtained. Therefore, according to the RTA method, the performance of the GaAs-LSI can be improved.

However, the RTA method is characterized by having a rapid temperature rise / fall process of the substrate temperature, so that a thermal parallel relationship is not established between the GaAs substrate and the atmospheric gas, and the temperature in the substrate surface is low. Is likely to occur. Such non-uniform temperature in the plane of the substrate not only varies the activation rate of the implanted impurities, but also causes slip lines and warpage of the substrate.

The causes of the temperature non-uniformity in the GaAs substrate include the following. Heat radiation from the edge of the GaAs substrate Difference in heat capacity per unit in the plane of the susceptor for supporting GaAs (Si substrate, etc.) Note that the heat radiation from the edge of the GaAs substrate lowers the temperature of the peripheral portion of the substrate from the central portion Responsible. On the other hand, this is because a difference in heat capacity between the central portion of the susceptor covered with the GaAs substrate and the peripheral portion of the susceptor not covered causes a temperature difference between the two portions.

Therefore, if the thermal environment around the GaAs wafer is made the same, no slip line or substrate warpage occurs. Therefore, for example, as shown in FIG. 5, a method is used in which a GaAs wafer 22 is placed in a graphite susceptor 21 coated with SiC and RTA is performed (eg, SJ Parton et al. Heat Annealing of GaAs at High Temperature-Comparison with Direct Annealing
GaA sin a graphite susceptor-comparison with pro
ximity annealing) ", American Journal of Applied Physics (J. Appl.
hys.) 66, no.2, (1989), etc.).

The occurrence of the slip line can be controlled to some extent by surrounding the GaAs substrate 32 supported on the Si substrate 31 with a donut-shaped guard link 33 as shown in FIG. For example, Tamura et al., “Infrared Rapid Thermal Annealing of Io-implanted 2 inch high quality wafer
n-Implanted 2-inch GaAs Wafers with Very High Qu
quality) ", Semi-insulating III-V material
Materials), pp255, 1986, etc.).

[0010]

The above two methods have the effect of suppressing the occurrence of slip lines, but have the following problems.

The method using the graphite jig 21 shown in FIG. 5 has a problem in that the graphite itself absorbs infrared rays, so that the overall heat capacity becomes large and heating cannot be performed too quickly. In this case, as shown in FIG. 7, the faster the heating rate, the better the electrical characteristics of the GaAs substrate after RTA (Nakakawa et al., “Effect of heating rate on GaAs n-type layer formation”, 36th application. The Physical Society of Japan, 3p-V-3 / III, 1989)
Therefore, the merit of performing the RTA is reduced.

Further, the method using a donut-shaped guard link 33 as shown in FIG. 6 is not a method based on a quantitative understanding of heat transfer but a solution for slip line generation based on a qualitative understanding. Therefore, reproducibility is poor. That is, the optimal guard ring material and shape, Ga
There is a problem that various conditions that must be quantitatively clarified, such as the positional relationship with the As substrate and the correspondence with the annealing conditions, cannot be determined with good reproducibility.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a jig for heat treating a semiconductor substrate which enables RTA at a high heating rate.

[0014]

According to a first aspect of the present invention, there is provided a jig for heat treatment of a semiconductor substrate comprising a box for accommodating a semiconductor substrate and a lid, the jig for heat treatment of a semiconductor substrate used for RTA. A tool, wherein the box and the lid are formed of sapphire.

The jig for heat treating a semiconductor substrate of the second invention is the jig for heat treatment of a semiconductor substrate of the first invention,
A single crystal semiconductor thin film is formed on a peripheral portion including a side wall of the box.

[0016]

According to the first aspect of the present invention, the semiconductor substrate heat treatment jig comprising a box for housing the semiconductor substrate and a lid is made of sapphire having substantially the same thermal properties as GaAs and transmitting infrared rays. Therefore, when RTA is performed using this jig for heat treatment of a semiconductor substrate, the semiconductor substrate is directly heated by infrared rays transmitted through the jig for heat treatment of a semiconductor substrate, and the temperature is rapidly raised. Further, by using a GaAs substrate as the semiconductor substrate, the thermal environment around the semiconductor substrate becomes substantially the same. In this way, RTA is easily implemented without the occurrence of slip lines.

In the second invention, a single-crystal semiconductor thin film is formed on at least the upper surface of the side wall of the box. Therefore, when performing the RTA, the peripheral portion including the side wall is heated by the infrared ray absorbed by the single crystal semiconductor thin film, and the temperature distribution in the thickness direction of the peripheral portion disappears. In this way, the thermal environment around the semiconductor substrate becomes further the same, and the occurrence of slip lines is further suppressed.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments. From the above-mentioned conventional problems, the RTA of GaAs
The necessary conditions for the material of the jig include: 1) transmission of infrared rays; and 2) thermal properties that are substantially the same as those of GaAs.

Table 1 shows the thermal properties of GaAs, sapphire, SiO ₂ (quartz) and Si. FIG. 8 shows the light transmission characteristics of SiO ₂ and sapphire.

[Table 1]

As can be seen from Table 1 and FIG. 8, sapphire transmits infrared rays almost as much as quartz glass and has thermal properties substantially equal to GaAs. In other words, sapphire is Ga
It satisfies the above-mentioned requirements for the RTA jig of As and can be said to be excellent as a material of the RTA jig of GaAs. Therefore, in this embodiment, sapphire is used as a jig for RTA of GaAs.

FIGS. 1 and 2 are views showing a jig for heat treatment of a semiconductor substrate (hereinafter, simply referred to as a jig) formed of sapphire in this embodiment. FIG. 1 shows a box for housing the semiconductor substrate in the jig, and FIG. 2 shows a lid in the jig.

The box is shown in plan view in FIG. 1 (a) and in FIG. 1 (b).
Has a chamber 3 for accommodating a semiconductor substrate in the center as shown in the sectional view of FIG. Also, the width d for forming the chamber 3
The upper surface of the side wall 4 having a plurality of protrusions 5,
5, ... are provided. The lid has a circular shape as shown in the plan view of FIG. 2 (a) and the cross-sectional view of FIG. 2 (b), and has a plurality of holes 6 at its peripheral portion at the same predetermined intervals as the protrusions 5, 5,. , 6, ... are provided. When the cover 1 covers the box 1, the holes 6.6... Fit into the projections 5.5... Of the box 1. Avoid slipping.

The jig is made of sapphire. As described above, since sapphire transmits infrared rays, it does not absorb infrared rays and rise in temperature (that is, it is not directly heated by infrared rays). Therefore, when the GaAs substrate is stored in the chamber 3 of the jig and heated by infrared rays with the lid 2 covered, only the stored GaAs substrate absorbs the infrared rays and is heated. In other words, after the temperature of the jig itself rises as in the case of the conventional graphite jig, the Ga stored by the heat conduction from the jig is removed.
The temperature of the GaAs substrate rises first, not the temperature of the As substrate.

This means that the GaAs substrate can be rapidly heated with a small amount of heat, and the electrical characteristics of the GaAs substrate after RTA can be improved.

Further, as the stored GaAs substrate is heated, the jig is heated by conduction heat from the GaAs substrate, and the temperature rises. At that time, as described above, GaAs
Since sapphire and sapphire have substantially the same thermal properties, the thermal environment around the GaAs substrate eventually becomes substantially equal to that of the GaAs substrate. Therefore, no slip line or substrate warpage occurs.

In the jig having the above structure, only the GaAs substrate absorbs infrared rays. Therefore, the temperature of the jig rises mainly on the side wall 4 of the box 1 which is easily susceptible to the heat radiated from the end face of the housed GaAs substrate. Therefore, when the dimension of the width d of the side wall 4 is too large,
The temperature distribution is generated in the radial direction of the side wall 4 and the temperature becomes non-uniform in the GaAs substrate surface. In that case, G
A slip line is generated on the aAs substrate, and in a severe case, the jig is broken. In order to avoid such a situation, the width d of the side wall 4 may be set to 5 mm or less.

Thus, in the above embodiment, Ga
A jig for heat-treating a semiconductor substrate, comprising a box 1 having a chamber 3 for accommodating an As substrate, a box 1 having a side wall 4 forming the chamber 3 and a lid 2 covering the box 1, is formed of sapphire that transmits infrared rays. I have. Therefore, the GaAs substrate housed in the jig is heated by the infrared rays transmitted through the jig prior to the jig. That is, the use of this jig makes it possible to carry out RTA at a high heating rate. The jig is made of sapphire having substantially the same thermal properties as GaAs. Therefore, the thermal environment around the GaAs substrate housed in the jig can be made the same, and the occurrence of slip lines and the warpage of the GaAs substrate can be prevented.

As described above, when the width d of the side wall 4 of the box 1 is larger than 5 mm, the jig in the above embodiment is Ga.
A slip line may be generated on the As substrate or the jig may be broken. Therefore, the jig in the present embodiment improves the above-mentioned problem.

FIG. 3A shows a jig box 11 of the jig according to the present embodiment.
FIG. This box 11 basically has a structure in which a single crystal semiconductor thin film is formed on the upper surface of the side wall 4 of the box 1 in the above embodiment. That is, a chamber 13 for accommodating a GaAs substrate is provided at the center of the box 11, and a single-crystal Si thin film 17 is grown on the upper surface of the side wall 14 forming the chamber 3. On the single crystal Si thin film 17, a plurality of projections 15, 15,... Are provided at predetermined intervals.

The single crystal Si thin film 17 is formed by a so-called silicon-on-sapphire (SOS) technique or the like. Specifically, after the single crystal Si is grown on the entire surface of the sapphire substrate, unnecessary portions of Si are removed by dry etching using a resist mask and a CF ₄ -based gas.

FIG. 3B is a cross-sectional view when RTA is performed on the semiconductor substrate by the jig. In this case, the single-crystal Si thin film 17 on the side wall 14 of the case 11 absorbs infrared rays transmitted through the sapphire lid 12 and generates heat. Therefore, unlike the above embodiment, the temperature distribution in the radial direction does not occur on the side wall 14 and the GaAs substrate 1
8 The same thermal environment can be used. As a result, the width of the side wall 14 of the jig in this embodiment can be made 5 mm or more, and the dimensional restriction of the jig is reduced. When the single crystal Si thin film 17 is formed by the SOS technique, impurities (B (boron), P (phosphorus), As (arsenic), etc.) that can supply carriers to the single crystal Si are doped at an arbitrary concentration. May be. In such a case, the GaAs substrate is heated at a higher speed in consideration of the temperature rise due to the light absorption of the free carriers, so that it is possible to cope with a higher-speed RTA.

In another embodiment, as shown in FIG. 4, a single-crystal semiconductor thin film 19 is also grown around the bottom surface of the box 11 of the jig of the embodiment shown in FIG. By doing so, the temperature distribution in the depth direction of the side wall 14 can be reduced. Further, in another embodiment, a GaAs thin film is grown on the single-crystal Si thin films 17 and 19 in FIG. According to this jig, the periphery of the box chamber is surrounded by GaAs. Therefore, when the semiconductor substrate to be housed is a GaAs substrate, Ga
The periphery of the As substrate will be surrounded by GaAs, and the thermal environment will be the same. Therefore, according to the present embodiment, it is possible to provide a jig most suitable for performing the RTA on the GaAs substrate.

In each of the above embodiments, the GaAs substrate is used as the semiconductor substrate to be heated by the jig. However, it does not matter if another semiconductor substrate is heated. However, it goes without saying that a semiconductor substrate having thermal properties closer to sapphire can exhibit the effect of preventing the generation of slip lines and the warpage of the substrate.

[0034]

As is apparent from the above description, the jig for heat treating a semiconductor substrate of the first invention has a housing and a lid which constitute the jig for heat treatment of a semiconductor substrate formed of sapphire. Transmit without absorbing infrared rays.
Therefore, the semiconductor substrate housed in the box is directly heated by the infrared rays from the infrared lamp. That is, according to the present invention, RTA with a high heating rate
Becomes possible. Further, since the sapphire has substantially the same thermal properties as GaAs, when a GaAs substrate is used as the semiconductor substrate for the RTA, the thermal environment of the semiconductor substrate can be made substantially the same, and the generation of slip lines can be suppressed. .

In the jig for heat treatment of a semiconductor substrate according to the second aspect of the present invention, since the single crystal semiconductor film is formed on the peripheral portion including the side wall of the box, the single crystal semiconductor film absorbs infrared rays from an infrared lamp. As a result, the temperature distribution in the width direction of the peripheral portion can be eliminated. Therefore, according to the present invention, it is possible to further suppress the occurrence of slip lines by making the thermal environment of the semiconductor substrate the same.

[Brief description of the drawings]

FIG. 1 is a view showing a box of one embodiment of a jig for heat treating a semiconductor substrate of the present invention.

FIG. 2 is a view showing a lid that covers the box of FIG. 1;

FIG. 3 is an explanatory diagram of an embodiment different from FIGS. 1 and 2;

FIG. 4 is a sectional view of a box of an embodiment different from FIGS. 1, 2 and 3;

FIG. 5 is an explanatory view of RTA using a graphite jig.

FIG. 6 is an explanatory diagram of an RTA using a donut-shaped guard link.

FIG. 7 is a diagram showing the influence of the heating rate on the electrical characteristics of the GaAs n-type layer.

FIG. 8 is a diagram showing light transmission characteristics of sapphire and SiO ₂ .

[Explanation of symbols]

1,11 ... box, 2,12 ... lid,
3,13 chamber, 4,14 side wall, 17,19 single crystal Si thin film.

──────────────────────────────────────────────────の Continued on front page (51) Int.Cl. ⁶ Identification code FI H01L 21/26 Q

Claims (2)

(57) [Claims] 1. A jig for heat treatment of a semiconductor substrate, comprising a box for accommodating a semiconductor substrate and a lid and used in a short-time annealing method using an infrared lamp, wherein the box and the lid are formed of sapphire. A jig for heat treating a semiconductor substrate. 2. The jig for heat treatment of a semiconductor substrate according to claim 1, wherein a single crystal semiconductor thin film is formed on a peripheral portion of the box including a side wall.