JPH05243171A - Semiconductor substrate heat treatment jig - Google Patents

Abstract

PURPOSE:To provide a semiconductor substrate heat jig which is capable of carrying out an RTA process at a high heating speed. CONSTITUTION:A case 1 is made of sapphire. Semiconductor substrates such as GaAs substrates or the like are housed in the room 3 of the case 1. Holes bored in a sapphire lid placed on a side wall 4 which forms the room 3 are fitted to projections 5, 5,... provided onto the side wall 4 to prevent the lid from deviating from the side wall 4. As mentioned above, a semiconductor substrate thermal treatment jig is formed of sapphire which can transmit infrared rays and has almost the same thermal properties with GaAs and heats the GaAs substrates at a high speed and keeps a thermal environment around the GaAs substrates equal, whereby a semiconductor substrate heat jig capable of carrying out an RTA process at a high heating speed can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate heat treatment jig used for heat treating a semiconductor substrate.

[0002]

2. Description of the Related Art Compound semiconductors, especially GaAs, have superior physical properties to Si. Therefore, research into LSI (large-scale integrated circuit) is currently being actively conducted. A GaAs-LSI is usually formed on a semi-insulating GaAs substrate with Si.
A metal semiconductor field effect transistor produced by ion implantation is used as a basic device.

As described above, in order to form the conductive layer on the GaAs substrate by using the ion implantation technique, the GaAs substrate after the ion implantation is heat-treated at a high temperature of 800 ° C. or higher to electrically remove the implanted impurities. Need to be activated. Since this heat treatment process requires the highest temperature in the GaAs-LSI manufacturing process, it is important to establish an optimized heat treatment technique in order to improve the performance and yield of the GaAs-LSI.

The heat treatment method which is currently widely used in the production of GaAs-LSI is a method using a resistance heating type electric furnace. This technique has been originally cultivated in the process using the Si substrate, and the process using this technique is excellent in stability / uniformity. However,
In the above heat treatment method, since the heat capacity of the device is large,
The controllable minimum heat treatment time is limited to several minutes to several tens of minutes. Such an unnecessarily long heat treatment time causes thermal diffusion in the vertical / horizontal direction of implanted impurities and promotes mutual reaction between the heat-resistant gate metal and GaAs.
-It becomes an obstacle in achieving high performance and large scale of the LSI.

Therefore, in order to solve the above problems, short-time annealing using an infrared lamp (hereinafter referred to as RT
The method (abbreviated as A) has been proposed and is drawing attention. This R
In the TA method, the lamp heat source for heating the substrate is used under a highly accurate temperature control system, so that the annealing period can be controlled in seconds. Therefore, there is an excellent feature that thermal diffusion is suppressed and a steep impurity distribution is obtained as compared with the heat treatment using an electric furnace. Therefore, the RTA method can improve the performance of the GaAs-LSI.

However, since the RTA method is characterized by having a rapid temperature rising / falling process of the substrate temperature, a thermal parallel relationship cannot be established between the GaAs substrate and the atmosphere gas, and the temperature within the substrate surface is not maintained. Is likely to occur. Such non-uniformity of temperature within the substrate surface not only causes the activation rate of the implanted impurities to vary, but also causes slip lines and substrate warpage.

The causes of the nonuniform temperature in the GaAs substrate are as follows. Heat radiation from GaAs substrate edge Difference in heat capacity per unit in GaAs supporting susceptor (Si substrate, etc.) due to heat radiation from GaAs substrate edge lowering the temperature around the substrate than the central portion. Responsible. On the other hand, (1) is the cause of a difference in temperature between the central part of the susceptor covered with the GaAs substrate and the peripheral part of the susceptor not covered by the difference in heat capacity.

Therefore, if the thermal environment around the GaAs wafer is kept the same, slip lines and warpage of the substrate will not occur. Therefore, for example, as shown in FIG. 5, a method is used in which a GaAs wafer 22 is put in a graphite susceptor 21 coated with SiC and RTA is performed (for example, SJ Parton et al. Rapid Annealing of GaAs in GaAs-Comparison with Direct Annealing (Rapid thermal annealing of
Gaas a graphite susceptor-comparison with pro
ximity annealing) ", American Society of Applied Physics (J. Appl. P
hys.) 66, no.2, (1989) etc.).

The occurrence of the slip line can be controlled to some extent by surrounding the GaAs substrate 32 supported on the Si substrate 31 with a donut-shaped guard link 33 as shown in FIG. 6 ( For example, Tamura et al. “Infrared Rapid Thermal Annealing of Io 2 inch High Quality Wafer”
n-Implanted 2-inch GaAs Wafers with Very High Qu
”), Semi-insulating III-V material
Materials), pp255, 1986).

[0010]

The above two methods have the effect of suppressing the occurrence of slip lines, but on the other hand, they also have the following problems.

The method using the graphite jig 21 shown in FIG. 5 has a problem in that the graphite itself absorbs infrared rays, so that the entire heat capacity becomes large and heating cannot be performed very quickly. In this case, as shown in FIG. 7, the faster the heating rate, the better the electrical characteristics of the GaAs substrate after RTA (Nakagawa et al., "Effect of heating rate on GaAs n-type layer formation", 36th application. (The Physical Society of Japan, 3p-V-3 / III, 1989)
Therefore, the merit of performing the RTA is reduced.

The method using the donut-shaped guard link 33 as shown in FIG. 6 is not a method for quantitatively understanding heat transfer but a solution for slip line generation based on qualitative understanding. Therefore, the reproducibility is poor. That is, the optimum guard ring material and shape, Ga
There is a problem that various conditions that must be quantitatively clarified, such as the positional relationship with the As substrate and the correspondence with the annealing conditions, cannot be determined with good reproducibility.

Therefore, an object of the present invention is to provide a jig for heat treatment of a semiconductor substrate which enables RTA at a high heating rate.

[0014]

In order to achieve the above object, a jig for semiconductor substrate heat treatment of the first invention comprises a box for housing a semiconductor substrate and a lid, and a semiconductor substrate heat treatment jig used for RTA. A tool, characterized in that the box and lid are made of sapphire.

A jig for heat treating a semiconductor substrate according to a second aspect of the present invention is the jig for heat treating a semiconductor substrate according to the first aspect of the present invention.
It is characterized in that a single crystal semiconductor thin film is formed on the peripheral portion including the side wall of the box.

[0016]

According to the first aspect of the invention, the jig for heat-treating the semiconductor substrate, which is composed of the box for housing the semiconductor substrate and the lid, is made of sapphire which has substantially the same thermal properties as GaAs and transmits infrared rays. Therefore, when performing RTA using this semiconductor substrate heat treatment jig, the semiconductor substrate is directly heated by the infrared rays that have passed through the semiconductor substrate heat treatment jig, and the temperature is rapidly raised. Further, by using the GaAs substrate as the semiconductor substrate, the thermal environment of the peripheral portion of the semiconductor substrate becomes substantially the same. Thus, RTA is easily implemented without the occurrence of slip lines.

Further, in the second invention, the single crystal semiconductor thin film is formed on at least the upper surface of the side wall of the box. Therefore, when RTA is performed, the peripheral portion including the side wall is heated by the infrared rays absorbed by the single crystal semiconductor thin film, so that the temperature distribution in the thickness direction of the peripheral portion disappears. In this way, the thermal environment around the semiconductor substrate becomes more uniform, and the occurrence of slip lines is further suppressed.

[0018]

The present invention will be described in detail below with reference to the embodiments shown in the drawings. Due to the above-mentioned conventional problems, RTAs of GaAs
As a necessary condition for the material of the jig for use, 1) the infrared ray is transmitted, and 2) the thermal property is almost the same as GaAs.

Table 1 shows the thermal properties of GaAs, sapphire, SiO ₂ (quartz) and Si. Further, FIG. 8 shows the light transmission characteristics of SiO ₂ and sapphire.

[Table 1]

As can be seen from Table 1 and FIG. 8, sapphire transmits infrared rays almost like quartz glass, and its thermal property is almost equal to GaAs. In other words, sapphire is Ga
It satisfies the above-mentioned requirements for the As RTA jig, and can be said to be excellent as a material for the GaAs RTA jig. Therefore, in this embodiment, sapphire is used as a jig for RTA of GaAs.

1 and 2 are views showing a jig for heat treatment of a semiconductor substrate (hereinafter, simply referred to as a jig) formed of sapphire in this embodiment. FIG. 1 shows a box for accommodating a semiconductor substrate in the jig, and FIG. 2 shows a lid in the jig.

The above-mentioned box is a plan view of FIG. 1 (a) and FIG. 1 (b).
As shown in the cross sectional view of FIG. Also, the width d forming the chamber 3
A plurality of protrusions 5, at predetermined intervals on the upper surface of the side wall 4 having
5 is provided. The lid has a circular shape as shown in the plan view of FIG. 2A and the sectional view of FIG. , 6, ... are provided. When the cover 2 covers the box 1, the holes 6.6 ... Fit into the protrusions 5.5 of the box 1 so that the cover 2 can be removed from the box 1 when the jig is transported. Avoid slipping.

The jig is made of sapphire. Since sapphire transmits infrared rays as described above, it does not absorb infrared rays and rise in temperature (that is, they are not directly heated by infrared rays). Therefore, when a GaAs substrate is stored in the jig chamber 3 and heated with infrared rays with the lid 2 covered, only the stored GaAs substrate absorbs infrared rays and is heated. That is, as in the case of the conventional graphite jig, the Ga self-contained by heat conduction from the jig after the jig has heated up.
The As substrate does not heat up, but the GaAs substrate heats up first.

This means that the GaAs substrate can be rapidly heated with a small amount of heat, and the electrical characteristics of the GaAs substrate after RTA can be improved.

Further, as the housed GaAs substrate is heated, the jig is heated by the conductive heat from the GaAs substrate and its temperature rises. At that time, as described above, GaAs
Since the thermal properties of sapphire and sapphire are almost equal to each other, the thermal environment around the GaAs substrate will eventually be substantially equal to that of the GaAs substrate. Therefore, no slip line or warp of the substrate occurs.

In the jig having the above structure, only the GaAs substrate absorbs infrared rays. Therefore, the temperature of the jig is raised mainly by the side wall 4 of the box 1 which is likely to receive the heat radiated from the end surface of the housed GaAs substrate. Therefore, when the width d of the side wall 4 is too large,
The temperature distribution is generated in the radial direction of the side wall 4, and the temperature nonuniformity occurs in the GaAs substrate surface. In that case, G
Slip lines will occur on the As substrate, and in severe cases, the jig will break. In order to avoid such a situation, the width d of the side wall 4 may be set to 5 mm or less.

As described above, in the above embodiment, Ga
A jig for heat treatment of a semiconductor substrate, which is composed of a chamber 3 for housing an As substrate, a box 1 having a side wall 4 forming the chamber 3, and a lid 2 for covering the box 1, is formed of sapphire which transmits infrared rays. There is. Therefore, the GaAs substrate housed in the jig is heated prior to the jig by the infrared rays transmitted through the jig. That is, using this jig enables RTA with a high heating rate to be performed. The jig is made of sapphire, which has almost the same thermal properties as GaAs. Therefore, the thermal environment around the GaAs substrate housed in the jig can be made the same, and the occurrence of slip lines and the warp of the GaAs substrate can be prevented.

As described above, the jig in the above embodiment has Ga when the width d of the side wall 4 of the box 1 is larger than 5 mm.
In some cases, slip lines may occur on the As substrate or the jig may break. Therefore, the jig in this embodiment improves the above problems.

FIG. 3A is a box 11 of a jig according to this embodiment.
FIG. This box 11 basically has a structure in which a single crystal semiconductor thin film is formed on the upper surface of the side wall 4 of the box 1 in the above embodiment. That is, a chamber 13 for accommodating a GaAs substrate is provided at the center of the box 11, and a single crystal Si thin film 17 is grown on the upper surface of the side wall 14 forming the chamber 3. A plurality of protrusions 15, 15, ... Are provided on the single crystal Si thin film 17 at predetermined intervals.

The single crystal Si thin film 17 is formed by the so-called silicon-on-sapphire (SOS) technique or the like. Specifically, it is formed by growing a single crystal Si on the entire surface of the sapphire substrate and then removing unnecessary portions of Si by dry etching with a resist mask and CF ₄ -based gas.

FIG. 3B is a cross-sectional view when the semiconductor substrate is subjected to RTA by the jig. In this case, the single crystal Si thin film 17 on the side wall 14 of the box 11 absorbs infrared rays transmitted through the lid 12 of sapphire to generate heat. Therefore, the temperature distribution in the radial direction does not occur on the side wall 14 as in the above embodiment, and the GaAs substrate 1
8. The thermal environment around 8 can be made the same. As a result, the width of the side wall 14 of the jig in this embodiment can be set to 5 mm or more, and the dimensional restriction of the jig is reduced. Further, when the single crystal Si thin film 17 is formed by the SOS technique, impurities (B (boron), P (phosphorus), As (arsenic), etc.) capable of supplying carriers to the single crystal Si are doped at an arbitrary concentration. You may. In such a case, the GaAs substrate is heated at a higher speed in consideration of the temperature rise due to the absorption of light from the free carriers, so that it becomes possible to cope with a higher-speed RTA.

In another embodiment, as shown in FIG. 4, a single crystal semiconductor thin film 19 is grown around the bottom surface of the box 11 of the jig of the above embodiment shown in FIG. 3 (a). By doing so, the temperature distribution in the depth direction of the side wall 14 can be reduced. Further, in another embodiment, a GaAs thin film is grown on the single crystal Si thin films 17 and 19 shown in FIG. According to this jig, the periphery of the box chamber is surrounded by GaAs. Therefore, if the semiconductor substrate to be housed is a GaAs substrate,
The periphery of the As substrate will be surrounded by GaAs, and the thermal environment will be the same. Therefore, according to this embodiment, it is possible to provide a jig most suitable for RTA of a GaAs substrate.

In each of the above embodiments, the GaAs substrate is used as the semiconductor substrate to be heated by the jig, but it does not matter if another semiconductor substrate is heated. However, it goes without saying that a semiconductor substrate having a thermal property closer to that of sapphire can exert the effect of preventing the occurrence of slip lines and the warp of the substrate.

[0034]

As is apparent from the above, in the semiconductor substrate heat treatment jig of the first invention, the box and lid constituting this semiconductor substrate heat treatment jig are formed of sapphire, so that the infrared lamp It transmits infrared rays without absorbing them.
Therefore, the semiconductor substrate housed in the box is directly heated by the infrared rays from the infrared lamp. That is, according to the present invention, the RTA with a high heating rate is used.
Will be possible. Further, since the sapphire has substantially the same thermal properties as GaAs, when the GaAs substrate is used as the semiconductor substrate for the RTA, the thermal environment of the semiconductor substrate can be made substantially the same, and the occurrence of slip lines can be suppressed. ..

In the semiconductor substrate heat treatment jig of the second invention, the single crystal semiconductor film is formed in the peripheral portion including the side wall of the box, so that the single crystal semiconductor film absorbs infrared rays from the infrared lamp. Then, the temperature can be raised to eliminate the temperature distribution in the width direction of the peripheral portion. Therefore, according to the present invention, it is possible to further suppress the occurrence of slip lines by making the thermal environment of the semiconductor substrate the same.

[Brief description of drawings]

FIG. 1 is a view showing a box of an embodiment of a semiconductor substrate heat treatment jig of the present invention.

FIG. 2 is a diagram showing a lid that covers the box of FIG.

FIG. 3 is an explanatory diagram of an embodiment different from FIGS. 1 and 2.

FIG. 4 is a cross-sectional view of a box body of an embodiment different from FIGS. 1, 2 and 3.

FIG. 5 is an explanatory diagram of an RTA using a graphite jig.

FIG. 6 is an explanatory diagram of an RTA using a donut-shaped guard link.

FIG. 7 is a diagram showing the effect of heating rate on the electrical characteristics of a GaAs n-type layer.

FIG. 8 is a diagram showing light transmission characteristics of sapphire and SiO ₂ .

[Explanation of symbols]

1,11 ... Box, 2,12 ... Lid,
3, 13 ... Chamber, 4, 14 ... Side wall, 17, 19 ... Single crystal Si thin film.

Claims (2)

[Claims] 1. A jig for heat treatment of a semiconductor substrate, comprising a box for housing a semiconductor substrate and a lid, which is used in a short-time annealing method using an infrared lamp, wherein the box and the lid are made of sapphire. A jig for heat treatment of a semiconductor substrate, which is characterized by: 2. The semiconductor substrate heat treatment jig according to claim 1, wherein a single crystal semiconductor thin film is formed on a peripheral portion of the box including a side wall.