JPH0217723A - Phase locked loop circuit - Google Patents

Abstract

PURPOSE:To perform a stable operation with a preset frequency by controlling connection between a constant voltage generator and an amplifier and between a phase comparator and the amplifier by an input signal detection circuit to detect the presence/absence of an input signal. CONSTITUTION:When the input signal appears, a voltage V- applied on the (-) terminal of an operational amplifier OP in the input signal detection circuit 7 is shown in equation (1). Here, when a time constant CR is sufficiently larger than the cycle of the input signal and the voltage V+ at the (+) terminal of the operational amplifier OP is set as V+>V-, the output of the input signal circuit 7 goes to an H level. And the phase comparison of the input signal with the output signal of a frequency divider 6 is performed by a phase comparator 2, and the phase of the input signal is conformed to that of the output signal of the frequency divider 6 by controlling a voltage controlled oscillator 5. Also, when the input signal disappears, the output signal of the input signal detection circuit 7 goes to an L level. Then, a switch 8 is activated, and a constant voltage from the constant voltage generator 9 is applied on the input terminal of the voltage controlled oscillator 5, and the signal with stable frequency can be obtained from an output terminal 10.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a phase-locked circuit, and particularly to a phase-locked circuit that operates at a synchronized frequency when there is an input signal and operates at a stable frequency even when there is no input signal. It relates to synchronous circuits.

[Conventional technology]

In conventional circuits, for example, as shown in Japanese Patent Application Laid-Open No. 61-270918, when the input signal is interrupted, the output voltage of a constant voltage generator coupled at high impedance is input to a voltage controlled oscillator via an amplifier. terminal and the circuit was operating at a stable frequency.

However, in conventional circuits, when the phase of the comparison signal fed back from the voltage controlled oscillator to the phase comparator via the synchronizing signal generator matches the phase of the input signal, the input signal is sent from the phase comparator to the voltage controlled oscillator. Since there is no input signal, the input voltage of the voltage controlled oscillator is only the output voltage of the constant voltage generator. - In general, the case where the input signal becomes phase-locked due to variations in the input signal, adjustment errors of the constant voltage generator, etc. and the case where the input signal is controlled by the constant voltage generator are as follows:
The output frequency of the voltage controlled oscillator is different. For this reason, when controlled by a phase-synchronized constant voltage generator, a phase shift occurs with the input signal, and the synchronization pull-in operation is performed again, causing the output signal to generate jitter. there were.

[Problem to be solved by the invention]

The above-mentioned conventional technology does not take into consideration the circuit operation after synchronization pull-in, and has the problem of generating jitter after synchronization pull-in.

An object of the present invention is to provide a phase synchronized circuit that synchronizes with the input signal when there is an input signal, operates stably at a set frequency even when there is no input signal, and has little jitter.

[Means to solve the problem]

The above purpose is to provide an input signal detection circuit that detects the presence or absence of an input signal, and uses its output signal to cut off the output of the constant voltage generator and the input of the amplifier when there is an input signal, and to cut off the output of the constant voltage generator and the input of the amplifier when there is no input signal. Only conduct the output of the constant voltage generator and the input of the amplifier.

This is achieved by simultaneously cutting off the output of the phase comparator and the input of the amplifier.

[For production]

In the present invention, the constant voltage generator and the amplifier are controlled by the input signal detection circuit that detects the presence or absence of an input signal.

The connection between the phase comparator and the amplifier is controlled, and when there is an input signal, the output of the phase comparator is applied to the voltage controlled oscillation amount via the amplifier, and when there is no input signal, the output of the constant voltage generator is applied to the amplifier. By applying the voltage to the voltage controlled oscillator via the input signal, phase synchronized operation without the influence of the constant voltage generator can be performed when there is an input signal, and stable operation can be performed at the set frequency when there is no input signal. I can do it.

〔Example〕

An embodiment of the present invention will be described below.

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a circuit diagram showing the configuration of the main part of FIG. 1.

Figure 3 is a waveform diagram to explain the operation of the input signal detection circuit when an input signal is input, and Figure 4 is a waveform diagram to explain the operation of the input signal detection circuit when there is no input signal. In the figure, 1 is an input terminal, 2 is a phase comparator, 3 is a sample and hold circuit, 4 is an amplifier, 5 is a voltage controlled oscillator,
6 is a frequency divider, 7 is an input signal detection circuit, 8 is a switch, 9
1 is a constant voltage generator, 10 is an output terminal, and 11.12 is a control terminal of the sample-and-hold circuit 3.

When an input signal is input to the input terminal 1 as shown in FIG. 3(a), the operational amplifier oP of the input signal detection circuit 7 shown in FIG.
The voltage V- applied to the (-) terminal of is applied to the resistor R and capacitor C of the input signal detection circuit 7.

It is integrated and becomes as shown in the following equation, and changes as shown in FIG. 3(b).

However, ■ is the amplitude of the input signal.

Here, the time constant (=CR) of the integrator circuit is set sufficiently larger than the period of the input signal, and the period during which the input signal is at H level is set as T, and the voltage V- and the operational amplifier OP of the input signal detection circuit 7 are If the following formula holds true as a relationship with the voltage V- dimension applied to the (+) terminal.

The output signal of the input signal detection circuit 7 becomes H level as shown in FIG. 3(Q).

From the above, when there is an input signal, the output signal maintains the H level. When the output signal of the input signal detection circuit 7 becomes H level, the transistor Tri of the switch 8 shown in FIG. 2 becomes conductive, and the switch SW of the switch 8 conducts the output of the sample-and-hold circuit 3 and the input of the amplifier 4. let

At this time, the phase comparator 2 compares the phases of the input signal and the output signal of the frequency divider 6, and if the input signal is ahead in phase, an H level signal is sent to the control terminal 12 of the sample and hold circuit 3. entered.

NMOS transistor Tr3 of sample-and-hold circuit 3 becomes conductive, and as a result, the control voltage of voltage-controlled oscillator 5 decreases via amplifier 4, lowering the frequency of its output signal. Further, when the phase of the input signal is delayed, an L level signal is input to the control terminal 11 of the sample and hold circuit 3, the PMOS transistor Tr2 of the sample and hold circuit 3 becomes conductive, and as a result, the The control voltage of the voltage controlled oscillator 5 rises.

Increase the frequency of its output signal. In this way, the phases of the input signal and the output signal of the frequency divider G are matched.

When the two phases match, the control terminal 11 of the sample-and-hold circuit 3 becomes H level, the control terminal 12 becomes L level, and the PMOS transistors Tr2. Since the NMOS transistor Tr3 is in a cutoff state, the voltage charged in the output capacitor Co is held, and as a result,
When the control voltage of the voltage controlled oscillator 5 becomes constant and one phase synchronization occurs, as shown in FIG. 4(a), when the input signal disappears,
The voltage V- applied to the (-) terminal of the operational amplifier OP of the input signal detection circuit 7 increases as shown in FIG. 4(b), and after a certain period of time, the following equation holds true.

The output signal of the input signal detection circuit 7 becomes L level as shown in FIG. 4(c).

v−>v+ When the output signal of the input signal detection circuit 7 reaches the level 1,
The transistor Tri of the switch 8 is cut off, the switch SW of the switch 8 connects the output of the constant voltage generator 9 and the input of the amplifier 4, and the output of the sample-and-hold circuit 3 becomes open. As a result, a constant voltage from the constant voltage generator 9 is applied to the input terminal of the voltage controlled oscillator 5, and a signal with a stable frequency is obtained from the output terminal 10.

The frequency of the output signal from the output terminal 10 is determined by the constant voltage generator 9.
It can be set to any value by adjusting the output voltage.

In this embodiment, the input signal detection circuit 7 is a circuit using an integrating circuit and an operational amplifier, and the switch 8 is a circuit using a transistor and a relay. It goes without saying that the same effect can be obtained even if a C-MOS switch circuit or a transistor switch circuit is used as the switch 8.

〔Effect of the invention〕

According to the present invention, it is possible to realize a phase synchronized circuit that synchronizes with the input signal when there is an input signal, operates stably at a set frequency even when there is no input signal, and has little jitter.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a circuit diagram showing the configuration of the first main part, and Fig. 3 is input signal detection in Fig. 2 when there is an input signal. FIG. 4 is a waveform diagram for explaining the operation of the circuit. FIG. 4 is a waveform diagram for explaining the operation of the input signal detection circuit in FIG. 2 when there is no input signal. It is. DESCRIPTION OF SYMBOLS 1... Input terminal, 4... Amplifier, 7... Input signal detection circuit, 8... Switch, 9... Constant voltage generator. Compiled diagram of the bamboo

Claims (1)

[Claims] 1. Compare the phase of the comparison signal and the input signal from the outside, and if the phase of the comparison signal is ahead, the phase of the input signal is ahead of the first output terminal. a phase comparator that outputs a signal having a value proportional to the phase difference between the two signals from a second output terminal, respectively;
The signal output from the phase comparator is input, converted to voltage, and output. When the signal is no longer input from the phase comparator, the voltage output immediately before is held, and thereafter, it is held. a sample-and-hold circuit that outputs a voltage, a constant voltage generator that generates and outputs an arbitrary constant voltage, and a voltage output from the sample-and-hold circuit and a voltage output from the constant voltage generator. a switch that selects and outputs one of the voltages; an amplifier that amplifies and outputs the voltage output from the switch; and an amplifier that generates and outputs an oscillation signal and whose oscillation frequency is adjusted to the output voltage from the amplifier. a voltage-controlled oscillator that can be continuously varied by a voltage-controlled oscillator; a frequency divider that divides the frequency of an oscillation signal from the voltage-controlled oscillator by a natural number ratio and inputs the frequency to the phase comparator as the comparison signal; and an input signal detection circuit that detects the presence or absence of the input signal input to the device, and when the input signal detection circuit detects the presence of the input signal, it controls the switch to cause the switch to detect the input signal. By selecting the output voltage from the sample-and-hold circuit, the voltage controlled oscillator is operated so that the phase of the comparison signal matches the phase of the input signal, and when the absence of the input signal is detected, the The voltage controlled oscillator is operated so that the frequency of the comparison signal becomes a certain constant frequency by controlling a switch and causing the switch to select the output voltage from the constant voltage generator. A phase-locked circuit featuring: