JPH0215620A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a stable contact resistance by a method wherein, after a poly Si layer is buried in contact holes, a Ti silicide layer is formed, the Ti silicide layer is nitrogenized and a thick Ti nitride layer is formed on the Ti nitride layer as a barrier metal layer. CONSTITUTION:A poly Si layer 16 is grown, contact holes are filled with the layer 16 and the layer 16 is turned into an N-type by diffusing phosphorus. The layer 16 is performed an anisotropic etching with SF6 gas to remove the layer 16 other than the layer 16 in the contact holes and to expose a PSG interlayer film 14 to flatten and after that, a Ti film 17 is adhered. Then, the film 17 and the layer 16 are made to react to each other by a nitrogen treatment and a Ti silicide layer 18 is formed. At this time, the film 17 on the film 14 does not react and remains as it. Therefore, the film 17 can be easily removed with a solution of N2O2+NH4OH. By performing an annealing in an NH3-containing atmosphere, the layer 18 is nitrogenized and a TiN film Ti silicide layer 19 is formed. After that, Al is deposited by a sputtering method and desired Al wiring parts 10 are formed by a photo-etching technique.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a barrier layer in a contact hole.

[Conventional technology]

The prior art will be explained with reference to FIG.

After forming an 0N+ diffusion layer 34 to a depth of about 1000 layers on a P-type S1 substrate 33 by ion implantation, an interlayer film 35 is formed on the entire surface of the substrate 33, and the interlayer film 35 on the N+ diffusion layer 34 is removed by etching. A contact hole is opened as shown in FIG. 3(a). Thereafter, a Ti film 36 is formed on the entire surface by sputtering, as shown in FIG. 3(b), so as to be in contact with the N+ diffusion layer 34.

By heat-treating this, T is formed only at the bottom of the contact hole.
An i-silicon F layer 37 is formed. At this time, since the Ti film 36 adjacent to the interlayer film 35 does not react, H, O□+N
It can be removed by Hh OH solution. Then N
Annealing is performed in an H3 atmosphere to form a Ti silicide layer 37.
A Ti nitride layer 38 which is nitrided to serve as a barrier metal is formed on the Ti silicide 37 as shown in FIG. 3(c). Thereafter, polycrystalline silicon 39 is grown over the entire surface by the CVD method to fill the contact hole, and an N-type impurity is diffused into the contact hole. After removing and planarizing the polycrystalline silicon other than the contact hole, Aβ was formed on the entire surface and patterned into a predetermined shape to form the Au wiring 40 as shown in FIG. 3(d).

[Problem to be solved by the invention]

In the conventional technique described above, in the method of forming a Ti silicide layer on the contact on the diffusion layer and then nitriding it, in order to give the Ti nitride TiN film barrier properties,
Requires a film thickness of at least 1000 people. Therefore, Ti silicide of 1000 Å or more is required. Therefore, when Ti silicide is formed by the reaction between Ti and Si,
Approximately 1000 Si in the 0 diffusion layer is consumed. Ti and S
The reaction of i does not occur uniformly, and some parts are thick. Therefore, the diffusion layer is shallow (0.1 μm to 0.4 μm).
m junction), using the conventional contact structure,
As shown in FIG. 4, the junction formed between the silicon substrate 41 and the diffusion layer 42 is destroyed when the Ti silicide layer 45 is formed. For this purpose, the Ti silicide layer on the diffusion layer is nitrided,
A drawback is that it is difficult to form a thick Ti nitride layer. Also, when contact holes are filled with polycrystalline silicon, A! A reaction occurs between polycrystalline silicon and contact resistance increases due to Si precipitation.

〔the purpose〕

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device with low contact resistance by preventing junction breakdown of a diffusion layer during formation of a barrier metal.

[Means to solve the problem]

The present invention includes a process of growing an interlayer film after forming each lower interconnection or diffusion layer and forming a contact hole on each interconnection layer and diffusion layer, and growing polycrystalline silicon to fill the contact hole. A step in which polycrystalline silicon is left only in the contact area, a step in which Ti is deposited and then silicided to form Ti silicide on the polycrystalline silicon upper layer in the contact area, and a Ti nitride layer is formed by nitriding the Ti silicide layer. and a step of forming A4 wiring.

〔Example〕

The present invention will be explained with reference to the drawings.

An embodiment of the present invention will be explained with reference to FIG. An N+ diffusion layer 15 and a polycrystalline silicon wiring 13 are formed in a predetermined region of a P-type silicon substrate 11. Next, after growing the PSG interlayer film 14 by the CVD method, contacts are formed on the diffusion layer and the wiring layer.

At this time, the size of the contact hole is standardized to be, for example, 1 μm. As shown in FIG. 1(a), for example, 5,000 polycrystalline silicon layers 16 are grown by the CVD method, contact holes are filled, and the polycrystalline silicon is made into N-type by phosphorus diffusion. After performing anisotropic etching on the polycrystalline silicon layer 16 using an SF gas, removing the polycrystalline silicon 16 other than the contact hole, and exposing and planarizing the PSG interlayer film 14, the polycrystalline silicon layer 16 is etched as shown in FIG. 1(b). For example, a Ti film 17 of 2,000 layers is deposited by sputtering. Next 600
The Ti film 17 and the polycrystalline silicon 16 are reacted by nitrogen treatment for 60 minutes at .degree. C. to form a 2000 Ti silicide layer 18. At this time, since the Ti film 17 on the PSG interlayer film 14 does not react and remains as Ti, H2O2+NH4
It can be easily removed with an OH solution as shown in FIG. 1(c).

By performing annealing at 900° C. for 90 minutes in an NHs atmosphere, the Ti silicide layer 18 is nitrided and a TiN film Ti silicide layer 19 of approximately 1500 layers is formed. Thereafter, aluminum is deposited by sputtering, and a desired An wiring IO is formed by photoetching.

A second embodiment of the present invention will be explained with reference to FIG. Nf
f After forming the P well 22 on the silicon substrate 21, the N+ diffusion layer 23. A P+ diffusion layer 25 is formed, and 5i is formed by CVD method.
After forming the n2 interlayer film 26, a contact hole is opened above the diffusion layer 23.25.

Thereafter, a polycrystalline silicon layer 27 is formed to fill the contact hole as shown in FIG. 2(a).

After adding phosphorus onto the N+ diffusion layer 23 and boron onto the P+ diffusion layer 25 by ion implantation, etching is performed using SF6 gas as shown in FIG. 2(b), and only the contact hole is made of polycrystal. The silicon 28 and 29 are left and planarized.

After depositing the Ti film, silicidation was performed in the same manner as in Example 1,
After removing unreacted Ti, the Ti silicide layer 30 is nitrided, a T1 nitride layer 31 is formed, and an AA wiring 32 is formed. This embodiment can also be applied to CMOS devices by separating the impurities added to the polycrystalline silicon layer by ion implantation.

〔Effect of the invention〕

As explained above, in the present invention, after filling the contact hole with polycrystalline silicon, a silicide layer with Ti is formed, the Ti silicide is nitrided, and a thick Ti nitride layer is formed on the Ti silicide layer as a barrier metal. By doing so, it is possible to flatten the contact and suppress the reaction between the buried polycrystalline silicon and Au with the Ti nitride layer, which has the effect of realizing stable contact resistance.

[Brief explanation of the drawing]

Fig. 1 is a sectional view showing a first embodiment of the present invention, Fig. 2 is a sectional view showing a second embodiment of the invention, Fig. 3 is a sectional view showing a conventional example, and Fig. 4 is a sectional view showing a conventional example. FIG. 11.33.41...P-type silicon substrate, 12
゜24...Field SiO2 film, 13...
・・・Polycrystalline silicon wiring, 14.26, 35.43・
...Interlayer film, 15.23.34.42...
・N+ diffusion layer, 16°28.39...N+ type polycrystalline silicon layer, 17,36°44...Titanium (
Ti) film, 18,30,37°45...Titanium silicide layer, 19,31.38...Titanium nitride layer, 20,32.40...Aluminum (Af
fl) Wiring, 21...N-type silicon substrate, 22
...P well, 25...P+ diffusion layer,
27... Polycrystalline silicon layer, 29... Group P+
Polycrystalline silicon layer. Agent Patent Attorney Susumu Uchihara (Ro) CI)) (0L) Seat! Early closing 2 times (of) C Shifu (C)

Claims (1)

[Claims] forming a diffusion layer region on a semiconductor substrate; forming an insulating film on the semiconductor substrate; forming a contact hole in the insulating film on the diffusion layer; a step of growing a crystalline silicon layer; a step of adding an impurity of the same conductivity type as the diffusion layer to the polycrystalline silicon layer; a step of selectively removing the polycrystalline silicon film other than the contact hole; a step of forming a metal film on the surface of the semiconductor substrate; a step of forming the metal silicide layer on the polycrystalline silicon layer of the contact portion; a step of removing the metal film other than the contact hole; 1. A method for manufacturing a semiconductor device, comprising the steps of: forming a metal nitride layer on at least an upper layer of a physical layer; and forming a predetermined metal wiring to be connected to the metal nitride layer.