JPH02148847A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to reduce the areas of a base and an emitter and to decrease a junction capacitance and a base resistance by taking out a collector electrode at the side part of a protruding part, making it possible to reduce an embedded layer, decreasing the capacitance of a collector substrate, forming a graft base from the side surface of the protruding part, and forming the emitter at the inside. CONSTITUTION:An n-type epitaxial layer 3 is removed by 3,000-5,000 Angstrom . A first protruding part 7 is formed. A silicon nitride film 8 is etched, and a second sidewall 8' is formed. The epitaxial layer 3 is exposed, and a second protruding part 10 is formed. Then a third side-wall 11 is formed. A first polycrystalline silicon film 12 is exposed on a second protruding part 10. In the epitaxial layer 3, n-type impurities are diffused, and a collector contact region 12a is formed. A collector lead-out electrode 12' is formed in connection with an n<+> type embedded layer 2. Then, p-type impurities are diffused into the upper part of the side surface of the second protruding part 10 from the inside of a second polycrystalline silicon film 14. Thus a graft base region 16 and a base lead-out electrode 14' are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device including a bipolar transistor.

[Conventional technology]

In order to realize a high-speed bipolar transistor by reducing base resistance and junction capacitance, a graft base has conventionally been formed in a self-aligned manner using a base polycrystalline silicon film as a diffusion source.

FIG. 2 is a cross-sectional view for explaining an example of a conventional method for manufacturing a semiconductor device.

First, an epitaxial layer 23 that becomes a collector is deposited on a p-type silicon substrate 21 having an n+ type buried layer 22 on the surface, and is isolated by an insulating region 24 for element isolation, and connected by the buried layer 22. After forming an n+ type collector electrode layer 25 in one region, an insulating film 2 is formed on the epitaxial layer 23.
6. A polycrystalline silicon film 27 containing p-type impurities and an insulating film 28 are sequentially formed, and the insulating film 28 and polycrystalline silicon film 27 are sequentially removed to form a window.

Next, a side wall 29 is formed on the side surface of the window, and the insulating film 26 is etched to below the polycrystalline silicon film to form an eaves. Subsequently, after selectively forming a polycrystalline silicon film 30 under the eaves, a heat treatment is performed to diffuse the p-type impurity from the polycrystalline silicon film 27 containing the p-type impurity into the epitaxial layer through the polycrystalline silicon film 30 and graft it. A base region 31 is formed.

Next, a second sidewall 32 is formed on the side surface of the window, and a p-type impurity is introduced into the surface of the opening of the epitaxial layer 23 by ion implantation or the like to form a base region 33. Next, a polycrystalline silicon film 34 containing n-type impurities is formed, and an emitter region 35 is formed by diffusion, thereby completing a semiconductor device including the transistor shown in FIG.

[Problems to be Solved by the Invention] In the transistor for high-speed devices produced by the conventional semiconductor device manufacturing method described above, base resistance and junction capacitance can be reduced by forming a graft base region in a self-aligned manner. Since the graft base region 31 is formed wider than the window formed by the lithography technique, the area of the base region including the graft base becomes large, the base resistance becomes large, and the junction capacitance also increases.

Further, since the collector is extracted from below the emitter through the buried layer 22, the area of the buried layer 22 becomes large, resulting in a large collector resistance and a problem in that the capacitance between the collector and the p-type substrate becomes large.

The present invention reduces the area of the base region including the graft base, reduces the area of the buried layer, and reduces the base resistance, junction capacitance, and collector-substrate capacitance, thereby making it possible to manufacture high-speed bipolar transistors. The purpose is to provide a method for manufacturing the device.

[Means to solve the problem]

In the method for manufacturing a semiconductor device of the present invention, a first protrusion is formed on a silicon substrate on which a buried layer and an epitaxial layer are formed, using a first insulating film, a second insulating film, and a first sidewall. Then, a second protrusion is formed using the second side wall. Next, after forming a third side wall on the second convex portion, the second convex portion is formed with a third side wall.
forming a first polycrystalline silicon film in the lateral region of the convex portion;
At the same time as forming a third insulating film thereon, the polycrystalline silicon film is electrically connected to the buried layer. Further, an impurity is diffused from the second polycrystalline silicon film at the upper side of the second convex part to form a graft base, and an impurity is diffused from the upper surface of the second convex part to form a base region and an emitter region. are doing.

[Effect]

In the manufacturing method described above, the collector is drawn out at the side of the convex portion provided in the epitaxial layer to reduce the area of the buried layer. In addition, the graft base region is formed from the side surface of the convex portion to reduce the area of the base region.

(Example〕 Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(g) are sectional views showing an embodiment of the present invention in the order of steps.

First, as shown in FIG. 1(a), an n-type buried layer 2 is selectively formed on a p-type silicon substrate 1, and an n-type epitaxial layer N3 is grown thereon.

Thereafter, a silicon nitride film 4 is formed as a first insulating film to a thickness of 1,000 to 2,000 wafers over the entire surface, and then a silicon oxide film 5 is formed as a second insulating film to a thickness of 3,000 to 5,000 ni. Then, the silicon oxide film 5 other than on a predetermined area is removed by anisotropic etching using photolithography technology. Thereafter, the silicon nitride film 4 is removed by etching using the silicon oxide film 5 as a mask, and under the silicon oxide film 5, side etching is performed by 1000 to 3000 layers to form an eaves. Next, a 100% silicon oxide film is applied to the entire surface.
The first side wall 6 is formed by anisotropic etching.

Next, as shown in FIG. 1(b), the epitaxial layer 3 is etched by anisotropic etching using the silicon oxide film 5, silicon nitride film 4, and first sidewall 6 as masks.
0 people are removed and the first convex portion 7 is formed. Subsequently, a silicon nitride film 8 is formed on the entire surface, and the silicon nitride film 8 is selectively removed by photolithography. Thereafter, the epitaxial layer 3 other than the area covered with the silicon nitride film 8 is oxidized under pressure in an oxidizing atmosphere, and the n-type silicon substrate 1 is
A silicon oxide film 9 for element isolation is formed that reaches up to the point.

Next, as shown in FIG. 1C, the silicon nitride film 8 is etched by anisotropic etching to form a second sidewall 8' and expose the epitaxial layer 3. After that, the exposed epitaxial layer 3 is etched by anisotropic etching.
00 to 5000 are removed to form the second convex portion 10.

Next, the epitaxial layer 3 is oxidized in an oxidizing atmosphere to form a silicon oxide film of 1,000 to 3,000 layers, and this is etched by anisotropic etching to form the third sidewall 11.

Next, as shown in FIG. 1(d), after 2000 to 4000 layers of the first polycrystalline silicon film 12 are formed on the entire surface and patterned, a polycrystalline silicon film 12 and a selective etching layer are formed on the entire surface (not shown). A coating film having a suitable ratio, such as a photoresist, is applied and etched back by anisotropic etching to expose the first polycrystalline silicon film 12 on the second convex portion 10. Next, using this photoresist as a mask, the first polycrystalline silicon film 12 is removed by anisotropic etching until it remains only on the lower side of the second convex portion 10. After that, the photoresist is removed, and n-type impurities are added to the first polycrystalline silicon film 1 by ion implantation or the like.
2, the surface of the first polycrystalline silicon film 120 is oxidized in an oxidizing atmosphere, and 1,000 to 2,000 silicon oxide films 13 are formed as the third insulating film. At the same time as this oxidation, n-type impurities are diffused from the first polycrystalline silicon film 12 into the epitaxial layer 3 to form a collector contact region 12a, which is connected to the n-type buried layer 2 to form a collector lead-out electrode. 12' is formed.

Next, as shown in FIG. 1(e), the second sidewall 8' is removed, and a second polycrystalline silicon film 14 with a thickness of 2,000 to 40,000 ml is deposited on the entire surface.
After forming and patterning the second polycrystalline silicon film 14, the second polycrystalline silicon film 14 is etched in the same manner as described above, leaving only the portion connected to the epitaxial layer N3 on the upper side of the second convex portion 10.

Thereafter, n-type impurities are introduced into the second polycrystalline silicon film 14 by ion implantation or the like, the silicon oxide film 5 and the first sidewall 6 are removed, and the second polycrystalline silicon film is formed in an oxidizing atmosphere. 14 and the exposed surface of the epitaxial layer 3 to form a silicon oxide film 1 as a fourth insulating film.
5 to form 1,000 to 2,000 people. Simultaneously with this oxidation, a P-type impurity is diffused from the second polycrystalline silicon film 14 into the upper side surface of the second convex portion 10 to form a graft base region 16 and a base extraction electrode 14'.

Next, as shown in FIG. 1(f), the silicon nitride film 4 is removed to expose the epitaxial layer N3.

Thereafter, P-type impurities are introduced into the epitaxial layer 3 on the upper surface of the second convex portion 10 by ion implantation or the like, and a base region 17 is formed by heat treatment. Next, the third
A polycrystalline silicon film is selectively formed to a thickness of 2,000 to 4,000 nm, and after introducing n-type impurities, the emitter region 19 is diffused from the third polycrystalline silicon film into the epitaxial layer 3 by heat treatment. and emitter electrode 1
form 8.

Thereafter, as shown in FIG. 1(g), openings are formed in the silicon oxide film 13 and the silicon oxide film 15, and an aluminum electrode 20 is formed to complete the bipolar transistor.

〔Effect of the invention〕

As described above, in the present invention, the buried layer can be reduced by taking out the collector electrode at the side of the convex portion formed by photolithography, thereby reducing the collector-substrate capacitance. In addition, by forming a graft base from the side of the convex part and forming an emitter inside it,
It becomes possible to reduce the area of the base and emitter, thereby reducing the junction capacitance and base resistance, realizing higher speed, and further improving high frequency characteristics such as cutoff frequency.

[Brief explanation of the drawing]

FIGS. 1(a) to (g) are cross-sectional views showing an embodiment of the present invention in the order of steps, and FIG. 2 is a cross-sectional view for explaining an example of a conventional method for manufacturing a semiconductor device. 1...p-type silicon substrate, 2...n-type buried layer, 3
... N-type epitaxial device, 4... Silicon nitride film (first insulating film), 5... Silicon oxide film (second insulating film), 6... Silicon oxide film (first sidewall) ), 7
...first convex portion, 8...silicon nitride film, 8'...
- Second side wall, 9... silicon oxide film, 10... second convex portion, 11... silicon oxide film (third side wall),
12... First polycrystalline silicon film, 12'... Collector extraction electrode, 12a... Collector contact region, 13... Silicon oxide film (third insulating film), 14
... second polycrystalline silicon film, 14'... base extraction electrode, 15... silicon oxide film (fourth insulating film), 16... graft base region, 17... base region, 18... Emitter electrode (third polycrystalline silicon film), 19... Emitter region, 20... Aluminum electrode, 21... P-type silicon substrate, 22... N-type buried layer, 23... n-type epitaxial layer, 24...
- Insulating region, 25... n-type collector electrode layer, 26.
...Insulating film, 27...Polycrystalline silicon film, 28...
Insulating film, 29... Side wall, 30... Polycrystalline silicon film, 31... Graft base region, 32... Second side wall, 33... Base region, 34... Polycrystalline silicon film , 35...emitter region 35°

Claims (1)

[Claims] 1. An epitaxial layer of a first conductivity type is grown on a semiconductor substrate of a second conductivity type on which a buried layer of a first conductivity type is selectively formed on the surface, and a first insulating film and a second insulating film are grown on a predetermined region of the epitaxial layer. selectively forming films and forming first sidewalls on the side surfaces of these insulating films, and partially changing the epitaxial layer using the first and second insulating films and the first sidewalls as masks. directional etching to form a first protrusion in the epitaxial layer, forming a second sidewall on the side surface of the first protrusion, and masking the first protrusion and the second sidewall; a step of anisotropically etching the epitaxial layer again to form a second convex portion; a step of forming a third sidewall on the side surface of the second convex portion; forming a first polycrystalline silicon film containing impurities of a first conductivity type in a region including the epitaxial layer exposed laterally; and oxidizing the first polycrystalline silicon film to form a third insulating film. forming a collector lead-out electrically connected to the buried layer of the first conductivity type by diffusing a first conductivity type impurity in the polycrystalline silicon film into the epitaxial layer; removing a second sidewall and forming a second polycrystalline silicon film containing a second conductivity type impurity from this portion to a region on the third insulating film; The sidewalls of the second polycrystalline silicon film and the surface of the epitaxial layer below the first sidewall are oxidized to form a fourth insulating film. A step of diffusing a second conductivity type impurity to the upper side surface of the second convex portion to form a graft base, and removing the first insulating film and sequentially introducing a second conductivity type impurity and a first conductivity type impurity. A method for manufacturing a semiconductor device, comprising the step of sequentially forming a base region and an emitter region on the upper surface of the second convex portion.